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Thu, 17 Jul 2025 09:42:38 -0700 (PDT) Received: from [192.168.1.3] ([185.48.76.109]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-45634f5dd61sm28041015e9.11.2025.07.17.09.42.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 17 Jul 2025 09:42:38 -0700 (PDT) Message-ID: <95468171-a09d-4b6b-a0bd-189d83ff33a6@linaro.org> Date: Thu, 17 Jul 2025 17:42:37 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 07/10] perf: arm_spe: Add support for filtering on data source To: Will Deacon Cc: Catalin Marinas , Mark Rutland , Jonathan Corbet , Marc Zyngier , Oliver Upton , Joey Gouly , Suzuki K Poulose , Zenghui Yu , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , leo.yan@arm.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-doc@vger.kernel.org, kvmarm@lists.linux.dev References: <20250605-james-perf-feat_spe_eft-v3-0-71b0c9f98093@linaro.org> <20250605-james-perf-feat_spe_eft-v3-7-71b0c9f98093@linaro.org> <7f51d4f9-7e08-49b5-ab43-8bc765bb2ca8@linaro.org> Content-Language: en-US From: James Clark In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250717_094240_527431_57B48339 X-CRM114-Status: GOOD ( 29.83 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 17/07/2025 4:27 pm, Will Deacon wrote: > On Thu, Jul 17, 2025 at 04:16:32PM +0100, James Clark wrote: >> >> >> On 17/07/2025 3:29 pm, Will Deacon wrote: >>> On Tue, Jul 15, 2025 at 02:04:18PM +0100, James Clark wrote: >>>> On 14/07/2025 3:04 pm, Will Deacon wrote: >>>>> On Thu, Jun 05, 2025 at 11:49:05AM +0100, James Clark wrote: >>>>>> @@ -406,6 +416,9 @@ static u64 arm_spe_event_to_pmsfcr(struct perf_event *event) >>>>>> if (ATTR_CFG_GET_FLD(attr, inv_event_filter)) >>>>>> reg |= PMSFCR_EL1_FnE; >>>>>> + if (ATTR_CFG_GET_FLD(attr, data_src_filter)) >>>>>> + reg |= PMSFCR_EL1_FDS; >>>>> >>>>> Is the polarity correct here? The description of PMSDSFR_EL1.S suggests >>>>> that setting bits to 1 _excludes_ the FDS filtering. >>>>> >>>> >>>> Setting filter bits to 1 means that samples matching are included. Setting >>>> bits to 0 means that they are excluded. And PMSFCR_EL1.FDS enables filtering >>>> as a whole, so if the user sets any filter bit to 1 we want to enable >>>> filtering: >>>> >>>> PMSDSFR_EL1.S >>>> >>>> 0b0 If PMSFCR_EL1.FDS is 1, do not record load operations that have >>>> bits [5:0] of the Data Source packet set to . >>>> >>>> 0b1 Load operations with Data Source are unaffected by >>>> PMSFCR_EL1.FDS. >>>> >>>> I think it's all the right way around and it ends up being the same as the >>>> other filters in SPE. Because we're using any bit being set to enable the >>>> filtering, the only thing you can't do is enable filtering with a 0 filter, >>>> but I didn't think that was useful. See the previous discussion on this >>>> here: >>>> https://lore.kernel.org/all/5752f039-51c1-4452-b5df-03ff06da7be3@linaro.org/ >>>> >>>> Reading the "Data source filtering" section in the docs change at the end >>>> might help too. >>> >>> Sorry, but I still don't get it :/ >>> >>> afaict, if any of the bits in 'data_src_filter' are _zero_ then we >>> should set PMSFCR_EL1.FDS. That also means that a mask of zero means all >>> loads are filtered, which is what the architecture says and is what we >>> should provide to userspace. >>> >>> Will >> >> We'd have to add another format flag to enable data source filtering then, >> because otherwise the default would be zero and people's samples would >> disappear. >> >> But the only use cases I could think of were more like "I want to see >> samples from data source 1": >> >> -e arm_spe/data_src_filter=0x1/ >> >> Or "I want to see all data sources except 1": >> >> -e arm_spe/data_src_filter=0xfffffffe/ >> >> Filtering out all samples with any data source didn't seem to make sense to >> me, and I think you can already do that with the other filters (remove loads >> etc). >> >> It would be a shame to be inconsistent and to add an enable flag just for >> that one case because the other filters in SPE are auto enabled for non-zero >> values. Although to be fair for PMSFCR.FT and others, zero filters are >> explicitly not allowed: >> >> If this field is set to 1 and the PMSFCR_EL1.{ST, LD, B} bits are all >> set to zero, it is CONSTRAINED UNPREDICTABLE whether no samples are >> recorded or the PE behaves as if PMSFCR_EL1.FT is set to 0 >> >> Seems like FDS doesn't end up as neat as the others, but IMO I can't see >> anyone needing a zero filter. I did discuss it with Leo and we decided that >> we could always add the enable flag at a later date if a use case turned up >> and it wouldn't be a breaking change. >> >> But if you think it's there so it should be exposed I can add it. > > What about if we expose the inverse of PMSDSFR_EL1 to userspace instead? > > Will That's exactly what I was thinking. It does seem a bit weird, but I can call it inv_data_src_filter and document it appropriately so it should be fine.