[PATCH v1 0/4] Add eDP support for RK3576

[PATCH v1 0/4] Add eDP support for RK3576

[Damon Ding]

These patchs have been tested with a 1536x2048p60 eDP panel on
RK3576 EVB1 board (hardware modified specially).

Patch 1~2 are to add the RK3576 eDP node.
Patch 3~4 are to support the RK3576 Analogix DP controller.

Damon Ding (4):
  dt-bindings: display: rockchip: analogix-dp: Add support for RK3576
  arm64: dts: rockchip: Add eDP node for RK3576
  drm/bridge: analogix_dp: Add support for RK3576
  drm/rockchip: analogix_dp: Add support for RK3576

 .../rockchip/rockchip,analogix-dp.yaml        |  6 +++-
 arch/arm64/boot/dts/rockchip/rk3576.dtsi      | 28 +++++++++++++++++++
 .../drm/bridge/analogix/analogix_dp_core.c    |  1 +
 .../gpu/drm/rockchip/analogix_dp-rockchip.c   | 15 ++++++++++
 include/drm/bridge/analogix_dp.h              |  3 +-
 5 files changed, 51 insertions(+), 2 deletions(-)

-- 
2.34.1

[PATCH v1 1/4] dt-bindings: display: rockchip: analogix-dp: Add support for RK3576

[Damon Ding]

The eDP TX controller on RK3576 is the same as that on RK3588.

The newly added clock 'hclk' is the video datapath clock.

Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
---
 .../bindings/display/rockchip/rockchip,analogix-dp.yaml     | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml
index d99b23b88cc5..4496a43881f9 100644
--- a/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml
+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml
@@ -15,6 +15,7 @@ properties:
     enum:
       - rockchip,rk3288-dp
       - rockchip,rk3399-edp
+      - rockchip,rk3576-edp
       - rockchip,rk3588-edp
 
   clocks:
@@ -26,7 +27,9 @@ properties:
     items:
       - const: dp
       - const: pclk
-      - const: grf
+      - enum:
+          - grf
+          - hclk
 
   power-domains:
     maxItems: 1
@@ -65,6 +68,7 @@ allOf:
         compatible:
           contains:
             enum:
+              - rockchip,rk3576-edp
               - rockchip,rk3588-edp
     then:
       properties:
-- 
2.34.1

Re: [PATCH v1 1/4] dt-bindings: display: rockchip: analogix-dp: Add support for RK3576

[Krzysztof Kozlowski]

On Tue, Mar 10, 2026 at 06:53:04PM +0800, Damon Ding wrote:
> The eDP TX controller on RK3576 is the same as that on RK3588.
> 
> The newly added clock 'hclk' is the video datapath clock.
> 
> Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
> ---
>  .../bindings/display/rockchip/rockchip,analogix-dp.yaml     | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml
> index d99b23b88cc5..4496a43881f9 100644
> --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml
> +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml
> @@ -15,6 +15,7 @@ properties:
>      enum:
>        - rockchip,rk3288-dp
>        - rockchip,rk3399-edp
> +      - rockchip,rk3576-edp
>        - rockchip,rk3588-edp
>  
>    clocks:
> @@ -26,7 +27,9 @@ properties:
>      items:
>        - const: dp
>        - const: pclk
> -      - const: grf
> +      - enum:
> +          - grf
> +          - hclk

And why it is not the same clock? Nothing in commit msg explains why
this clock input (not output!) is different.

Best regards,
Krzysztof

Re: [PATCH v1 1/4] dt-bindings: display: rockchip: analogix-dp: Add support for RK3576

[Damon Ding]

Hi Krzysztof,

On 3/11/2026 9:01 PM, Krzysztof Kozlowski wrote:
> On Tue, Mar 10, 2026 at 06:53:04PM +0800, Damon Ding wrote:
>> The eDP TX controller on RK3576 is the same as that on RK3588.
>>
>> The newly added clock 'hclk' is the video datapath clock.
>>
>> Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
>> ---
>>   .../bindings/display/rockchip/rockchip,analogix-dp.yaml     | 6 +++++-
>>   1 file changed, 5 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml
>> index d99b23b88cc5..4496a43881f9 100644
>> --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml
>> +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml
>> @@ -15,6 +15,7 @@ properties:
>>       enum:
>>         - rockchip,rk3288-dp
>>         - rockchip,rk3399-edp
>> +      - rockchip,rk3576-edp
>>         - rockchip,rk3588-edp
>>   
>>     clocks:
>> @@ -26,7 +27,9 @@ properties:
>>       items:
>>         - const: dp
>>         - const: pclk
>> -      - const: grf
>> +      - enum:
>> +          - grf
>> +          - hclk
> 
> And why it is not the same clock? Nothing in commit msg explains why
> this clock input (not output!) is different.
> 

After checking the CRU design for both platforms, I confirm that both 
require this HCLK.

The RK3588 platform works without explicitly adding this clock because 
the 'rockchip,vo-grf = <&vo1_grf>' property implicitly enables hclk_vo1.

For v2, it should be better to add the corresponding HCLK reference to 
the eDP nodes in the RK3588 DTS.

Best regards,
Damon

[PATCH v1 2/4] arm64: dts: rockchip: Add eDP node for RK3576

[Damon Ding]

Add support for the eDP output on RK3576 SoC.

Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3576.dtsi | 28 ++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
index a86fc6b4e8c4..14900a66d3e1 100644
--- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
@@ -1446,6 +1446,34 @@ hdmi_out: port@1 {
 			};
 		};
 
+		edp: edp@27dc0000 {
+			compatible = "rockchip,rk3576-edp";
+			reg = <0x0 0x27dc0000 0x0 0x1000>;
+			clocks = <&cru CLK_EDP0_24M>, <&cru PCLK_EDP0>, <&cru HCLK_VO0_ROOT>;
+			clock-names = "dp", "pclk", "hclk";
+			interrupts = <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>;
+			phys = <&hdptxphy>;
+			phy-names = "dp";
+			power-domains = <&power RK3576_PD_VO0>;
+			resets = <&cru SRST_EDP0_24M>, <&cru SRST_P_EDP0>;
+			reset-names = "dp", "apb";
+			rockchip,grf = <&vo0_grf>;
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				edp_in: port@0 {
+					reg = <0>;
+				};
+
+				edp_out: port@1 {
+					reg = <1>;
+				};
+			};
+		};
+
 		sai7: sai@27ed0000 {
 			compatible = "rockchip,rk3576-sai";
 			reg = <0x0 0x27ed0000 0x0 0x1000>;
-- 
2.34.1

Re: [PATCH v1 2/4] arm64: dts: rockchip: Add eDP node for RK3576

[Nicolas Frattaroli]

On Tuesday, 10 March 2026 11:53:05 Central European Standard Time Damon Ding wrote:
> Add support for the eDP output on RK3576 SoC.
> 
> Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
> ---
>  arch/arm64/boot/dts/rockchip/rk3576.dtsi | 28 ++++++++++++++++++++++++
>  1 file changed, 28 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
> index a86fc6b4e8c4..14900a66d3e1 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
> @@ -1446,6 +1446,34 @@ hdmi_out: port@1 {
>  			};
>  		};
>  
> +		edp: edp@27dc0000 {
> +			compatible = "rockchip,rk3576-edp";
> +			reg = <0x0 0x27dc0000 0x0 0x1000>;
> +			clocks = <&cru CLK_EDP0_24M>, <&cru PCLK_EDP0>, <&cru HCLK_VO0_ROOT>;
> +			clock-names = "dp", "pclk", "hclk";
> +			interrupts = <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>;
> +			phys = <&hdptxphy>;
> +			phy-names = "dp";
> +			power-domains = <&power RK3576_PD_VO0>;
> +			resets = <&cru SRST_EDP0_24M>, <&cru SRST_P_EDP0>;
> +			reset-names = "dp", "apb";
> +			rockchip,grf = <&vo0_grf>;
> +			status = "disabled";
> +
> +			ports {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				edp_in: port@0 {
> +					reg = <0>;
> +				};
> +
> +				edp_out: port@1 {
> +					reg = <1>;
> +				};
> +			};
> +		};
> +
>  		sai7: sai@27ed0000 {
>  			compatible = "rockchip,rk3576-sai";
>  			reg = <0x0 0x27ed0000 0x0 0x1000>;
> 

Reviewed-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>

By cross-referencing the TRM, I checked the address, the IRQ number,
and the power domain, and verified that there are no new check_dtbs
warnings introduced.

Kind regards,
Nicolas Frattaroli

Re: [PATCH v1 2/4] arm64: dts: rockchip: Add eDP node for RK3576

[Damon Ding]

Hi Nicolas,

On 3/16/2026 7:31 PM, Nicolas Frattaroli wrote:
> On Tuesday, 10 March 2026 11:53:05 Central European Standard Time Damon Ding wrote:
>> Add support for the eDP output on RK3576 SoC.
>>
>> Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
>> ---
>>   arch/arm64/boot/dts/rockchip/rk3576.dtsi | 28 ++++++++++++++++++++++++
>>   1 file changed, 28 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
>> index a86fc6b4e8c4..14900a66d3e1 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
>> @@ -1446,6 +1446,34 @@ hdmi_out: port@1 {
>>   			};
>>   		};
>>   
>> +		edp: edp@27dc0000 {
>> +			compatible = "rockchip,rk3576-edp";
>> +			reg = <0x0 0x27dc0000 0x0 0x1000>;
>> +			clocks = <&cru CLK_EDP0_24M>, <&cru PCLK_EDP0>, <&cru HCLK_VO0_ROOT>;
>> +			clock-names = "dp", "pclk", "hclk";
>> +			interrupts = <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>;
>> +			phys = <&hdptxphy>;
>> +			phy-names = "dp";
>> +			power-domains = <&power RK3576_PD_VO0>;
>> +			resets = <&cru SRST_EDP0_24M>, <&cru SRST_P_EDP0>;
>> +			reset-names = "dp", "apb";
>> +			rockchip,grf = <&vo0_grf>;
>> +			status = "disabled";
>> +
>> +			ports {
>> +				#address-cells = <1>;
>> +				#size-cells = <0>;
>> +
>> +				edp_in: port@0 {
>> +					reg = <0>;
>> +				};
>> +
>> +				edp_out: port@1 {
>> +					reg = <1>;
>> +				};
>> +			};
>> +		};
>> +
>>   		sai7: sai@27ed0000 {
>>   			compatible = "rockchip,rk3576-sai";
>>   			reg = <0x0 0x27ed0000 0x0 0x1000>;
>>
> 
> Reviewed-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> 
> By cross-referencing the TRM, I checked the address, the IRQ number,
> and the power domain, and verified that there are no new check_dtbs
> warnings introduced.
> 
> 

Thanks for the review.

Best regards,
Damon

[PATCH v1 3/4] drm/bridge: analogix_dp: Add support for RK3576

[Damon Ding]

Expand enum analogix_dp_devtype with RK3576_EDP, and add max_link_rate
and max_lane_count configs for it.

Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 1 +
 include/drm/bridge/analogix_dp.h                   | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index fe7158d9edde..c4e49e8186ab 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -1248,6 +1248,7 @@ static int analogix_dp_dt_parse_pdata(struct analogix_dp_device *dp)
 		video_info->max_link_rate = 0x0A;
 		video_info->max_lane_count = 0x04;
 		break;
+	case RK3576_EDP:
 	case RK3588_EDP:
 		video_info->max_link_rate = 0x14;
 		video_info->max_lane_count = 0x04;
diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
index 854af692229b..d1a6e6d44a2b 100644
--- a/include/drm/bridge/analogix_dp.h
+++ b/include/drm/bridge/analogix_dp.h
@@ -16,12 +16,13 @@ enum analogix_dp_devtype {
 	EXYNOS_DP,
 	RK3288_DP,
 	RK3399_EDP,
+	RK3576_EDP,
 	RK3588_EDP,
 };
 
 static inline bool is_rockchip(enum analogix_dp_devtype type)
 {
-	return type == RK3288_DP || type == RK3399_EDP || type == RK3588_EDP;
+	return type == RK3288_DP || type == RK3399_EDP || type == RK3576_EDP || type == RK3588_EDP;
 }
 
 struct analogix_dp_plat_data {
-- 
2.34.1

Re: [PATCH v1 3/4] drm/bridge: analogix_dp: Add support for RK3576

[Nicolas Frattaroli]

On Tuesday, 10 March 2026 11:53:06 Central European Standard Time Damon Ding wrote:
> Expand enum analogix_dp_devtype with RK3576_EDP, and add max_link_rate
> and max_lane_count configs for it.
> 
> Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
> ---
>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 1 +
>  include/drm/bridge/analogix_dp.h                   | 3 ++-
>  2 files changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> index fe7158d9edde..c4e49e8186ab 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> @@ -1248,6 +1248,7 @@ static int analogix_dp_dt_parse_pdata(struct analogix_dp_device *dp)
>  		video_info->max_link_rate = 0x0A;
>  		video_info->max_lane_count = 0x04;
>  		break;
> +	case RK3576_EDP:
>  	case RK3588_EDP:
>  		video_info->max_link_rate = 0x14;
>  		video_info->max_lane_count = 0x04;
> diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
> index 854af692229b..d1a6e6d44a2b 100644
> --- a/include/drm/bridge/analogix_dp.h
> +++ b/include/drm/bridge/analogix_dp.h
> @@ -16,12 +16,13 @@ enum analogix_dp_devtype {
>  	EXYNOS_DP,
>  	RK3288_DP,
>  	RK3399_EDP,
> +	RK3576_EDP,
>  	RK3588_EDP,
>  };
>  
>  static inline bool is_rockchip(enum analogix_dp_devtype type)
>  {
> -	return type == RK3288_DP || type == RK3399_EDP || type == RK3588_EDP;
> +	return type == RK3288_DP || type == RK3399_EDP || type == RK3576_EDP || type == RK3588_EDP;

I think we can make this easier to read with a switch statement. In
a separate patch, we may also want to rename `is_rockchip` to
`analogix_dp_is_rockchip`, as e.g. rockchip_drm_vop.c and exynos_dp.c
both include his header file as well.

Switch statement would make the function look something like:

static inline bool is_rockchip(enum analogix_dp_devtype type)
{
	switch (type) {
	case RK3288_DP:
	case RK3399_EDP:
	case RK3576_EDP:
	case RK3588_EDP:
		return true;
	default:
		return false;
	}
}

Kind regards,
Nicolas Frattaroli

>  }
>  
>  struct analogix_dp_plat_data {
> 

Re: [PATCH v1 3/4] drm/bridge: analogix_dp: Add support for RK3576

[Damon Ding]

Hi Nicolas,

On 3/16/2026 7:14 PM, Nicolas Frattaroli wrote:
> On Tuesday, 10 March 2026 11:53:06 Central European Standard Time Damon Ding wrote:
>> Expand enum analogix_dp_devtype with RK3576_EDP, and add max_link_rate
>> and max_lane_count configs for it.
>>
>> Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
>> ---
>>   drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 1 +
>>   include/drm/bridge/analogix_dp.h                   | 3 ++-
>>   2 files changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>> index fe7158d9edde..c4e49e8186ab 100644
>> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>> @@ -1248,6 +1248,7 @@ static int analogix_dp_dt_parse_pdata(struct analogix_dp_device *dp)
>>   		video_info->max_link_rate = 0x0A;
>>   		video_info->max_lane_count = 0x04;
>>   		break;
>> +	case RK3576_EDP:
>>   	case RK3588_EDP:
>>   		video_info->max_link_rate = 0x14;
>>   		video_info->max_lane_count = 0x04;
>> diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
>> index 854af692229b..d1a6e6d44a2b 100644
>> --- a/include/drm/bridge/analogix_dp.h
>> +++ b/include/drm/bridge/analogix_dp.h
>> @@ -16,12 +16,13 @@ enum analogix_dp_devtype {
>>   	EXYNOS_DP,
>>   	RK3288_DP,
>>   	RK3399_EDP,
>> +	RK3576_EDP,
>>   	RK3588_EDP,
>>   };
>>   
>>   static inline bool is_rockchip(enum analogix_dp_devtype type)
>>   {
>> -	return type == RK3288_DP || type == RK3399_EDP || type == RK3588_EDP;
>> +	return type == RK3288_DP || type == RK3399_EDP || type == RK3576_EDP || type == RK3588_EDP;
> 
> I think we can make this easier to read with a switch statement. In
> a separate patch, we may also want to rename `is_rockchip` to
> `analogix_dp_is_rockchip`, as e.g. rockchip_drm_vop.c and exynos_dp.c
> both include his header file as well.
> 
> Switch statement would make the function look something like:
> 
> static inline bool is_rockchip(enum analogix_dp_devtype type)
> {
> 	switch (type) {
> 	case RK3288_DP:
> 	case RK3399_EDP:
> 	case RK3576_EDP:
> 	case RK3588_EDP:
> 		return true;
> 	default:
> 		return false;
> 	}
> }
> 

Good idea, will do in v2. :-)

Best regards,
Damon

[PATCH v1 4/4] drm/rockchip: analogix_dp: Add support for RK3576

[Damon Ding]

RK3576 integrates the Analogix eDP 1.3 TX controller IP and the HDMI/eDP
TX Combo PHY based on a Samsung IP block - both of which are the same as
those on RK3588.

The patch currently adds only the basic support, specifically RGB output
up to 4K@60Hz, without the tests for audio, PSR and other eDP 1.3 specific
features.

In additon, the newly added clock 'hclk' is the video datapath clock,
which must be enabled during probing for RK3576 eDP controller.

Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
---
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 832e9766bef0..4f8511636cdf 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -71,6 +71,7 @@ struct rockchip_dp_device {
 
 	struct clk               *pclk;
 	struct clk               *grfclk;
+	struct clk               *hclk;
 	struct regmap            *grf;
 	struct reset_control     *rst;
 	struct reset_control     *apbrst;
@@ -327,6 +328,11 @@ static int rockchip_dp_of_probe(struct rockchip_dp_device *dp)
 		return dev_err_probe(dev, PTR_ERR(dp->pclk),
 				     "failed to get pclk property\n");
 
+	dp->hclk = devm_clk_get_optional_enabled(dev, "hclk");
+	if (IS_ERR(dp->hclk))
+		return dev_err_probe(dev, PTR_ERR(dp->hclk),
+				     "failed to get hclk property\n");
+
 	dp->rst = devm_reset_control_get(dev, "dp");
 	if (IS_ERR(dp->rst))
 		return dev_err_probe(dev, PTR_ERR(dp->rst),
@@ -514,6 +520,14 @@ static const struct rockchip_dp_chip_data rk3288_dp[] = {
 	{ /* sentinel */ }
 };
 
+static const struct rockchip_dp_chip_data rk3576_edp[] = {
+	{
+		.chip_type = RK3576_EDP,
+		.reg = 0x27dc0000,
+	},
+	{ /* sentinel */ }
+};
+
 static const struct rockchip_dp_chip_data rk3588_edp[] = {
 	{
 		.edp_mode = GRF_REG_FIELD(0x0000, 0, 0),
@@ -531,6 +545,7 @@ static const struct rockchip_dp_chip_data rk3588_edp[] = {
 static const struct of_device_id rockchip_dp_dt_ids[] = {
 	{.compatible = "rockchip,rk3288-dp", .data = &rk3288_dp },
 	{.compatible = "rockchip,rk3399-edp", .data = &rk3399_edp },
+	{.compatible = "rockchip,rk3576-edp", .data = &rk3576_edp },
 	{.compatible = "rockchip,rk3588-edp", .data = &rk3588_edp },
 	{}
 };
-- 
2.34.1

Re: [PATCH v1 4/4] drm/rockchip: analogix_dp: Add support for RK3576

[Nicolas Frattaroli]

On Tuesday, 10 March 2026 11:53:07 Central European Standard Time Damon Ding wrote:
> RK3576 integrates the Analogix eDP 1.3 TX controller IP and the HDMI/eDP
> TX Combo PHY based on a Samsung IP block - both of which are the same as
> those on RK3588.
> 
> The patch currently adds only the basic support, specifically RGB output
> up to 4K@60Hz, without the tests for audio, PSR and other eDP 1.3 specific
> features.
> 
> In additon, the newly added clock 'hclk' is the video datapath clock,
> which must be enabled during probing for RK3576 eDP controller.
> 
> Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
> ---
>  drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> index 832e9766bef0..4f8511636cdf 100644
> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> @@ -71,6 +71,7 @@ struct rockchip_dp_device {
>  
>  	struct clk               *pclk;
>  	struct clk               *grfclk;
> +	struct clk               *hclk;
>  	struct regmap            *grf;
>  	struct reset_control     *rst;
>  	struct reset_control     *apbrst;
> @@ -327,6 +328,11 @@ static int rockchip_dp_of_probe(struct rockchip_dp_device *dp)
>  		return dev_err_probe(dev, PTR_ERR(dp->pclk),
>  				     "failed to get pclk property\n");
>  
> +	dp->hclk = devm_clk_get_optional_enabled(dev, "hclk");
> +	if (IS_ERR(dp->hclk))
> +		return dev_err_probe(dev, PTR_ERR(dp->hclk),
> +				     "failed to get hclk property\n");
> +
>  	dp->rst = devm_reset_control_get(dev, "dp");
>  	if (IS_ERR(dp->rst))
>  		return dev_err_probe(dev, PTR_ERR(dp->rst),
> @@ -514,6 +520,14 @@ static const struct rockchip_dp_chip_data rk3288_dp[] = {
>  	{ /* sentinel */ }
>  };
>  
> +static const struct rockchip_dp_chip_data rk3576_edp[] = {
> +	{
> +		.chip_type = RK3576_EDP,
> +		.reg = 0x27dc0000,
> +	},
> +	{ /* sentinel */ }
> +};
> +
>  static const struct rockchip_dp_chip_data rk3588_edp[] = {
>  	{
>  		.edp_mode = GRF_REG_FIELD(0x0000, 0, 0),
> @@ -531,6 +545,7 @@ static const struct rockchip_dp_chip_data rk3588_edp[] = {
>  static const struct of_device_id rockchip_dp_dt_ids[] = {
>  	{.compatible = "rockchip,rk3288-dp", .data = &rk3288_dp },
>  	{.compatible = "rockchip,rk3399-edp", .data = &rk3399_edp },
> +	{.compatible = "rockchip,rk3576-edp", .data = &rk3576_edp },
>  	{.compatible = "rockchip,rk3588-edp", .data = &rk3588_edp },
>  	{}
>  };
> 

Reviewed-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>

Kind regards,
Nicolas Frattaroli

Re: [PATCH v1 0/4] Add eDP support for RK3576

[Damon Ding]

[-- Attachment #1: Type: text/plain, Size: 964 bytes --]

On 3/10/2026 6:53 PM, Damon Ding wrote:
> These patchs have been tested with a 1536x2048p60 eDP panel on
> RK3576 EVB1 board (hardware modified specially).

The DTS changes are attached as an attachment.

> 
> Patch 1~2 are to add the RK3576 eDP node.
> Patch 3~4 are to support the RK3576 Analogix DP controller.
> 
> Damon Ding (4):
>    dt-bindings: display: rockchip: analogix-dp: Add support for RK3576
>    arm64: dts: rockchip: Add eDP node for RK3576
>    drm/bridge: analogix_dp: Add support for RK3576
>    drm/rockchip: analogix_dp: Add support for RK3576
> 
>   .../rockchip/rockchip,analogix-dp.yaml        |  6 +++-
>   arch/arm64/boot/dts/rockchip/rk3576.dtsi      | 28 +++++++++++++++++++
>   .../drm/bridge/analogix/analogix_dp_core.c    |  1 +
>   .../gpu/drm/rockchip/analogix_dp-rockchip.c   | 15 ++++++++++
>   include/drm/bridge/analogix_dp.h              |  3 +-
>   5 files changed, 51 insertions(+), 2 deletions(-)
> 

Best regards,
Damon

[-- Attachment #2: 0001-Test-only-arm64-dts-rockchip-Enable-eDP-display-on-R.patch --]
[-- Type: text/plain, Size: 3034 bytes --]

From f4c8fe96b9731a4c1eb6321cde2449a15f5d6050 Mon Sep 17 00:00:00 2001
From: Damon Ding <damon.ding@rock-chips.com>
Date: Tue, 10 Mar 2026 18:15:57 +0800
Subject: [PATCH] [Test-only]arm64: dts: rockchip: Enable eDP display on RK3576
 EVB1 board

Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
---
 .../boot/dts/rockchip/rk3576-evb1-v10.dts     | 79 +++++++++++++------
 1 file changed, 57 insertions(+), 22 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts
index db8fef7a4f1b..c16325266d09 100644
--- a/arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts
@@ -22,8 +22,15 @@ aliases {
 		ethernet1 = &gmac1;
 	};
 
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		power-supply = <&vcc3v3_lcd_n>;
+		pwms = <&gpio_pwm0 0 25000 0>;
+	};
+
 	chosen: chosen {
 		stdout-path = "serial0:1500000n8";
+		bootargs = "root=PARTUUID=614e0000-0000 rootwait";
 	};
 
 	adc_keys: adc-keys {
@@ -61,12 +68,6 @@ button-vol-up {
 	hdmi-con {
 		compatible = "hdmi-connector";
 		type = "a";
-
-		port {
-			hdmi_con_in: endpoint {
-				remote-endpoint = <&hdmi_out_con>;
-			};
-		};
 	};
 
 	leds: leds {
@@ -78,6 +79,14 @@ work_led: led-0 {
 		};
 	};
 
+	gpio_pwm0: gpio-pwm0 {
+		compatible = "pwm-gpio";
+		gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
+		pinctrl-0 = <&gpio_pwm0_pin>;
+		pinctrl-names = "default";
+		#pwm-cells = <3>;
+	};
+
 	vbus5v0_typec: regulator-vbus5v0-typec {
 		compatible = "regulator-fixed";
 		regulator-name = "vbus5v0_typec";
@@ -264,6 +273,38 @@ &combphy1_psu {
 	status = "okay";
 };
 
+&edp {
+	force-hpd;
+	status = "okay";
+
+	aux-bus {
+		panel {
+			compatible = "edp-panel";
+			backlight = <&backlight>;
+			power-supply = <&vcc3v3_lcd_n>;
+			no-hpd;
+
+			port {
+				panel_in_edp: endpoint {
+					remote-endpoint = <&edp_out_panel>;
+				};
+			};
+		};
+	};
+};
+
+&edp_in {
+	edp_in_vp0: endpoint {
+		remote-endpoint = <&vp0_out_edp>;
+	};
+};
+
+&edp_out {
+	edp_out_panel: endpoint {
+		remote-endpoint = <&panel_in_edp>;
+	};
+};
+
 &gmac0 {
 	clock_in_out = "output";
 	phy-mode = "rgmii-rxid";
@@ -300,19 +341,7 @@ &gpu {
 };
 
 &hdmi {
-	status = "okay";
-};
-
-&hdmi_in {
-	hdmi_in_vp0: endpoint {
-		remote-endpoint = <&vp0_out_hdmi>;
-	};
-};
-
-&hdmi_out {
-	hdmi_out_con: endpoint {
-		remote-endpoint = <&hdmi_con_in>;
-	};
+	status = "disabled";
 };
 
 &hdptxphy {
@@ -774,6 +803,12 @@ &pcie1 {
 };
 
 &pinctrl {
+	gpio_pwm0 {
+		gpio_pwm0_pin: gpio-pwm0-pin {
+			rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>;
+		};
+	};
+
 	bluetooth {
 		bt_reg_on: bt-reg-on {
 			rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
@@ -936,8 +971,8 @@ &vop_mmu {
 };
 
 &vp0 {
-	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
-		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
-		remote-endpoint = <&hdmi_in_vp0>;
+	vp0_out_edp: endpoint@ROCKCHIP_VOP2_EP_EDP0 {
+		reg = <ROCKCHIP_VOP2_EP_EDP0>;
+		remote-endpoint = <&edp_in_vp0>;
 	};
 };
-- 
2.34.1