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From: claudiu beznea <claudiu.beznea@tuxon.dev>
To: Ryan.Wanner@microchip.com, mturquette@baylibre.com,
	sboyd@kernel.org, nicolas.ferre@microchip.com,
	alexandre.belloni@bootlin.com
Cc: varshini.rajendran@microchip.com, linux-clk@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, robh@kernel.org
Subject: Re: [PATCH v3 08/32] clk: at91: clk-master: use clk_parent_data
Date: Sat, 6 Sep 2025 21:36:22 +0300	[thread overview]
Message-ID: <95e19f49-d0df-4d3f-bd7d-8b58b60f1f7a@tuxon.dev> (raw)
In-Reply-To: <4b404eaaab4062464a4142e95aaa76d5cba866f0.1752176711.git.Ryan.Wanner@microchip.com>



On 7/10/25 23:07, Ryan.Wanner@microchip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
> 
> Use struct clk_parent_data instead of struct parent_hw as this leads
> to less usage of __clk_get_hw() in SoC specific clock drivers and simpler
> conversion of existing SoC specific clock drivers from parent_names to
> modern clk_parent_data structures.
> 
> The md_slck name and index are added for the SAM9X75 SoC so the
> clk-master can properly use parent_data.
> 
> Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
> [ryan.wanner@microchip.com: Add clk-master changes to SAM9X75 and
> SAMA7D65 SoCs. As well as add md_slck commit message.]
> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
> ---
>   drivers/clk/at91/clk-master.c | 24 ++++++++++++------------
>   drivers/clk/at91/pmc.h        |  6 +++---
>   drivers/clk/at91/sam9x7.c     | 19 ++++++++++---------
>   drivers/clk/at91/sama7d65.c   | 23 ++++++++++-------------
>   drivers/clk/at91/sama7g5.c    | 29 +++++++++++++----------------
>   5 files changed, 48 insertions(+), 53 deletions(-)
> 
> diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c
> index 7a544e429d34..cc4f3beb51e5 100644
> --- a/drivers/clk/at91/clk-master.c
> +++ b/drivers/clk/at91/clk-master.c
> @@ -473,7 +473,7 @@ static struct clk_hw * __init
>   at91_clk_register_master_internal(struct regmap *regmap,
>   		const char *name, int num_parents,
>   		const char **parent_names,
> -		struct clk_hw **parent_hws,
> +		struct clk_parent_data *parent_data,
>   		const struct clk_master_layout *layout,
>   		const struct clk_master_characteristics *characteristics,
>   		const struct clk_ops *ops, spinlock_t *lock, u32 flags)
> @@ -485,7 +485,7 @@ at91_clk_register_master_internal(struct regmap *regmap,
>   	unsigned long irqflags;
>   	int ret;
>   
> -	if (!name || !num_parents || !(parent_names || parent_hws) || !lock)
> +	if (!name || !num_parents || !(parent_names || parent_data) || !lock)
>   		return ERR_PTR(-EINVAL);
>   
>   	master = kzalloc(sizeof(*master), GFP_KERNEL);
> @@ -494,8 +494,8 @@ at91_clk_register_master_internal(struct regmap *regmap,
>   
>   	init.name = name;
>   	init.ops = ops;
> -	if (parent_hws)
> -		init.parent_hws = (const struct clk_hw **)parent_hws;
> +	if (parent_data)
> +		init.parent_data = (const struct clk_parent_data *)parent_data;
>   	else
>   		init.parent_names = parent_names;
>   	init.num_parents = num_parents;
> @@ -531,13 +531,13 @@ struct clk_hw * __init
>   at91_clk_register_master_pres(struct regmap *regmap,
>   		const char *name, int num_parents,
>   		const char **parent_names,
> -		struct clk_hw **parent_hws,
> +		struct clk_parent_data *parent_data,
>   		const struct clk_master_layout *layout,
>   		const struct clk_master_characteristics *characteristics,
>   		spinlock_t *lock)
>   {
>   	return at91_clk_register_master_internal(regmap, name, num_parents,
> -						 parent_names, parent_hws, layout,
> +						 parent_names, parent_data, layout,
>   						 characteristics,
>   						 &master_pres_ops,
>   						 lock, CLK_SET_RATE_GATE);
> @@ -546,7 +546,7 @@ at91_clk_register_master_pres(struct regmap *regmap,
>   struct clk_hw * __init
>   at91_clk_register_master_div(struct regmap *regmap,
>   		const char *name, const char *parent_name,
> -		struct clk_hw *parent_hw, const struct clk_master_layout *layout,
> +		struct clk_parent_data *parent_data, const struct clk_master_layout *layout,
>   		const struct clk_master_characteristics *characteristics,
>   		spinlock_t *lock, u32 flags, u32 safe_div)
>   {
> @@ -560,7 +560,7 @@ at91_clk_register_master_div(struct regmap *regmap,
>   
>   	hw = at91_clk_register_master_internal(regmap, name, 1,
>   					       parent_name ? &parent_name : NULL,
> -					       parent_hw ? &parent_hw : NULL, layout,
> +					       parent_data, layout,
>   					       characteristics, ops,
>   					       lock, flags);
>   
> @@ -812,7 +812,7 @@ struct clk_hw * __init
>   at91_clk_sama7g5_register_master(struct regmap *regmap,
>   				 const char *name, int num_parents,
>   				 const char **parent_names,
> -				 struct clk_hw **parent_hws,
> +				 struct clk_parent_data *parent_data,
>   				 u32 *mux_table,
>   				 spinlock_t *lock, u8 id,
>   				 bool critical, int chg_pid)
> @@ -824,7 +824,7 @@ at91_clk_sama7g5_register_master(struct regmap *regmap,
>   	unsigned int val;
>   	int ret;
>   
> -	if (!name || !num_parents || !(parent_names || parent_hws) || !mux_table ||
> +	if (!name || !num_parents || !(parent_names || parent_data) || !mux_table ||
>   	    !lock || id > MASTER_MAX_ID)
>   		return ERR_PTR(-EINVAL);
>   
> @@ -834,8 +834,8 @@ at91_clk_sama7g5_register_master(struct regmap *regmap,
>   
>   	init.name = name;
>   	init.ops = &sama7g5_master_ops;
> -	if (parent_hws)
> -		init.parent_hws = (const struct clk_hw **)parent_hws;
> +	if (parent_data)
> +		init.parent_data = (const struct clk_parent_data *)parent_data;
>   	else
>   		init.parent_names = parent_names;
>   	init.num_parents = num_parents;
> diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
> index d9a04fddb0b1..54d472276fc9 100644
> --- a/drivers/clk/at91/pmc.h
> +++ b/drivers/clk/at91/pmc.h
> @@ -204,14 +204,14 @@ at91_clk_register_sam9x5_main(struct regmap *regmap, const char *name,
>   struct clk_hw * __init
>   at91_clk_register_master_pres(struct regmap *regmap, const char *name,
>   			      int num_parents, const char **parent_names,
> -			      struct clk_hw **parent_hws,
> +			      struct clk_parent_data *parent_data,
>   			      const struct clk_master_layout *layout,
>   			      const struct clk_master_characteristics *characteristics,
>   			      spinlock_t *lock);
>   
>   struct clk_hw * __init
>   at91_clk_register_master_div(struct regmap *regmap, const char *name,
> -			     const char *parent_names, struct clk_hw *parent_hw,
> +			     const char *parent_names, struct clk_parent_data *parent_data,
>   			     const struct clk_master_layout *layout,
>   			     const struct clk_master_characteristics *characteristics,
>   			     spinlock_t *lock, u32 flags, u32 safe_div);
> @@ -220,7 +220,7 @@ struct clk_hw * __init
>   at91_clk_sama7g5_register_master(struct regmap *regmap,
>   				 const char *name, int num_parents,
>   				 const char **parent_names,
> -				 struct clk_hw **parent_hws, u32 *mux_table,
> +				 struct clk_parent_data *parent_data, u32 *mux_table,
>   				 spinlock_t *lock, u8 id, bool critical,
>   				 int chg_pid);
>   
> diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c
> index eaae05ba21ad..945983f72140 100644
> --- a/drivers/clk/at91/sam9x7.c
> +++ b/drivers/clk/at91/sam9x7.c
> @@ -739,7 +739,8 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
>   {
>   	struct clk_range range = CLK_RANGE(0, 0);
>   	const char *main_xtal_name = "main_xtal";
> -	u8 main_xtal_index = 2;
> +	const char *const md_slck_name = "md_slck";
> +	u8 md_slck_index = 1, main_xtal_index = 2;
>   	struct pmc_data *sam9x7_pmc;
>   	const char *parent_names[9];
>   	void **clk_mux_buffer = NULL;
> @@ -747,12 +748,12 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
>   	struct regmap *regmap;
>   	struct clk_hw *hw, *main_rc_hw, *main_osc_hw, *main_xtal_hw;
>   	struct clk_hw *td_slck_hw, *md_slck_hw, *usbck_hw;
> -	struct clk_parent_data parent_data[2];
> +	struct clk_parent_data parent_data[9];
>   	struct clk_hw *parent_hws[9];
>   	int i, j;
>   
>   	td_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "td_slck"));
> -	md_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "md_slck"));
> +	md_slck_hw = __clk_get_hw(of_clk_get_by_name(np, md_slck_name));

Please use:

i = of_property_match_string(np, "clock-names", "md_slck");
if (i < 0)
    return;

md_slck_name = of_clk_get_parent_name(np, i);

Same sama7d65, sama7g5.

>   	main_xtal_hw = __clk_get_hw(of_clk_get_by_name(np, main_xtal_name));
>   
>   	if (!td_slck_hw || !md_slck_hw || !main_xtal_hw)
> @@ -853,18 +854,18 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
>   		}
>   	}
>   
> -	parent_hws[0] = md_slck_hw;
> -	parent_hws[1] = sam9x7_pmc->chws[PMC_MAIN];
> -	parent_hws[2] = sam9x7_plls[PLL_ID_PLLA][PLL_COMPID_DIV0].hw;
> -	parent_hws[3] = sam9x7_plls[PLL_ID_UPLL][PLL_COMPID_DIV0].hw;
> +	parent_data[0] = AT91_CLK_PD_NAME(md_slck_name, md_slck_index);

AT91_CLK_PD_NAME(md_slck_name);

Same sama7d65, sama7g5.



  reply	other threads:[~2025-09-06 18:54 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-10 20:06 [PATCH v3 00/32] clk: at91: add support for parent_data and Ryan.Wanner
2025-07-10 20:06 ` [PATCH v3 01/32] clk: at91: pmc: add macros for clk_parent_data Ryan.Wanner
2025-08-28 16:52   ` Brian Masney
2025-09-06 18:33   ` claudiu beznea
2025-07-10 20:06 ` [PATCH v3 02/32] clk: at91: pmc: Move macro to header file Ryan.Wanner
2025-08-28 16:53   ` Brian Masney
2025-07-10 20:06 ` [PATCH v3 03/32] clk: at91: sam9x75: switch to parent_hw and parent_data Ryan.Wanner
2025-08-28 17:38   ` Brian Masney
2025-09-06 18:33   ` Claudiu Beznea
2025-07-10 20:06 ` [PATCH v3 04/32] clk: at91: clk-sam9x60-pll: use clk_parent_data Ryan.Wanner
2025-08-28 17:04   ` Brian Masney
2025-09-06 18:34   ` claudiu beznea
2025-07-10 20:06 ` [PATCH v3 05/32] clk: at91: clk-peripheral: switch to clk_parent_data Ryan.Wanner
2025-09-06 18:34   ` claudiu beznea
2025-07-10 20:06 ` [PATCH v3 06/32] clk: at91: clk-main: switch to clk parent data Ryan.Wanner
2025-09-06 18:35   ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 07/32] clk: at91: clk-utmi: use clk_parent_data Ryan.Wanner
2025-09-06 18:36   ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 08/32] clk: at91: clk-master: " Ryan.Wanner
2025-09-06 18:36   ` claudiu beznea [this message]
2025-07-10 20:07 ` [PATCH v3 09/32] clk: at91: clk-programmable: " Ryan.Wanner
2025-09-06 18:36   ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 10/32] clk: at91: clk-generated: " Ryan.Wanner
2025-09-06 18:37   ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 11/32] clk: at91: clk-usb: add support for clk_parent_data Ryan.Wanner
2025-09-06 18:37   ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 12/32] clk: at91: clk-system: use clk_parent_data Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 13/32] clk: at91: sama7d65: switch to parent_hw and parent_data Ryan.Wanner
2025-09-06 18:39   ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 14/32] clk: at91: clk-pll: add support for parent_hw Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 15/32] clk: at91: clk-audio-pll: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 16/32] clk: at91: clk-plldiv: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 17/32] clk: at91: clk-h32mx: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 18/32] clk: at91: clk-i2s-mux: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 19/32] clk: at91: clk-smd: add support for clk_parent_data Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 20/32] clk: at91: clk-slow: add support for parent_hw Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 21/32] clk: at91: dt-compat: switch to parent_hw and parent_data Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 22/32] clk: at91: sam9x60: " Ryan.Wanner
2025-09-06 18:46   ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 23/32] clk: at91: sama5d2: " Ryan.Wanner
2025-09-06 18:48   ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 24/32] clk: at91: sama5d3: " Ryan.Wanner
2025-09-06 18:49   ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 25/32] clk: at91: sama5d4: " Ryan.Wanner
2025-09-06 18:51   ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 26/32] clk: at91: at91sam9x5: " Ryan.Wanner
     [not found]   ` <10f016fd-2ceb-40b0-a81d-9c5663f65191@tuxon.dev>
2025-09-06 18:52     ` Claudiu Beznea
2025-07-10 20:07 ` [PATCH v3 27/32] clk: at91: at91rm9200: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 28/32] clk: at91: at91sam9260: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 29/32] clk: at91: at91sam9g45: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 30/32] clk: at91: at91sam9n12: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 31/32] clk: at91: at91sam9rl: switch to clk_parent_data Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 32/32] clk: at91: sam9x7: Clean up formatting Ryan.Wanner
2025-08-27 20:31 ` [PATCH v3 00/32] clk: at91: add support for parent_data and Ryan Wanner
2025-08-28 15:51 ` Brian Masney
2025-08-28 16:16   ` Ryan Wanner
2025-08-28 16:48     ` Brian Masney
2025-08-28 20:40       ` Konstantin Ryabitsev

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