From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: "Andrew Davis" <afd@ti.com>,
"Frank Binns" <frank.binns@imgtec.com>,
"Matt Coster" <matt.coster@imgtec.com>,
"H . Nikolaus Schaller" <hns@goldelico.com>,
"Adam Ford" <aford173@gmail.com>,
"Ivaylo Dimitrov" <ivo.g.dimitrov.75@gmail.com>,
"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"Rob Herring" <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Chen-Yu Tsai" <wens@csie.org>,
"Jernej Skrabec" <jernej.skrabec@gmail.com>,
"Samuel Holland" <samuel@sholland.org>,
"Benoît Cousson" <bcousson@baylibre.com>,
"Tony Lindgren" <tony@atomide.com>, "Nishanth Menon" <nm@ti.com>,
"Vignesh Raghavendra" <vigneshr@ti.com>,
"Tero Kristo" <kristo@kernel.org>,
"Paul Cercueil" <paul@crapouillou.net>
Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-omap@vger.kernel.org,
linux-mips@vger.kernel.org
Subject: Re: [PATCH RFC v2 02/11] dt-bindings: gpu: Add PowerVR Series5 SGX GPUs
Date: Tue, 9 Jan 2024 19:58:20 +0100 [thread overview]
Message-ID: <980a51fc-c410-46c3-bcb1-b82c33a88ef3@linaro.org> (raw)
In-Reply-To: <c3664f43-431a-421f-8d2a-a3d2cc6f8777@ti.com>
On 09/01/2024 17:53, Andrew Davis wrote:
> On 1/9/24 5:32 AM, Krzysztof Kozlowski wrote:
>> On 08/01/2024 19:32, Andrew Davis wrote:
>>> The Imagination PowerVR Series5 "SGX" GPU is part of several SoCs from
>>> multiple vendors. Describe how the SGX GPU is integrated in these SoC,
>>> including register space and interrupts. Clocks, reset, and power domain
>>> information is SoC specific.
>>>
>>> Signed-off-by: Andrew Davis <afd@ti.com>
>>> ---
>>> .../bindings/gpu/img,powervr-sgx.yaml | 124 ++++++++++++++++++
>>> MAINTAINERS | 1 +
>>> 2 files changed, 125 insertions(+)
>>> create mode 100644 Documentation/devicetree/bindings/gpu/img,powervr-sgx.yaml
>>>
>>> diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-sgx.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-sgx.yaml
>>> new file mode 100644
>>> index 0000000000000..bb821e1184de9
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/gpu/img,powervr-sgx.yaml
>>> @@ -0,0 +1,124 @@
>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>> +# Copyright (c) 2023 Imagination Technologies Ltd.
>>
>> Your email has @TI domain, are you sure you attribute your copyrights to
>> Imagination?
>>
>
> The file started as a copy/paste from a IMG copyrighted file, even
> though it is now almost completely re-written I've left their (c)
> for good measure. I'll add an additional TI (c).
>
>> ...
>>
>>> +
>>> + reg:
>>> + maxItems: 1
>>> +
>>> + interrupts:
>>> + maxItems: 1
>>> +
>>> + clocks: true
>>
>> Missing min/maxItems
>>
>
> These are set in the allOf/if/then blocks below, seems
I know, but we expect them here.
https://elixir.bootlin.com/linux/v5.19-rc6/source/Documentation/devicetree/bindings/clock/samsung,exynos7-clock.yaml#L57
> if I don't set them to at least something here then I get
> a warning:
>
> 'clock-names', 'clocks' do not match any of the regexes: 'pinctrl-[0-9]+'
>
> even if I define them in the allOf block below. I don't
> know what the min/max should be until I check the compatible
> in the allOf block.
As always: the widest constraints.
...
> Logic in YAML always seems messy to me, here it is in pseudo C:
>
> if (compatible == allwinner,sun6i-a31-gpu ||
> compatible == ingenic,jz4780-gpu) {
> if (compatible == allwinner,sun6i-a31-gpu)
> clocks: ...
> if (compatible == ingenic,jz4780-gpu)
> clocks: ...
> required:
> - clocks
> - clock-names
> } else { /* disallow for all others */
> properties:
> clocks: false
> clock-names: false
> }
OK, I see, that's the limitation of YAML. The point is that this code is
not readable, so just list all fallbacks or variants.
Best regards,
Krzysztof
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next prev parent reply other threads:[~2024-01-09 18:58 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-08 18:32 [PATCH RFC v2 00/11] Device tree support for Imagination Series5 GPU Andrew Davis
2024-01-08 18:32 ` [PATCH RFC v2 01/11] dt-bindings: gpu: Rename img,powervr to img,powervr-rogue Andrew Davis
2024-01-09 8:14 ` [PATCH RFC v2 01/11] dt-bindings: gpu: Rename img, powervr to img, powervr-rogue Javier Martinez Canillas
2024-01-09 9:40 ` [PATCH RFC v2 01/11] dt-bindings: gpu: Rename img,powervr to img,powervr-rogue Frank Binns
2024-01-09 11:28 ` Krzysztof Kozlowski
2024-01-09 16:14 ` Andrew Davis
2024-01-09 18:55 ` Krzysztof Kozlowski
2024-01-08 18:32 ` [PATCH RFC v2 02/11] dt-bindings: gpu: Add PowerVR Series5 SGX GPUs Andrew Davis
2024-01-09 11:32 ` Krzysztof Kozlowski
2024-01-09 16:53 ` Andrew Davis
2024-01-09 18:58 ` Krzysztof Kozlowski [this message]
2024-01-08 18:32 ` [PATCH RFC v2 03/11] ARM: dts: omap3: Add device tree entry for SGX GPU Andrew Davis
2024-01-09 8:17 ` Javier Martinez Canillas
2024-01-08 18:32 ` [PATCH RFC v2 04/11] ARM: dts: omap4: " Andrew Davis
2024-01-09 8:17 ` Javier Martinez Canillas
2024-01-12 17:33 ` H. Nikolaus Schaller
2024-01-15 8:25 ` Maxime Ripard
2024-01-15 8:55 ` H. Nikolaus Schaller
2024-01-15 9:50 ` Andreas Kemnade
2024-01-15 14:45 ` Maxime Ripard
2024-01-08 18:32 ` [PATCH RFC v2 05/11] ARM: dts: omap5: " Andrew Davis
2024-01-09 8:17 ` Javier Martinez Canillas
2024-01-08 18:32 ` [PATCH RFC v2 06/11] ARM: dts: AM33xx: " Andrew Davis
2024-01-09 8:17 ` Javier Martinez Canillas
2024-01-08 18:32 ` [PATCH RFC v2 07/11] ARM: dts: AM437x: " Andrew Davis
2024-01-09 8:18 ` Javier Martinez Canillas
2024-01-08 18:32 ` [PATCH RFC v2 08/11] ARM: dts: DRA7xx: " Andrew Davis
2024-01-09 8:18 ` Javier Martinez Canillas
2024-01-08 18:33 ` [PATCH RFC v2 09/11] arm64: dts: ti: k3-am654-main: " Andrew Davis
2024-01-08 18:33 ` [PATCH RFC v2 10/11] ARM: dts: sun6i: " Andrew Davis
2024-01-08 18:33 ` [PATCH RFC v2 11/11] MIPS: DTS: jz4780: " Andrew Davis
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