From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5CBF2C54E58 for ; Mon, 25 Mar 2024 10:45:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:In-Reply-To:References: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=t5MviV9VodZQnE6OHtkQs9FS1aoZQ3e8eqvqJO+8Lu8=; b=U6IQoW9HthLPJB 7bXM6cQl1V9DE88UV2/w3iqF3lBE/RZ58vOXRFjZD+TYvqvzxpHl2Z/Qy+u/5t4h08h1iA6a3KkQF LKKGyXgXoErUt8eNbOVAyxPRt/6Jy+9Xgh3iTo5NBHc/1LFSx/DblFnBY29wry/PP/pg/OBAGwaFU GOcESFjUgiuH0u/U55Y843hV8ohOh3VLo+j5nNX6lzX1ew4kKwh/akbWNhDpwjc1u6X0H8Iy45/sT 99pf29a2Umg+mRnJA8Zw0of8rbgzZtuzhgeehxY8BQpqTxlakiixfAMUo96r7CP0v6c9rJ2W8x+HZ AreQVKDaOb1LU9lpdFmg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rohov-0000000Gpp9-3Sfh; Mon, 25 Mar 2024 10:44:49 +0000 Received: from frasgout.his.huawei.com ([185.176.79.56]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rohop-0000000Gpm7-3NZE for linux-arm-kernel@lists.infradead.org; Mon, 25 Mar 2024 10:44:47 +0000 Received: from mail.maildlp.com (unknown [172.18.186.231]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4V38Zv0yYdz6K9HB; Mon, 25 Mar 2024 18:40:07 +0800 (CST) Received: from lhrpeml500001.china.huawei.com (unknown [7.191.163.213]) by mail.maildlp.com (Postfix) with ESMTPS id 34B5B140B33; Mon, 25 Mar 2024 18:44:31 +0800 (CST) Received: from lhrpeml500005.china.huawei.com (7.191.163.240) by lhrpeml500001.china.huawei.com (7.191.163.213) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.35; Mon, 25 Mar 2024 10:44:30 +0000 Received: from lhrpeml500005.china.huawei.com ([7.191.163.240]) by lhrpeml500005.china.huawei.com ([7.191.163.240]) with mapi id 15.01.2507.035; Mon, 25 Mar 2024 10:44:30 +0000 From: Shameerali Kolothum Thodi To: Mostafa Saleh , Jason Gunthorpe CC: "iommu@lists.linux.dev" , Joerg Roedel , "linux-arm-kernel@lists.infradead.org" , Robin Murphy , Will Deacon , Eric Auger , Jean-Philippe Brucker , Moritz Fischer , Michael Shavit , Nicolin Chen , "patches@lists.linux.dev" Subject: RE: [PATCH v5 00/27] Update SMMUv3 to the modern iommu API (part 2/3) Thread-Topic: [PATCH v5 00/27] Update SMMUv3 to the modern iommu API (part 2/3) Thread-Index: AQHabo3wRMc+IC/UvkmrycX31nWce7FIX4GAgAAEMJA= Date: Mon, 25 Mar 2024 10:44:30 +0000 Message-ID: <9819d9f48ad64fb8a704a0a779010581@huawei.com> References: <0-v5-9a37e0c884ce+31e3-smmuv3_newapi_p2_jgg@nvidia.com> In-Reply-To: Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.202.227.28] MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240325_034444_904458_641694B1 X-CRM114-Status: GOOD ( 25.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org > -----Original Message----- > From: Mostafa Saleh > Sent: Monday, March 25, 2024 10:22 AM > To: Jason Gunthorpe > Cc: iommu@lists.linux.dev; Joerg Roedel ; linux-arm- > kernel@lists.infradead.org; Robin Murphy ; Will > Deacon ; Eric Auger ; Jean- > Philippe Brucker ; Moritz Fischer > ; Michael Shavit ; Nicolin Chen > ; patches@lists.linux.dev; Shameerali Kolothum Thodi > > Subject: Re: [PATCH v5 00/27] Update SMMUv3 to the modern iommu API > (part 2/3) > > Hi Jason, > > On Mon, Mar 04, 2024 at 07:43:48PM -0400, Jason Gunthorpe wrote: > > Continuing the work of part 1 this focuses on the CD, PASID and SVA > > components: > > > > - attach_dev failure does not change the HW configuration. > > > > - Full PASID API support including: > > - S1/SVA domains attached to PASIDs > > - IDENTITY/BLOCKED/S1 attached to RID > > - Change of the RID domain while PASIDs are attached > > > > - Streamlined SVA support using the core infrastructure > > > > - Hitless, whenever possible, change between two domains > > > > Making the CD programming work like the new STE programming allows > > untangling some of the confusing SVA flows. From there the focus is on > > building out the core infrastructure for dealing with PASID and CD > > entries, then keeping track of unique SSID's for ATS invalidation. > > > > The ATS ordering is generalized so that the PASID flow can use it and put > > into a form where it is fully hitless, whenever possible. Care is taken to > > ensure that ATC flushes are present after any change in translation. > > > > Finally we simply kill the entire outdated SVA mmu_notifier > implementation > > in one shot and switch it over to the newly created generic PASID & CD > > code. This avoids the messy and confusing approach of trying to > > incrementally untangle this in place. The new code is small and simple > > enough this is much better than trying to figure out smaller steps. > > > > Once SVA is resting on the right CD code it is straightforward to make the > > PASID interface functionally complete. > > > > It achieves the same goals as the several series from Michael and the S1DSS > > series from Nicolin that were trying to improve portions of the API. > > > > This is on github: > > https://github.com/jgunthorpe/linux/commits/smmuv3_newapi > > Testing on qemu[1], with the same VMM Shameer tested with[2]: > qemu/build/qemu-system-aarch64 -M virt -machine virt,gic- > version=3,iommu=nested-smmuv3,iommufd=iommufd0 \ > -cpu cortex-a53,pmu=off -smp 1 -m 2048 \ > -kernel Image \ > -drive file=rootfs.ext4,if=virtio,format=raw \ > -object rng-random,filename=/dev/urandom,id=rng0 -device virtio-rng- > pci,rng=rng0 -nographic \ > -append 'console=ttyAMA0 rootwait root=/dev/vda' \ > -device virtio-scsi-pci,id=scsi0 \ > -device ioh3420,id=pcie.1,chassis=1 \ > -object iommufd,id=iommufd0 \ > -device vfio-pci,host=0000:00:03.0,iommufd=iommufd0 > > I see the following panic: I think that is probably because you are testing with "nested-smmuv3". This series not yet fully enable that. For that, I think you are missing few patches from Nicolin's iommufd branch, https://github.com/nicolinc/iommufd/commits/wip/iommufd_nesting-03112024/ Thanks, Shameer _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel