From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.6 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3F1DDC433E0 for ; Mon, 1 Feb 2021 13:17:44 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E580560C41 for ; Mon, 1 Feb 2021 13:17:43 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E580560C41 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=qifkWeNWIiZGkFuRmW2IDiYlfc7OQv5Ca7eYViFiFxo=; b=zV2aZsFI4+Wor0azl9JtBOb2v OumNQ/ad07PWxXXRN60/hgN9YPiPhDAaxc4WijQps4OBIPYzOmnnE8cV7Fn8RErxP7stFPIWwKa0k GGrra9i6tDwdtAAWRmaWfRQp8mvm/qVqXKH76Z/tPMhhDcA4obsinYkOEcUeA3pne4tRoPR2/+46F 0Ve679Q4tbNjupmEHLtIuV+79VRv8YVxmOfmXY02JZ9UKwSzJHQZ5yJ5a0smDhddScA54jOkW2ak+ PXbyFspUV0y5G4f9a63a1v/M+renDRIhJ39+psPO7WFPXv38Q+0m+GY1YrfTOEJY0s8byhrxGWj+y Mqwlr2Wgg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l6Z4Y-0007Kz-PW; Mon, 01 Feb 2021 13:16:54 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l6Y0V-0008Jd-IE for linux-arm-kernel@lists.infradead.org; Mon, 01 Feb 2021 12:08:47 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2FF1DED1; Mon, 1 Feb 2021 04:08:38 -0800 (PST) Received: from [10.57.35.163] (unknown [10.57.35.163]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 54B853F718; Mon, 1 Feb 2021 04:08:36 -0800 (PST) Subject: Re: [PATCH v4 1/2] perf/smmuv3: Don't reserve the PMCG register spaces To: Zhen Lei , Will Deacon , Mark Rutland , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel References: <20210130071414.1575-1-thunder.leizhen@huawei.com> <20210130071414.1575-2-thunder.leizhen@huawei.com> From: Robin Murphy Message-ID: <9904b39d-f328-14d6-b5d8-8b9e8a1437b6@arm.com> Date: Mon, 1 Feb 2021 12:08:35 +0000 User-Agent: Mozilla/5.0 (Windows NT 10.0; rv:78.0) Gecko/20100101 Thunderbird/78.7.0 MIME-Version: 1.0 In-Reply-To: <20210130071414.1575-2-thunder.leizhen@huawei.com> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210201_070839_788391_B30F5F19 X-CRM114-Status: GOOD ( 24.75 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jean-Philippe Brucker , Shameer Kolothum Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2021-01-30 07:14, Zhen Lei wrote: > According to the SMMUv3 specification: > Each PMCG counter group is represented by one 4KB page (Page 0) with one > optional additional 4KB page (Page 1), both of which are at IMPLEMENTATION > DEFINED base addresses. > > This means that the PMCG register spaces may be within the 64KB pages of > the SMMUv3 register space. When both the SMMU and PMCG drivers reserve > their own resources, a resource conflict occurs. > > To avoid this conflict, don't reserve the PMCG regions. I said my review on v3 stood either way, but for the avoidance of doubt, Reviewed-by: Robin Murphy I hadn't considered that a comment is a very good idea, in case the cleanup-script crew find this in future and try to "simplify" it :) Thanks, Robin. > Suggested-by: Robin Murphy > Signed-off-by: Zhen Lei > --- > drivers/perf/arm_smmuv3_pmu.c | 25 +++++++++++++++++++------ > 1 file changed, 19 insertions(+), 6 deletions(-) > > diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf/arm_smmuv3_pmu.c > index 74474bb322c3f26..5e894f957c7b935 100644 > --- a/drivers/perf/arm_smmuv3_pmu.c > +++ b/drivers/perf/arm_smmuv3_pmu.c > @@ -793,17 +793,30 @@ static int smmu_pmu_probe(struct platform_device *pdev) > .capabilities = PERF_PMU_CAP_NO_EXCLUDE, > }; > > - smmu_pmu->reg_base = devm_platform_get_and_ioremap_resource(pdev, 0, &res_0); > - if (IS_ERR(smmu_pmu->reg_base)) > - return PTR_ERR(smmu_pmu->reg_base); > + /* > + * The register spaces of the PMCG may be in the register space of > + * other devices. For example, SMMU. Therefore, the PMCG resources are > + * not reserved to avoid resource conflicts with other drivers. > + */ > + res_0 = platform_get_resource(pdev, IORESOURCE_MEM, 0); > + if (!res_0) > + return ERR_PTR(-EINVAL); > + smmu_pmu->reg_base = devm_ioremap(dev, res_0->start, resource_size(res_0)); > + if (!smmu_pmu->reg_base) > + return ERR_PTR(-ENOMEM); > > cfgr = readl_relaxed(smmu_pmu->reg_base + SMMU_PMCG_CFGR); > > /* Determine if page 1 is present */ > if (cfgr & SMMU_PMCG_CFGR_RELOC_CTRS) { > - smmu_pmu->reloc_base = devm_platform_ioremap_resource(pdev, 1); > - if (IS_ERR(smmu_pmu->reloc_base)) > - return PTR_ERR(smmu_pmu->reloc_base); > + struct resource *res_1; > + > + res_1 = platform_get_resource(pdev, IORESOURCE_MEM, 1); > + if (!res_1) > + return ERR_PTR(-EINVAL); > + smmu_pmu->reloc_base = devm_ioremap(dev, res_1->start, resource_size(res_1)); > + if (!smmu_pmu->reloc_base) > + return ERR_PTR(-ENOMEM); > } else { > smmu_pmu->reloc_base = smmu_pmu->reg_base; > } > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel