Re: [PATCH v2 1/4] PCI: rcar-gen4: Configure AXIINTC if iMSI-RX not used

[Marek Vasut <marek.vasut@mailbox.org>]

On 6/30/26 6:22 PM, Manivannan Sadhasivam wrote:

Hello Manivannan,

> On Fri, Jun 19, 2026 at 12:01:59AM +0200, Marek Vasut wrote:
>> In case MSI are enabled, but DWC built-in iMSI-RX is not in use, the
>> MSI are handled via GIC ITS. Configure all controller MSI registers
>> fully.
>>
>> Set or clear MSI capability register MSICAP0 MSI enable MSIE bit and
>> PCIe Interrupt Status 0 Enable register PCIEINTSTS0EN MSI interrupt
>> enable MSI_CTRL_INT bit according to MSI enable state, set both bits
>> if MSI are enabled, clear both bits if MSI are disabled.
>>
>> If MSI are disabled, or MSI are enabled and iMSI-RX is used, then
>> deconfigure AXIINTCADDR and AXIINTCCONT to 0, which disables any
>> pass through of MSI TLPs onto the AXI bus and then further into
>> GIC ITS translation registers.
>>
>> If MSI are enabled and iMSI-RX is not used, the configure AXIINTCADDR
>> with target address of GIC ITS translation registers, and configure
>> AXIINTCCONT to enable MSI TLP pass through onto AXI bus and into the
>> GIC ITS. This specific configuration allows handling of MSI via the
>> GIC ITS instead of integrated iMSI-RX.
>>
>> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
>> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
> 
> Same as patch 3, SoB chain is broken. Rest LGTM!
I hope this is now addressed in V3.