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Thu, 10 Sep 2026 18:23:01 +0200 Received: from [10.48.86.251] (10.48.86.251) by STKDAG1NODE2.st.com (10.75.128.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.43; Thu, 10 Sep 2026 18:17:32 +0200 Message-ID: <9c20a5a4-1d3f-4040-96a1-1711651c3f06@foss.st.com> Date: Thu, 10 Sep 2026 18:17:31 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 1/2] dt-bindings: usb: dwc3: Document ST STM32MP2 DWC3 xHCI USB controller To: Marek Vasut , CC: Pankaj Dev , =?UTF-8?Q?Cl=C3=A9ment_Le_Goffic?= , Gatien Chevallier , Alexandre Torgue , Conor Dooley , "Greg Kroah-Hartman" , Krzysztof Kozlowski , Maxime Coquelin , "Rob Herring" , Thinh Nguyen , , , , , References: <20260910052340.246717-1-marex@nabladev.com> Content-Language: en-US From: Fabrice Gasnier In-Reply-To: <20260910052340.246717-1-marex@nabladev.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-Originating-IP: [10.48.86.251] X-ClientProxiedBy: ENXCAS1NODE2.st.com (10.75.128.138) To STKDAG1NODE2.st.com (10.75.128.133) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM2PEPF00070CF2:EE_|GV2PR10MB7461:EE_ X-MS-Office365-Filtering-Correlation-Id: c72532d8-f25f-4155-2706-08df0f570556 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|23010399003|36860700016|7416014|376014|6133799003|18002099003|22082099003|56012099006|13003099007|3023799007|10067099003|11063799006; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 96WVh2AyrYfP2QznRDHns1eCe9GBZwqeV8aukeblDy2hCIa2oa/xPAD3afc/QmXjus7tnnhoEWkG/hMpo84qZIfXKWzRc1qV1wqKlHq5CvLONAm3XFlNZu5MFi1Q1GvOyOK3W6Vhu8OUZFeda8MLC5zDomLj6EfEh2WfKfgjuRTgPRfAT/KbRTkNWG+XI611dqzatNhplKiEgRcojz/k6/CLrYJ3D35JpPLFlNwipPF7WYneDs6idsZTqTC2wi6tVzR8norTTn6gOM9jgzwbih/cYDvTWeh2X97K6vdkBvod4J+F4kP5h5KShETm+36hgodfyvw4N0E6Pca/vyf423k/yYkMX7EujtHDsn6ww4NIuK0BmAH9TaajidZpsp2uZ61ufQFz3miRkrRgUyy6HzBXeGPoSjGkgmGKQfMGD9O4aQBsdsKW9OK4SeuGFroP X-OriginatorOrg: foss.st.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Sep 2026 16:17:33.5054 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c72532d8-f25f-4155-2706-08df0f570556 X-MS-Exchange-CrossTenant-Id: 75e027c9-20d5-47d5-b82f-77d7cd041e8f X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=75e027c9-20d5-47d5-b82f-77d7cd041e8f;Ip=[164.130.1.60];Helo=[smtpO365.st.com] X-MS-Exchange-CrossTenant-AuthSource: AM2PEPF00070CF2.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: GV2PR10MB7461 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260910_171745_184814_C02238D7 X-CRM114-Status: GOOD ( 16.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 9/10/26 07:22, Marek Vasut wrote: > The ST STM32MP2 SoC contains single instance of DWC3 USB controller with > glue logic wrapper around it controlled by syscon. Document the glue > logic and DWC3 controller. > > Co-developed-by: Pankaj Dev > Signed-off-by: Pankaj Dev > Co-developed-by: Clément Le Goffic > Signed-off-by: Clément Le Goffic > Co-developed-by: Gatien Chevallier > Signed-off-by: Gatien Chevallier > Signed-off-by: Marek Vasut Hi Markek, You can add my: Acked-by: Fabrice Gasnier BR, Fabrice > --- > Cc: Alexandre Torgue > Cc: Conor Dooley > Cc: Fabrice Gasnier > Cc: Greg Kroah-Hartman > Cc: Krzysztof Kozlowski > Cc: Marek Vasut > Cc: Maxime Coquelin > Cc: Rob Herring > Cc: Thinh Nguyen > Cc: devicetree@vger.kernel.org > Cc: kernel@dh-electronics.com > Cc: linux-arm-kernel@lists.infradead.org > Cc: linux-kernel@vger.kernel.org > Cc: linux-stm32@st-md-mailman.stormreply.com > Cc: linux-usb@vger.kernel.org > --- > V2: Fix up Sob/Cdb lines > V3: - Document maximum-speed > - Switch resets to maxItems: 1 > - Drop label from example > - Use generic over-current-active-low > - Use ref: snps,dwc3-common.yaml and drop generic dr_mode/maximum-speed/phys/phy-names > V4: - Split this from series arm64: dts: phy: st: usb: Add STM32MP2 USB support > https://lore.kernel.org/all/20260822074816.548662-1-marex@nabladev.com/ > V5: No change > --- > .../bindings/usb/st,stm32mp25-dwc3.yaml | 97 +++++++++++++++++++ > 1 file changed, 97 insertions(+) > create mode 100644 Documentation/devicetree/bindings/usb/st,stm32mp25-dwc3.yaml > > diff --git a/Documentation/devicetree/bindings/usb/st,stm32mp25-dwc3.yaml b/Documentation/devicetree/bindings/usb/st,stm32mp25-dwc3.yaml > new file mode 100644 > index 0000000000000..96bd557327252 > --- /dev/null > +++ b/Documentation/devicetree/bindings/usb/st,stm32mp25-dwc3.yaml > @@ -0,0 +1,97 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/usb/st,stm32mp25-dwc3.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: STMicroelectronics STM32 MPU DWC3 USB SoC controller > + > +description: > + The STM32 MPU DWC3 USB SoC controller block supports both > + Host(SS/HS/FS/LS) and Device(SS/HS/FS) mode operation > + > +maintainers: > + - Fabrice Gasnier > + - Marek Vasut > + > +allOf: > + - $ref: snps,dwc3-common.yaml# > + > +properties: > + compatible: > + const: st,stm32mp25-dwc3 > + > + reg: > + maxItems: 1 > + > + access-controllers: > + maxItems: 1 > + > + clocks: > + minItems: 3 > + maxItems: 3 > + > + clock-names: > + items: > + - const: ref > + - const: bus_early > + - const: suspend > + > + interrupts: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + > + over-current-active-low: > + type: boolean > + description: Over-Current signal polarity is active-low > + > + st,syscfg: > + $ref: /schemas/types.yaml#/definitions/phandle-array > + description: Phandle to system configuration controller. > + items: > + - items: > + - description: phandle to syscfg > + - description: USB3DR control offset within syscfg > + > + st,enable-port-power-control: > + type: boolean > + description: Enable Host-Mode Port Power Control (bit-3 of capability param HCCPARAMS) > + > + st,vbusen-active-low: > + type: boolean > + description: VBUS-ENABLE signal polarity is active-low > + > +required: > + - compatible > + - reg > + - clocks > + - clock-names > + - interrupts > + - phys > + - phy-names > + - resets > + - st,syscfg > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include > + #include > + #include > + > + usb@48300000 { > + compatible = "st,stm32mp25-dwc3"; > + reg = <0x48300000 0x100000>; > + clocks = <&rcc CK_KER_USB2PHY2>, <&rcc CK_BUS_USB3DR>, <&rcc CK_KER_USB2PHY2>; > + clock-names = "ref", "bus_early", "suspend"; > + interrupts = ; > + phys = <&usb2_phy>, <&usb3_phy>; > + phy-names = "usb2-phy", "usb3-phy"; > + resets = <&rcc USB3DR_R>; > + over-current-active-low; > + st,syscfg = <&syscfg 0x4800>; > + st,vbusen-active-low; > + };