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Mon, 05 Oct 2026 02:31:51 -0700 (PDT) Received: from [192.168.1.3] ([37.18.141.193]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c3155ef11b9sm49533566b.0.2026.10.05.02.31.49 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 05 Oct 2026 02:31:50 -0700 (PDT) Message-ID: <9c5e1aa7-4e0f-4576-b322-b4594cdea5b0@linaro.org> Date: Mon, 5 Oct 2026 10:31:48 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/3] perf: arm_spe: Factor HW discard mode out of arm_spe_perf_aux_output_begin() To: Will Deacon Cc: Mark Rutland , Leo Yan , Suzuki Poulose , Al Grant , linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260805-james-spe-software-discard-v1-0-0ff0e44c4c92@linaro.org> <20260805-james-spe-software-discard-v1-2-0ff0e44c4c92@linaro.org> Content-Language: en-US From: James Clark In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261005_023153_084414_8EAB5269 X-CRM114-Status: GOOD ( 21.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 05/10/2026 09:27, Will Deacon wrote: > On Wed, Aug 05, 2026 at 04:01:52PM +0100, James Clark wrote: >> Discard mode doesn't call perf_aux_output_begin() or emit aux records, >> and enabling it never fails. We'll add a second discard mode in the >> next commit so it will be cleaner if there is a separate begin function >> just for discard mode. >> >> No functional changes intended. > > [...] > >> +static void arm_spe_pmu_begin_discard(struct perf_output_handle *handle, >> + struct perf_event *event) >> +{ >> + u64 limit; >> + >> + limit = FIELD_PREP(PMBLIMITR_EL1_FM, PMBLIMITR_EL1_FM_DISCARD); >> + limit |= PMBLIMITR_EL1_E; >> + >> + write_sysreg_s(limit, SYS_PMBLIMITR_EL1); >> +} >> + >> static int arm_spe_perf_aux_output_begin(struct perf_output_handle *handle, >> struct perf_event *event) >> { >> u64 base, limit; >> struct arm_spe_pmu_buf *buf; > > Is it worth checking that we have a discard event in begin_discard() and > similarly that we don't have a discard event in output_begin()? It looks > like quite an error-prone interface for the caller, otherwise. > Makes sense, I can add that. >> @@ -775,6 +785,12 @@ static irqreturn_t arm_spe_pmu_irq_handler(int irq, void *dev) >> arm_spe_pmu_disable_and_drain_local(); >> break; >> case SPE_PMU_BUF_FAULT_ACT_OK: >> + if (arm_spe_discard_mode(event)) { >> + arm_spe_pmu_begin_discard(handle, event); >> + isb(); >> + break; >> + } > > This looks like new behaviour? > > Will I just extracted the discard part of arm_spe_perf_aux_output_begin() into here and arm_spe_pmu_begin_discard(). The PMBLIMITR_EL1 write and isb() should be the same. Do you mean that now it does arm_spe_pmu_begin_discard() unconditionally before checking PERF_AUX_FLAG_TRUNCATED? Truncated would never be set in HW discard mode, so it should be equivalent. And the IRQ would never fire anyway so we don't get here until SW discard is added, and even if it did, handle->event is NULL so the handler would exit on the first line anyway. I suppose there's another change that it can never call arm_spe_pmu_stop()? But that wouldn't have happened in discard mode either. James