[PATCH 0/6] Allwinner R40 USB host support

[PATCH 0/6] Allwinner R40 USB host support

[Icenowy Zheng]

This patchset adds support for the USB host ports on Allwiner R40, and
enable them on Banana Pi M2 Ultra and Berry boards.

The first patch adds R40 support to the USB PHY driver.

The second patch adds USB PHY and EHCI/OHCI nodes to the R40 DTSI.

The thrid and fourth patch adds 5V regulator for the two boards, and
the fifth and sixth patch finally adds USB host ports support.

Icenowy Zheng (6):
  phy: sun4i-usb: add support for R40 USB PHY
  ARM: sun8i: r40: add USB host port nodes for R40
  ARM: sun8i: r40: add 5V regulator for Banana Pi M2 Ultra
  ARM: sun8i: v40: add 5V regulator for Banana Pi M2 Berry
  ARM: sun8i: r40: enable USB host for Banana Pi M2 Ultra
  ARM: sun8i: v40: enable USB host ports for Banana Pi M2 Berry

 .../devicetree/bindings/phy/sun4i-usb-phy.txt      |  1 +
 arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts  | 31 +++++++++
 arch/arm/boot/dts/sun8i-r40.dtsi                   | 78 ++++++++++++++++++++++
 arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts  | 22 ++++++
 drivers/phy/allwinner/phy-sun4i-usb.c              | 12 ++++
 5 files changed, 144 insertions(+)

-- 
2.13.6

[PATCH 1/6] phy: sun4i-usb: add support for R40 USB PHY

[Icenowy Zheng]

Allwinner R40 features a USB PHY like the one in A64, but with 3 PHYs.

Add support for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 Documentation/devicetree/bindings/phy/sun4i-usb-phy.txt |  1 +
 drivers/phy/allwinner/phy-sun4i-usb.c                   | 12 ++++++++++++
 2 files changed, 13 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/sun4i-usb-phy.txt b/Documentation/devicetree/bindings/phy/sun4i-usb-phy.txt
index cbc7847dbf6c..0f00abd40a50 100644
--- a/Documentation/devicetree/bindings/phy/sun4i-usb-phy.txt
+++ b/Documentation/devicetree/bindings/phy/sun4i-usb-phy.txt
@@ -11,6 +11,7 @@ Required properties:
   * allwinner,sun8i-a33-usb-phy
   * allwinner,sun8i-a83t-usb-phy
   * allwinner,sun8i-h3-usb-phy
+  * allwinner,sun8i-r40-usb-phy
   * allwinner,sun8i-v3s-usb-phy
   * allwinner,sun50i-a64-usb-phy
 - reg : a list of offset + length pairs
diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c
index 1161e11fb3cf..9df7a2c9ca75 100644
--- a/drivers/phy/allwinner/phy-sun4i-usb.c
+++ b/drivers/phy/allwinner/phy-sun4i-usb.c
@@ -112,6 +112,7 @@ enum sun4i_usb_phy_type {
 	sun8i_a33_phy,
 	sun8i_a83t_phy,
 	sun8i_h3_phy,
+	sun8i_r40_phy,
 	sun8i_v3s_phy,
 	sun50i_a64_phy,
 };
@@ -919,6 +920,16 @@ static const struct sun4i_usb_phy_cfg sun8i_h3_cfg = {
 	.phy0_dual_route = true,
 };
 
+static const struct sun4i_usb_phy_cfg sun8i_r40_cfg = {
+	.num_phys = 3,
+	.type = sun8i_r40_phy,
+	.disc_thresh = 3,
+	.phyctl_offset = REG_PHYCTL_A33,
+	.dedicated_clocks = true,
+	.enable_pmu_unk1 = true,
+	.phy0_dual_route = true,
+};
+
 static const struct sun4i_usb_phy_cfg sun8i_v3s_cfg = {
 	.num_phys = 1,
 	.type = sun8i_v3s_phy,
@@ -947,6 +958,7 @@ static const struct of_device_id sun4i_usb_phy_of_match[] = {
 	{ .compatible = "allwinner,sun8i-a33-usb-phy", .data = &sun8i_a33_cfg },
 	{ .compatible = "allwinner,sun8i-a83t-usb-phy", .data = &sun8i_a83t_cfg },
 	{ .compatible = "allwinner,sun8i-h3-usb-phy", .data = &sun8i_h3_cfg },
+	{ .compatible = "allwinner,sun8i-r40-usb-phy", .data = &sun8i_r40_cfg },
 	{ .compatible = "allwinner,sun8i-v3s-usb-phy", .data = &sun8i_v3s_cfg },
 	{ .compatible = "allwinner,sun50i-a64-usb-phy",
 	  .data = &sun50i_a64_cfg},
-- 
2.13.6

[PATCH 1/6] phy: sun4i-usb: add support for R40 USB PHY

[Maxime Ripard]

On Sun, Oct 08, 2017 at 04:29:01AM +0000, Icenowy Zheng wrote:
> Allwinner R40 features a USB PHY like the one in A64, but with 3 PHYs.
> 
> Add support for it.
> 
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>

Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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[PATCH 1/6] phy: sun4i-usb: add support for R40 USB PHY

[Kishon Vijay Abraham I]

Hi,

On Tuesday 10 October 2017 02:28 AM, Maxime Ripard wrote:
> On Sun, Oct 08, 2017 at 04:29:01AM +0000, Icenowy Zheng wrote:
>> Allwinner R40 features a USB PHY like the one in A64, but with 3 PHYs.
>>
>> Add support for it.
>>
>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> 
> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Is this patch good to be merged? I see you have pending comments on the other
patch in the series.

Thanks
Kishon

[PATCH 1/6] phy: sun4i-usb: add support for R40 USB PHY

[Maxime Ripard]

On Wed, Oct 18, 2017 at 05:09:00PM +0530, Kishon Vijay Abraham I wrote:
> Hi,
> 
> On Tuesday 10 October 2017 02:28 AM, Maxime Ripard wrote:
> > On Sun, Oct 08, 2017 at 04:29:01AM +0000, Icenowy Zheng wrote:
> >> Allwinner R40 features a USB PHY like the one in A64, but with 3 PHYs.
> >>
> >> Add support for it.
> >>
> >> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> > 
> > Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> 
> Is this patch good to be merged? I see you have pending comments on the other
> patch in the series.

Yeah, but I guess you can merge this one, it's pretty harmless, and it
will reduce the amount of patches to review / merge later on.

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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[PATCH 1/6] phy: sun4i-usb: add support for R40 USB PHY

[Kishon Vijay Abraham I]

On Wednesday 18 October 2017 05:12 PM, Maxime Ripard wrote:
> On Wed, Oct 18, 2017 at 05:09:00PM +0530, Kishon Vijay Abraham I wrote:
>> Hi,
>>
>> On Tuesday 10 October 2017 02:28 AM, Maxime Ripard wrote:
>>> On Sun, Oct 08, 2017 at 04:29:01AM +0000, Icenowy Zheng wrote:
>>>> Allwinner R40 features a USB PHY like the one in A64, but with 3 PHYs.
>>>>
>>>> Add support for it.
>>>>
>>>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>>>
>>> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
>>
>> Is this patch good to be merged? I see you have pending comments on the other
>> patch in the series.
> 
> Yeah, but I guess you can merge this one, it's pretty harmless, and it
> will reduce the amount of patches to review / merge later on.

Thank you for the quick reply.

merged with Maxime's and Rob's Ack.

Thanks
Kishon

[PATCH 1/6] phy: sun4i-usb: add support for R40 USB PHY

[Icenowy Zheng]

? 2017?10?18???? CST ??7:46:08?Kishon Vijay Abraham I ???
> On Wednesday 18 October 2017 05:12 PM, Maxime Ripard wrote:
> > On Wed, Oct 18, 2017 at 05:09:00PM +0530, Kishon Vijay Abraham I wrote:
> >> Hi,
> >> 
> >> On Tuesday 10 October 2017 02:28 AM, Maxime Ripard wrote:
> >>> On Sun, Oct 08, 2017 at 04:29:01AM +0000, Icenowy Zheng wrote:
> >>>> Allwinner R40 features a USB PHY like the one in A64, but with 3 PHYs.
> >>>> 
> >>>> Add support for it.
> >>>> 
> >>>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> >>> 
> >>> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> >> 
> >> Is this patch good to be merged? I see you have pending comments on the
> >> other patch in the series.
> > 
> > Yeah, but I guess you can merge this one, it's pretty harmless, and it
> > will reduce the amount of patches to review / merge later on.
> 
> Thank you for the quick reply.
> 
> merged with Maxime's and Rob's Ack.

Sorry, but I didn't see the patch appears in linux-next for such long time.

Is it lost?

> 
> Thanks
> Kishon

[PATCH 1/6] phy: sun4i-usb: add support for R40 USB PHY

[Kishon Vijay Abraham I]

Hi,

On Saturday 30 December 2017 05:08 PM, Icenowy Zheng wrote:
> ? 2017?10?18???? CST ??7:46:08?Kishon Vijay Abraham I ???
>> On Wednesday 18 October 2017 05:12 PM, Maxime Ripard wrote:
>>> On Wed, Oct 18, 2017 at 05:09:00PM +0530, Kishon Vijay Abraham I wrote:
>>>> Hi,
>>>>
>>>> On Tuesday 10 October 2017 02:28 AM, Maxime Ripard wrote:
>>>>> On Sun, Oct 08, 2017 at 04:29:01AM +0000, Icenowy Zheng wrote:
>>>>>> Allwinner R40 features a USB PHY like the one in A64, but with 3 PHYs.
>>>>>>
>>>>>> Add support for it.
>>>>>>
>>>>>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>>>>>
>>>>> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
>>>>
>>>> Is this patch good to be merged? I see you have pending comments on the
>>>> other patch in the series.
>>>
>>> Yeah, but I guess you can merge this one, it's pretty harmless, and it
>>> will reduce the amount of patches to review / merge later on.
>>
>> Thank you for the quick reply.
>>
>> merged with Maxime's and Rob's Ack.
> 
> Sorry, but I didn't see the patch appears in linux-next for such long time.
> 
> Is it lost?

yeah, looks like it. Can you post it again?
sorry about that :-/

Thanks
Kishon

[PATCH 1/6] phy: sun4i-usb: add support for R40 USB PHY

[Rob Herring]

On Sun, Oct 08, 2017 at 12:29:01PM +0800, Icenowy Zheng wrote:
> Allwinner R40 features a USB PHY like the one in A64, but with 3 PHYs.
> 
> Add support for it.
> 
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> ---
>  Documentation/devicetree/bindings/phy/sun4i-usb-phy.txt |  1 +
>  drivers/phy/allwinner/phy-sun4i-usb.c                   | 12 ++++++++++++
>  2 files changed, 13 insertions(+)

Acked-by: Rob Herring <robh@kernel.org>

[PATCH 2/6] ARM: sun8i: r40: add USB host port nodes for R40

[Icenowy Zheng]

From: Icenowy Zheng <icenowy@aosc.xyz>

Allwinner R40 SoC features a USB OTG port and two USB HOST ports.

Add support for the host ports in the DTSI file.

The OTG controller still cannot work with existing compatibles, and needs
more investigation. So it's not added yet.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
---
 arch/arm/boot/dts/sun8i-r40.dtsi | 78 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 78 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index d5a6745409ae..f6c917cbbaac 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -173,6 +173,84 @@
 			#size-cells = <0>;
 		};
 
+		usbphy: phy at 1c13400 {
+			compatible = "allwinner,sun8i-r40-usb-phy";
+			reg = <0x01c13400 0x14>,
+			      <0x01c14800 0x4>,
+			      <0x01c19800 0x4>,
+			      <0x01c1c800 0x4>;
+			reg-names = "phy_ctrl",
+				    "pmu0",
+				    "pmu1",
+				    "pmu2";
+			clocks = <&ccu CLK_USB_PHY0>,
+				 <&ccu CLK_USB_PHY1>,
+				 <&ccu CLK_USB_PHY2>;
+			clock-names = "usb0_phy",
+				      "usb1_phy",
+				      "usb2_phy";
+			resets = <&ccu RST_USB_PHY0>,
+				 <&ccu RST_USB_PHY1>,
+				 <&ccu RST_USB_PHY2>;
+			reset-names = "usb0_reset",
+				      "usb1_reset",
+				      "usb2_reset";
+			status = "disabled";
+			#phy-cells = <1>;
+		};
+
+		ehci1: usb at 1c19000 {
+			compatible = "allwinner,sun8i-r40-ehci", "generic-ehci";
+			reg = <0x01c19000 0x100>;
+			interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_OHCI1>,
+				 <&ccu CLK_BUS_EHCI1>,
+				 <&ccu CLK_USB_OHCI1>;
+			resets = <&ccu RST_BUS_OHCI1>,
+				 <&ccu RST_BUS_EHCI1>;
+			phys = <&usbphy 1>;
+			phy-names = "usb";
+			status = "disabled";
+		};
+
+		ohci1: usb at 1c19400 {
+			compatible = "allwinner,sun8i-r40-ohci", "generic-ohci";
+			reg = <0x01c19400 0x100>;
+			interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_OHCI1>,
+				 <&ccu CLK_USB_OHCI1>;
+			resets = <&ccu RST_BUS_OHCI1>;
+			phys = <&usbphy 1>;
+			phy-names = "usb";
+			status = "disabled";
+		};
+
+		ehci2: usb at 1c1c000 {
+			compatible = "allwinner,sun8i-r40-ehci", "generic-ehci";
+			reg = <0x01c1c000 0x100>;
+			interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_OHCI2>,
+				 <&ccu CLK_BUS_EHCI2>,
+				 <&ccu CLK_USB_OHCI2>;
+			resets = <&ccu RST_BUS_OHCI2>,
+				 <&ccu RST_BUS_EHCI2>;
+			phys = <&usbphy 2>;
+			phy-names = "usb";
+			status = "disabled";
+		};
+
+		ohci2: usb at 1c1c400 {
+			compatible = "allwinner,sun8i-r40-ohci", "generic-ohci";
+			reg = <0x01c1c400 0x100>;
+			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_OHCI2>,
+				 <&ccu CLK_USB_OHCI2>;
+			resets = <&ccu RST_BUS_OHCI2>;
+			phys = <&usbphy 2>;
+			phy-names = "usb";
+			status = "disabled";
+		};
+
 		ccu: clock at 1c20000 {
 			compatible = "allwinner,sun8i-r40-ccu";
 			reg = <0x01c20000 0x400>;
-- 
2.13.6

[PATCH 2/6] ARM: sun8i: r40: add USB host port nodes for R40

[Maxime Ripard]

On Sun, Oct 08, 2017 at 04:29:02AM +0000, Icenowy Zheng wrote:
> From: Icenowy Zheng <icenowy@aosc.xyz>
> 
> Allwinner R40 SoC features a USB OTG port and two USB HOST ports.
> 
> Add support for the host ports in the DTSI file.
> 
> The OTG controller still cannot work with existing compatibles, and needs
> more investigation. So it's not added yet.
> 
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
> ---
>  arch/arm/boot/dts/sun8i-r40.dtsi | 78 ++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 78 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
> index d5a6745409ae..f6c917cbbaac 100644
> --- a/arch/arm/boot/dts/sun8i-r40.dtsi
> +++ b/arch/arm/boot/dts/sun8i-r40.dtsi
> @@ -173,6 +173,84 @@
>  			#size-cells = <0>;
>  		};
>  
> +		usbphy: phy at 1c13400 {
> +			compatible = "allwinner,sun8i-r40-usb-phy";
> +			reg = <0x01c13400 0x14>,
> +			      <0x01c14800 0x4>,
> +			      <0x01c19800 0x4>,
> +			      <0x01c1c800 0x4>;
> +			reg-names = "phy_ctrl",
> +				    "pmu0",
> +				    "pmu1",
> +				    "pmu2";
> +			clocks = <&ccu CLK_USB_PHY0>,
> +				 <&ccu CLK_USB_PHY1>,
> +				 <&ccu CLK_USB_PHY2>;
> +			clock-names = "usb0_phy",
> +				      "usb1_phy",
> +				      "usb2_phy";
> +			resets = <&ccu RST_USB_PHY0>,
> +				 <&ccu RST_USB_PHY1>,
> +				 <&ccu RST_USB_PHY2>;
> +			reset-names = "usb0_reset",
> +				      "usb1_reset",
> +				      "usb2_reset";
> +			status = "disabled";
> +			#phy-cells = <1>;
> +		};
> +
> +		ehci1: usb at 1c19000 {
> +			compatible = "allwinner,sun8i-r40-ehci", "generic-ehci";
> +			reg = <0x01c19000 0x100>;

What is the actual size here?

> +			interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&ccu CLK_BUS_OHCI1>,
> +				 <&ccu CLK_BUS_EHCI1>,
> +				 <&ccu CLK_USB_OHCI1>;
> +			resets = <&ccu RST_BUS_OHCI1>,
> +				 <&ccu RST_BUS_EHCI1>;

Why do you need to take the OHCI resources too?

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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[PATCH 2/6] ARM: sun8i: r40: add USB host port nodes for R40

[Icenowy Zheng]

? 2017?10?10? GMT+08:00 ??5:03:40, Maxime Ripard <maxime.ripard@free-electrons.com> ??:
>On Sun, Oct 08, 2017 at 04:29:02AM +0000, Icenowy Zheng wrote:
>> From: Icenowy Zheng <icenowy@aosc.xyz>
>> 
>> Allwinner R40 SoC features a USB OTG port and two USB HOST ports.
>> 
>> Add support for the host ports in the DTSI file.
>> 
>> The OTG controller still cannot work with existing compatibles, and
>needs
>> more investigation. So it's not added yet.
>> 
>> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
>> ---
>>  arch/arm/boot/dts/sun8i-r40.dtsi | 78
>++++++++++++++++++++++++++++++++++++++++
>>  1 file changed, 78 insertions(+)
>> 
>> diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi
>b/arch/arm/boot/dts/sun8i-r40.dtsi
>> index d5a6745409ae..f6c917cbbaac 100644
>> --- a/arch/arm/boot/dts/sun8i-r40.dtsi
>> +++ b/arch/arm/boot/dts/sun8i-r40.dtsi
>> @@ -173,6 +173,84 @@
>>  			#size-cells = <0>;
>>  		};
>>  
>> +		usbphy: phy at 1c13400 {
>> +			compatible = "allwinner,sun8i-r40-usb-phy";
>> +			reg = <0x01c13400 0x14>,
>> +			      <0x01c14800 0x4>,
>> +			      <0x01c19800 0x4>,
>> +			      <0x01c1c800 0x4>;
>> +			reg-names = "phy_ctrl",
>> +				    "pmu0",
>> +				    "pmu1",
>> +				    "pmu2";
>> +			clocks = <&ccu CLK_USB_PHY0>,
>> +				 <&ccu CLK_USB_PHY1>,
>> +				 <&ccu CLK_USB_PHY2>;
>> +			clock-names = "usb0_phy",
>> +				      "usb1_phy",
>> +				      "usb2_phy";
>> +			resets = <&ccu RST_USB_PHY0>,
>> +				 <&ccu RST_USB_PHY1>,
>> +				 <&ccu RST_USB_PHY2>;
>> +			reset-names = "usb0_reset",
>> +				      "usb1_reset",
>> +				      "usb2_reset";
>> +			status = "disabled";
>> +			#phy-cells = <1>;
>> +		};
>> +
>> +		ehci1: usb at 1c19000 {
>> +			compatible = "allwinner,sun8i-r40-ehci", "generic-ehci";
>> +			reg = <0x01c19000 0x100>;
>
>What is the actual size here?

The OHCI/EHCI/PHY-PHY three parts are listed in the user manual
as one MMIO zone.

The size can be at most 0x400, as the OHCI is at offset 0x400.

>
>> +			interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
>> +			clocks = <&ccu CLK_BUS_OHCI1>,
>> +				 <&ccu CLK_BUS_EHCI1>,
>> +				 <&ccu CLK_USB_OHCI1>;
>> +			resets = <&ccu RST_BUS_OHCI1>,
>> +				 <&ccu RST_BUS_EHCI1>;
>
>Why do you need to take the OHCI resources too?

AW's strange design -- without OHCI resources taken EHCI
won't work.

>
>Maxime

[PATCH 2/6] ARM: sun8i: r40: add USB host port nodes for R40

[Maxime Ripard]

On Tue, Oct 10, 2017 at 07:24:28AM +0800, Icenowy Zheng wrote:
> >> +			interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
> >> +			clocks = <&ccu CLK_BUS_OHCI1>,
> >> +				 <&ccu CLK_BUS_EHCI1>,
> >> +				 <&ccu CLK_USB_OHCI1>;
> >> +			resets = <&ccu RST_BUS_OHCI1>,
> >> +				 <&ccu RST_BUS_EHCI1>;
> >
> >Why do you need to take the OHCI resources too?
> 
> AW's strange design -- without OHCI resources taken EHCI
> won't work.

How has this been tested?

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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[PATCH 2/6] ARM: sun8i: r40: add USB host port nodes for R40

[icenowy at aosc.io]

? 2017-10-16 17:32?Maxime Ripard ???
> On Tue, Oct 10, 2017 at 07:24:28AM +0800, Icenowy Zheng wrote:
>> >> +			interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
>> >> +			clocks = <&ccu CLK_BUS_OHCI1>,
>> >> +				 <&ccu CLK_BUS_EHCI1>,
>> >> +				 <&ccu CLK_USB_OHCI1>;
>> >> +			resets = <&ccu RST_BUS_OHCI1>,
>> >> +				 <&ccu RST_BUS_EHCI1>;
>> >
>> >Why do you need to take the OHCI resources too?
>> 
>> AW's strange design -- without OHCI resources taken EHCI
>> won't work.
> 
> How has this been tested?

As EHCI is probed before OHCI, this behavior is easy to
appear if the OHCI resources are removed.

> 
> Thanks!
> Maxime
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH 2/6] ARM: sun8i: r40: add USB host port nodes for R40

[Maxime Ripard]

On Mon, Oct 16, 2017 at 05:39:58PM +0800, icenowy at aosc.io wrote:
> ? 2017-10-16 17:32?Maxime Ripard ???
> > On Tue, Oct 10, 2017 at 07:24:28AM +0800, Icenowy Zheng wrote:
> > > >> +			interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
> > > >> +			clocks = <&ccu CLK_BUS_OHCI1>,
> > > >> +				 <&ccu CLK_BUS_EHCI1>,
> > > >> +				 <&ccu CLK_USB_OHCI1>;
> > > >> +			resets = <&ccu RST_BUS_OHCI1>,
> > > >> +				 <&ccu RST_BUS_EHCI1>;
> > > >
> > > >Why do you need to take the OHCI resources too?
> > > 
> > > AW's strange design -- without OHCI resources taken EHCI
> > > won't work.
> > 
> > How has this been tested?
> 
> As EHCI is probed before OHCI, this behavior is easy to
> appear if the OHCI resources are removed.

And what is "this behaviour" exactly?

What have you tested, what device did you connect, what is the outcome
that isn't something you expected, etc.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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[PATCH 2/6] ARM: sun8i: r40: add USB host port nodes for R40

[icenowy at aosc.io]

? 2017-10-16 20:06?Maxime Ripard ???
> On Mon, Oct 16, 2017 at 05:39:58PM +0800, icenowy at aosc.io wrote:
>> ? 2017-10-16 17:32?Maxime Ripard ???
>> > On Tue, Oct 10, 2017 at 07:24:28AM +0800, Icenowy Zheng wrote:
>> > > >> +			interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
>> > > >> +			clocks = <&ccu CLK_BUS_OHCI1>,
>> > > >> +				 <&ccu CLK_BUS_EHCI1>,
>> > > >> +				 <&ccu CLK_USB_OHCI1>;
>> > > >> +			resets = <&ccu RST_BUS_OHCI1>,
>> > > >> +				 <&ccu RST_BUS_EHCI1>;
>> > > >
>> > > >Why do you need to take the OHCI resources too?
>> > >
>> > > AW's strange design -- without OHCI resources taken EHCI
>> > > won't work.
>> >
>> > How has this been tested?
>> 
>> As EHCI is probed before OHCI, this behavior is easy to
>> appear if the OHCI resources are removed.
> 
> And what is "this behaviour" exactly?
> 
> What have you tested, what device did you connect, what is the outcome
> that isn't something you expected, etc.

Oh sorry this weird behavior doesn't exist on R40, although it do exist
on H3/H5/A64.

I will fix this in the next version.

> 
> Maxime

[PATCH 3/6] ARM: sun8i: r40: add 5V regulator for Banana Pi M2 Ultra

[Icenowy Zheng]

On newer revisions of the Banana Pi M2 Ultra boards, the 5V power output
(used by HDMI, SATA and USB) is controller via a GPIO.

Add the regulator node for it.

Older revisions just have the 5V power output always on, and the GPIO is
reserved on these boards. So it won't affect the older revisions.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
index 7b52608cebe6..035599d870b9 100644
--- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
+++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
@@ -78,6 +78,15 @@
 		};
 	};
 
+	reg_vcc5v0: vcc5v0 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&pio 7 23 GPIO_ACTIVE_HIGH>; /* PH23 */
+		enable-active-high;
+	};
+
 	wifi_pwrseq: wifi_pwrseq {
 		compatible = "mmc-pwrseq-simple";
 		reset-gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 WIFI_EN */
-- 
2.13.6

[PATCH 3/6] ARM: sun8i: r40: add 5V regulator for Banana Pi M2 Ultra

[Maxime Ripard]

On Sun, Oct 08, 2017 at 04:29:03AM +0000, Icenowy Zheng wrote:
> On newer revisions of the Banana Pi M2 Ultra boards, the 5V power output
> (used by HDMI, SATA and USB) is controller via a GPIO.
> 
> Add the regulator node for it.
> 
> Older revisions just have the 5V power output always on, and the GPIO is
> reserved on these boards. So it won't affect the older revisions.
> 
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> ---
>  arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
> index 7b52608cebe6..035599d870b9 100644
> --- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
> +++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
> @@ -78,6 +78,15 @@
>  		};
>  	};
>  
> +	reg_vcc5v0: vcc5v0 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vcc5v0";
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +		gpio = <&pio 7 23 GPIO_ACTIVE_HIGH>; /* PH23 */
> +		enable-active-high;

This is redundant with the GPIO flag

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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[PATCH 3/6] ARM: sun8i: r40: add 5V regulator for Banana Pi M2 Ultra

[Icenowy Zheng]

? 2017?10?10? GMT+08:00 ??5:04:07, Maxime Ripard <maxime.ripard@free-electrons.com> ??:
>On Sun, Oct 08, 2017 at 04:29:03AM +0000, Icenowy Zheng wrote:
>> On newer revisions of the Banana Pi M2 Ultra boards, the 5V power
>output
>> (used by HDMI, SATA and USB) is controller via a GPIO.
>> 
>> Add the regulator node for it.
>> 
>> Older revisions just have the 5V power output always on, and the GPIO
>is
>> reserved on these boards. So it won't affect the older revisions.
>> 
>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>> ---
>>  arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 9 +++++++++
>>  1 file changed, 9 insertions(+)
>> 
>> diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
>b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
>> index 7b52608cebe6..035599d870b9 100644
>> --- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
>> +++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
>> @@ -78,6 +78,15 @@
>>  		};
>>  	};
>>  
>> +	reg_vcc5v0: vcc5v0 {
>> +		compatible = "regulator-fixed";
>> +		regulator-name = "vcc5v0";
>> +		regulator-min-microvolt = <5000000>;
>> +		regulator-max-microvolt = <5000000>;
>> +		gpio = <&pio 7 23 GPIO_ACTIVE_HIGH>; /* PH23 */
>> +		enable-active-high;
>
>This is redundant with the GPIO flag

I remember someone suggested me to add this
property (maybe wens). It's said that the driver may not
process the GPIO_ACTIVE_HIGH correctly.

>
>Maxime

[linux-sunxi] Re: [PATCH 3/6] ARM: sun8i: r40: add 5V regulator for Banana Pi M2 Ultra

[Chen-Yu Tsai]

On Tue, Oct 10, 2017 at 7:25 AM, Icenowy Zheng <icenowy@aosc.io> wrote:
>
>
> ? 2017?10?10? GMT+08:00 ??5:04:07, Maxime Ripard <maxime.ripard@free-electrons.com> ??:
>>On Sun, Oct 08, 2017 at 04:29:03AM +0000, Icenowy Zheng wrote:
>>> On newer revisions of the Banana Pi M2 Ultra boards, the 5V power
>>output
>>> (used by HDMI, SATA and USB) is controller via a GPIO.
>>>
>>> Add the regulator node for it.
>>>
>>> Older revisions just have the 5V power output always on, and the GPIO
>>is
>>> reserved on these boards. So it won't affect the older revisions.
>>>
>>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>>> ---
>>>  arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 9 +++++++++
>>>  1 file changed, 9 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
>>b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
>>> index 7b52608cebe6..035599d870b9 100644
>>> --- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
>>> +++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
>>> @@ -78,6 +78,15 @@
>>>              };
>>>      };
>>>
>>> +    reg_vcc5v0: vcc5v0 {
>>> +            compatible = "regulator-fixed";
>>> +            regulator-name = "vcc5v0";
>>> +            regulator-min-microvolt = <5000000>;
>>> +            regulator-max-microvolt = <5000000>;
>>> +            gpio = <&pio 7 23 GPIO_ACTIVE_HIGH>; /* PH23 */
>>> +            enable-active-high;
>>
>>This is redundant with the GPIO flag
>
> I remember someone suggested me to add this
> property (maybe wens). It's said that the driver may not
> process the GPIO_ACTIVE_HIGH correctly.

I believe it was me. The fixed regulator driver has not migrated to
the GPIO descriptor API, and it doesn't look like it cares about the
GPIO flags.

ChenYu

[linux-sunxi] Re: [PATCH 3/6] ARM: sun8i: r40: add 5V regulator for Banana Pi M2 Ultra

[Maxime Ripard]

On Tue, Oct 10, 2017 at 02:25:35AM +0000, Chen-Yu Tsai wrote:
> On Tue, Oct 10, 2017 at 7:25 AM, Icenowy Zheng <icenowy@aosc.io> wrote:
> >
> >
> > ? 2017?10?10? GMT+08:00 ??5:04:07, Maxime Ripard <maxime.ripard@free-electrons.com> ??:
> >>On Sun, Oct 08, 2017 at 04:29:03AM +0000, Icenowy Zheng wrote:
> >>> On newer revisions of the Banana Pi M2 Ultra boards, the 5V power
> >>output
> >>> (used by HDMI, SATA and USB) is controller via a GPIO.
> >>>
> >>> Add the regulator node for it.
> >>>
> >>> Older revisions just have the 5V power output always on, and the GPIO
> >>is
> >>> reserved on these boards. So it won't affect the older revisions.
> >>>
> >>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> >>> ---
> >>>  arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 9 +++++++++
> >>>  1 file changed, 9 insertions(+)
> >>>
> >>> diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
> >>b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
> >>> index 7b52608cebe6..035599d870b9 100644
> >>> --- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
> >>> +++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
> >>> @@ -78,6 +78,15 @@
> >>>              };
> >>>      };
> >>>
> >>> +    reg_vcc5v0: vcc5v0 {
> >>> +            compatible = "regulator-fixed";
> >>> +            regulator-name = "vcc5v0";
> >>> +            regulator-min-microvolt = <5000000>;
> >>> +            regulator-max-microvolt = <5000000>;
> >>> +            gpio = <&pio 7 23 GPIO_ACTIVE_HIGH>; /* PH23 */
> >>> +            enable-active-high;
> >>
> >>This is redundant with the GPIO flag
> >
> > I remember someone suggested me to add this
> > property (maybe wens). It's said that the driver may not
> > process the GPIO_ACTIVE_HIGH correctly.
> 
> I believe it was me. The fixed regulator driver has not migrated to
> the GPIO descriptor API, and it doesn't look like it cares about the
> GPIO flags.

Maybe we should just migrate it then?

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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[PATCH 4/6] ARM: sun8i: v40: add 5V regulator for Banana Pi M2 Berry

[Icenowy Zheng]

On the Banana Pi M2 Berry board, the 5V power output (used by HDMI, SATA
and USB) is controlled via a GPIO.

Add regulator node for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
index 8a69be2a0842..fe16fc0eb518 100644
--- a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
+++ b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
@@ -72,6 +72,15 @@
 		};
 	};
 
+	reg_vcc5v0: vcc5v0 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&pio 7 23 GPIO_ACTIVE_HIGH>; /* PH23 */
+		enable-active-high;
+	};
+
 	wifi_pwrseq: wifi_pwrseq {
 		compatible = "mmc-pwrseq-simple";
 		reset-gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 WIFI_EN */
-- 
2.13.6

[PATCH 5/6] ARM: sun8i: r40: enable USB host for Banana Pi M2 Ultra

[Icenowy Zheng]

From: Icenowy Zheng <icenowy@aosc.xyz>

Banana Pi M2 Ultra board features two USB host ports, connected to the
two USB host ports on the SoC.

Add support for them.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
---
 arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
index 035599d870b9..8c5efe2a9881 100644
--- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
+++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
@@ -93,6 +93,14 @@
 	};
 };
 
+&ehci1 {
+	status = "okay";
+};
+
+&ehci2 {
+	status = "okay";
+};
+
 &i2c0 {
 	status = "okay";
 
@@ -180,8 +188,22 @@
 	status = "okay";
 };
 
+&ohci1 {
+	status = "okay";
+};
+
+&ohci2 {
+	status = "okay";
+};
+
 &uart0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart0_pb_pins>;
 	status = "okay";
 };
+
+&usbphy {
+	usb1_vbus-supply = <&reg_vcc5v0>;
+	usb2_vbus-supply = <&reg_vcc5v0>;
+	status = "okay";
+};
-- 
2.13.6

[PATCH 6/6] ARM: sun8i: v40: enable USB host ports for Banana Pi M2 Berry

[Icenowy Zheng]

Banana Pi M2 Berry has an on-board USB Hub that provides 4 USB Type-A
ports, and it's connected to the USB1 port of the SoC.

Enable it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
index fe16fc0eb518..45c17c8c5915 100644
--- a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
+++ b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
@@ -87,6 +87,10 @@
 	};
 };
 
+&ehci1 {
+	status = "okay";
+};
+
 &i2c0 {
 	status = "okay";
 
@@ -98,6 +102,10 @@
 	};
 };
 
+&ohci1 {
+	status = "okay";
+};
+
 #include "axp22x.dtsi"
 
 &reg_aldo3 {
@@ -171,3 +179,8 @@
 	pinctrl-0 = <&uart0_pb_pins>;
 	status = "okay";
 };
+
+&usbphy {
+	usb1_vbus-supply = <&reg_vcc5v0>;
+	status = "okay";
+};
-- 
2.13.6