From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9ABDBC433F5 for ; Wed, 1 Dec 2021 14:17:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:From:References:Cc:To:Subject:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=3froBRxpoTRgc1QmDYhXzoVMrvaP1J2dHxLnK6RAf48=; b=vXxut1Xzt7ZwZfXeuTJHXu4/nR f6qhpKMIAyeafMEP6ABeORSG2226e9wENzm10UzgWGB9imoRp+Ve06XBD7WzmGCd6bOiVZttBEtZC 7YRXAJWEn4Eue2vpwgE9/tAUKafn2Yzau2G34rOue1RPozURFhw2RxYbrGC4M0/SADG3faNS43xKt 7LQrW4lNLa2/lAtwffwi13/9oB9Ia4lxUNWUhLIorBiwrx9IQ50gH5DdpihrWBwxk9JQccGqDgnR4 UTuus0KrPoqzFcZzZUy4VYJcxnF0NQUqbbNKiMoBzhe3rh8ZAnam4hcLNC/BquVQyZMbgsUM2qhvH DOl2YvxA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1msQOr-008zsC-Ph; Wed, 01 Dec 2021 14:15:57 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1msQOo-008zrU-42 for linux-arm-kernel@lists.infradead.org; Wed, 01 Dec 2021 14:15:55 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A92EE106F; Wed, 1 Dec 2021 06:15:52 -0800 (PST) Received: from [10.57.0.220] (unknown [10.57.0.220]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 53DD03F5A1; Wed, 1 Dec 2021 06:15:51 -0800 (PST) Subject: Re: [PATCH 2/2] irqchip: nvic: Use GENERIC_IRQ_MULTI_HANDLER To: Arnd Bergmann Cc: Linux ARM , Russell King - ARM Linux , Mark Rutland , Marc Zyngier , Ard Biesheuvel References: <20211201110259.84857-1-vladimir.murzin@arm.com> <20211201110259.84857-2-vladimir.murzin@arm.com> <26a97bb9-9b00-b162-8924-6b77309365b8@arm.com> From: Vladimir Murzin Message-ID: <9cea0c85-33e6-6fce-f82a-22cd138e87d8@arm.com> Date: Wed, 1 Dec 2021 14:15:51 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211201_061554_251224_19755664 X-CRM114-Status: GOOD ( 23.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 12/1/21 2:05 PM, Arnd Bergmann wrote: > On Wed, Dec 1, 2021 at 2:43 PM Vladimir Murzin wrote: >> On 12/1/21 12:30 PM, Arnd Bergmann wrote: >>> On Wed, Dec 1, 2021 at 12:02 PM Vladimir Murzin wrote: >>>> >>>> Rather then restructuring the ARMv7M entrly logic per TODO, just move >>>> NVIC to GENERIC_IRQ_MULTI_HANDLER. >>>> >>>> Signed-off-by: Vladimir Murzin >>> >>> Acked-by: Arnd Bergmann >>> >>> Thanks for finishing this one off as well! I don't know if you did this as a >>> reaction to me doing the same for the three other platforms that don't >>> use GENERIC_IRQ_MULTI_HANDLER yet[1], or if this was just a lucky >>> coincidence. It sounds like this should be part of Ard's IRQ stack series >>> as well then (adding him to Cc), as it fits in with my patches there. >> >> It was reaction to Mark's TODO statement in his original submission [1]. >> I'd let maintainers to decide on the path it should land :) > > Ah, nice, so it was a coincidence after all. I guess my patches were easier > because of Mark's (and Marc's) earlier work on related bits. > >>> Would you mind also implementing and testing the missing bits >>> for the stack switching on nommu irq entry, corresponding to [2] so >>> we can just use that part unconditionally as well? >> >> I can have a look but no promises since I have few issues with NOMMU >> ATM (one of them seems to be cross-arch [2]) > > Yes, I saw that, but I'm not too worried about this on Arm, as we don't > support that combination (SMP without MMU) in any of our platforms or > in Kconfig without additional patches. That's true, yet it seems to be broken for other arches which seems to be supported (w/o additional patches?) > > What target are you actually testing on? > It is MPS3 board with range of FPGA images. M and R class supported yet AN536 (Cortex-R52x2) has issues which prevents it using in SMP; recent images for M class require new timer (which is WIP). I also have access to Fast Models - they are easier and quicker to test and do not require visiting office :) [1] https://developer.arm.com/tools-and-software/development-boards/fpga-prototyping-boards/download-fpga-images Cheers Vladimir > Arnd > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel