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Thu, 10 Sep 2020 21:52:06 -0500 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 10 Sep 2020 21:52:06 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 10 Sep 2020 21:52:06 -0500 Received: from [10.250.66.47] (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 08B2q47k122740; Thu, 10 Sep 2020 21:52:04 -0500 Subject: Re: [v4,3/4] reset-controller: ti: introduce a new reset handler To: Crystal Guo , "p.zabel@pengutronix.de" , "robh+dt@kernel.org" , "matthias.bgg@gmail.com" References: <20200817030324.5690-1-crystal.guo@mediatek.com> <20200817030324.5690-4-crystal.guo@mediatek.com> <3a5decee-5f31-e27d-a120-1f835241a87c@ti.com> <1599620279.14806.18.camel@mhfsdcap03> <096362e9-dee8-4e7a-2518-47328068c2fd@ti.com> <1599792140.14806.22.camel@mhfsdcap03> From: Suman Anna Message-ID: <9d72aaef-49fe-ebb6-215d-05ad3ab27af4@ti.com> Date: Thu, 10 Sep 2020 21:52:04 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <1599792140.14806.22.camel@mhfsdcap03> Content-Language: en-US X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200910_225209_267096_5720F257 X-CRM114-Status: GOOD ( 30.63 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "devicetree@vger.kernel.org" , =?UTF-8?B?WW9uZyBMaWFuZyAo5qKB5YuHKQ==?= , srv_heupstream , =?UTF-8?B?U2VpeWEgV2FuZyAo546L6L+65ZCbKQ==?= , "linux-kernel@vger.kernel.org" , =?UTF-8?B?RmFuIENoZW4gKOmZs+WHoSk=?= , "linux-mediatek@lists.infradead.org" , =?UTF-8?B?WWluZ2pvZSBDaGVuICjpmbPoi7HmtLIp?= , =?UTF-8?B?U3RhbmxleSBDaHUgKOacseWOn+mZnik=?= , "linux-arm-kernel@lists.infradead.org" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 9/10/20 9:42 PM, Crystal Guo wrote: > On Wed, 2020-09-09 at 23:39 +0800, Suman Anna wrote: >> On 9/8/20 9:57 PM, Crystal Guo wrote: >>> On Thu, 2020-09-03 at 07:40 +0800, Suman Anna wrote: >>>> Hi Crystal, >>>> >>>> On 8/16/20 10:03 PM, Crystal Guo wrote: >>>>> Introduce ti_syscon_reset() to integrate assert and deassert together. >>>>> If some modules need do serialized assert and deassert operations >>>>> to reset itself, reset_control_reset can be called for convenience. >>>> >>>> There are multiple changes in this same patch. I think you should split this >>>> functionality away from the change for the regmap_update_bits() to >>>> regmap_write_bits(), similar to what you have done in your v2 Patch 4. >>>> >>> >>> Thanks for your suggestion. >>> I will split this patch in the next version. >>> >>>>> >>>>> Such as reset-qcom-aoss.c, it integrates assert and deassert together >>>>> by 'reset' method. MTK Socs also need this method to perform reset. >>>>> >>>>> Signed-off-by: Crystal Guo >>>>> --- >>>>> drivers/reset/reset-ti-syscon.c | 26 ++++++++++++++++++++++++-- >>>>> 1 file changed, 24 insertions(+), 2 deletions(-) >>>>> >>>>> diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c >>>>> index a2635c21db7f..08289342f9af 100644 >>>>> --- a/drivers/reset/reset-ti-syscon.c >>>>> +++ b/drivers/reset/reset-ti-syscon.c >>>>> @@ -15,6 +15,7 @@ >>>>> * GNU General Public License for more details. >>>>> */ >>>>> >>>>> +#include >>>>> #include >>>>> #include >>>>> #include >>>>> @@ -56,6 +57,7 @@ struct ti_syscon_reset_data { >>>>> struct regmap *regmap; >>>>> struct ti_syscon_reset_control *controls; >>>>> unsigned int nr_controls; >>>>> + unsigned int reset_duration_us; >>>>> }; >>>>> >>>>> #define to_ti_syscon_reset_data(rcdev) \ >>>>> @@ -89,7 +91,7 @@ static int ti_syscon_reset_assert(struct reset_controller_dev *rcdev, >>>>> mask = BIT(control->assert_bit); >>>>> value = (control->flags & ASSERT_SET) ? mask : 0x0; >>>>> >>>>> - return regmap_update_bits(data->regmap, control->assert_offset, mask, value); >>>>> + return regmap_write_bits(data->regmap, control->assert_offset, mask, value); >>>>> } >>>>> >>>>> /** >>>>> @@ -120,7 +122,7 @@ static int ti_syscon_reset_deassert(struct reset_controller_dev *rcdev, >>>>> mask = BIT(control->deassert_bit); >>>>> value = (control->flags & DEASSERT_SET) ? mask : 0x0; >>>>> >>>>> - return regmap_update_bits(data->regmap, control->deassert_offset, mask, value); >>>>> + return regmap_write_bits(data->regmap, control->deassert_offset, mask, value); >>>>> } >>>>> >>>>> /** >>>>> @@ -158,9 +160,26 @@ static int ti_syscon_reset_status(struct reset_controller_dev *rcdev, >>>>> !(control->flags & STATUS_SET); >>>>> } >>>>> >>>>> +static int ti_syscon_reset(struct reset_controller_dev *rcdev, >>>>> + unsigned long id) >>>>> +{ >>>>> + struct ti_syscon_reset_data *data = to_ti_syscon_reset_data(rcdev); >>>>> + int ret; >>>>> + >>>>> + ret = ti_syscon_reset_assert(rcdev, id); >>>>> + if (ret) >>>>> + return ret; >>>>> + >>>>> + if (data->reset_duration_us) >>>>> + usleep_range(data->reset_duration_us, data->reset_duration_us * 2); >>>>> + >>>>> + return ti_syscon_reset_deassert(rcdev, id); >>>> >>>> I echo Philipp's comments [1] from your original v1 series about this. We don't >>>> need a property to distinguish this, but you could add a flag using match data >>>> and Mediatek compatible, and use that within this function, or optionally set >>>> this ops based on compatible (whatever is preferred by Philipp). >>>> >>>> regards >>>> Suman >>>> >>>> [1] https://patchwork.kernel.org/comment/23519193/ >>>> >>> Hi Suman, Philipp >>> >>> Which method would you recommend more? >>> 1. like v2 patch, but assign the flag "data->assert_deassert_together" >>> directly (maybe rename "assert_deassert_together" to >>> "reset_op_available") >>> >>> 2. use Mediatek compatible to decide the reset handler available or not. >> >> I would go with this option. Anyway, I think you might have to add the reset SoC >> data as well, based on Rob's comment on the binding. >> >> regards >> Suman > > > Thanks for your suggestions > I will add the following changes in the next version, > please correct me if there is any misunderstanding. > 1). revert ti-syscon-reset.txt add a new mediatek reset binding doc. > 2). split the patch [v4,3/4] with the change for the > regmap_update_bits() to regmap_write_bits() and the change to integrate > assert and deassert together. > 3). add the reset SoC data, which contains the flag "reset_op_available" > to decide the reset handler available or not. You would also need to add your SoC-specific data equivalent of the current ti,reset-bits in your infra node. Please see Rob's comments on patch 2. Also, your new Mediatek binding should be in YAML format. regards Suman > 4). separate the dts patch from this patch sets > >>> >>> Thanks >>> Crystal >>> >>>>> +} >>>>> + >>>>> static const struct reset_control_ops ti_syscon_reset_ops = { >>>>> .assert = ti_syscon_reset_assert, >>>>> .deassert = ti_syscon_reset_deassert, >>>>> + .reset = ti_syscon_reset, >>>>> .status = ti_syscon_reset_status, >>>>> }; >>>>> >>>>> @@ -204,6 +223,9 @@ static int ti_syscon_reset_probe(struct platform_device *pdev) >>>>> controls[i].flags = be32_to_cpup(list++); >>>>> } >>>>> >>>>> + of_property_read_u32(pdev->dev.of_node, "reset-duration-us", >>>>> + &data->reset_duration_us); >>>>> + >>>>> data->rcdev.ops = &ti_syscon_reset_ops; >>>>> data->rcdev.owner = THIS_MODULE; >>>>> data->rcdev.of_node = np; >>>>> >>>> >>> >> > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel