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From: Yong Wu <yong.wu@mediatek.com>
To: Will Deacon <will@kernel.org>, <yf.wang@mediatek.com>
Cc: Robin Murphy <robin.murphy@arm.com>,
	Joerg Roedel <joro@8bytes.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	"Isaac J. Manjarres" <isaacm@codeaurora.org>,
	Georgi Djakov <quic_c_gdjako@quicinc.com>,
	"Sven Peter" <sven@svenpeter.dev>,
	"moderated list:ARM SMMU DRIVERS"
	<linux-arm-kernel@lists.infradead.org>,
	"open list:IOMMU DRIVERS" <iommu@lists.linux-foundation.org>,
	open list <linux-kernel@vger.kernel.org>,
	"moderated list:ARM/Mediatek SoC support"
	<linux-mediatek@lists.infradead.org>, <wsd_upstream@mediatek.com>,
	Libo Kang <Libo.Kang@mediatek.com>,
	Miles Chen <miles.chen@mediatek.com>,
	Ning Li <ning.li@mediatek.com>
Subject: Re: [PATCH v8 1/3] iommu/io-pgtable-arm-v7s: Add a quirk to allow pgtable PA up to 35bit
Date: Wed, 15 Jun 2022 14:32:31 +0800	[thread overview]
Message-ID: <9ef61bb49dec1526b807f6dc7a36297a2cebab88.camel@mediatek.com> (raw)
In-Reply-To: <20220614125630.GA8159@willie-the-truck>

On Tue, 2022-06-14 at 13:56 +0100, Will Deacon wrote:
> > @@ -74,17 +74,22 @@ struct io_pgtable_cfg {
> >  	 *	to support up to 35 bits PA where the bit32, bit33 and
> > bit34 are
> >  	 *	encoded in the bit9, bit4 and bit5 of the PTE respectively.
> >  	 *
> > +	 * IO_PGTABLE_QUIRK_ARM_MTK_TTBR_EXT: (ARM v7s format) MediaTek
> > IOMMUs
> > +	 *	extend the translation table base support up to 35 bits PA,
> > the
> > +	 *	encoding format is same with IO_PGTABLE_QUIRK_ARM_MTK_EXT.
> > +	 *
> 
> One thing I don't get is how the existing driver handles this. It
> seems
> as though if the HAS_4GB_MODE flag is not set, then we set oas to 35
> but
> without any pgtable changes. How does this work?

Regarding the pgtable, we already use the quirk
IO_PGTABLE_QUIRK_ARM_MTK_EXT to support 35bits oas.

HAS_4GB_MODE is the flag for the previous SoC that only supports 33bits
oas, it also is covered by IO_PGTABLE_QUIRK_ARM_MTK_EXT. and in 4GB
mode we add PA32 manually in mtk_iommu_map.

> 
> If it turns out that the existing devices can't handle 35-bit PAs,
> then
> could we use an oas of 35 to indicate that this new format is in use
> instead of introducing another quirk?

The existed devices can handle 35bits oas. The problem is that if
the pgtable PA could support up to 35bits. The previous SoC like mt8173
can't support while the lastest SoC can. This is the purpose of this
new quick. therefore we need GFP_DMA/DMA32 for pgtable allocating in
mt8173 and GFP_DMA/DMA32 is not needed in the new quirk.

> 
> Will
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  reply	other threads:[~2022-06-15  6:33 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-11 10:26 [PATCH v8 0/3] iommu/mediatek: TTBR up to 35bit support yf.wang
2022-06-11 10:26 ` [PATCH v8 1/3] iommu/io-pgtable-arm-v7s: Add a quirk to allow pgtable PA up to 35bit yf.wang
2022-06-14 12:56   ` Will Deacon
2022-06-15  6:32     ` Yong Wu [this message]
2022-06-15 14:14     ` yf.wang
2022-06-11 10:26 ` [PATCH v8 2/3] iommu/mediatek: Rename MTK_IOMMU_TLB_ADDR to MTK_IOMMU_ADDR yf.wang
2022-06-13 12:03   ` Yong Wu
2022-06-14 17:24   ` Miles Chen
2022-06-11 10:26 ` [PATCH v8 3/3] iommu/mediatek: Allow page table PA up to 35bit yf.wang
2022-06-13 12:04   ` Yong Wu
2022-06-14 17:24   ` Miles Chen

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