From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F01F6C43381 for ; Wed, 17 Mar 2021 10:49:53 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9873664F3A for ; Wed, 17 Mar 2021 10:49:53 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9873664F3A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:Cc:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Mg8V8hjjqBQVJwsJd+Hu6bGn+oOQ6XD2OculcWX+riw=; b=NMYIGa30K1zrB5T/ujjnA28x+ ow8uRU5rRGbdHD2+RL+GdwxaJFSvLtJwxDpIBMBfWgtplNIY30JWZCifGRB+FQgy0qer14BiSv6Tw dRPYffwmH2kjR5v62j4r3fVWoEhc64yuosZWpc+Jb3nq7A822+n6uIUN+5QW+NG1szv62cE2LByQN bo/+f2XJPcHT8aO1DA6Lu4gmsrf5FtoFx2rsiQgkYAxh8k6XaIS1I8PxCc/WaUXmRKiXs3OcKxx5x iLs84kzV0GTTXg3qWpwtgwdU4vyhN3EqSbqXuUTu9Yt2pWaqanJDrx+J+HWsm4u5CQaACtTy5OVay lK76VAQ2Q==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lMTiu-002xms-IT; Wed, 17 Mar 2021 10:48:20 +0000 Received: from foss.arm.com ([217.140.110.172]) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lMTif-002xi2-Rk for linux-arm-kernel@lists.infradead.org; Wed, 17 Mar 2021 10:48:09 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 91D83D6E; Wed, 17 Mar 2021 03:48:03 -0700 (PDT) Received: from [10.57.17.188] (unknown [10.57.17.188]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0F4AC3F70D; Wed, 17 Mar 2021 03:48:01 -0700 (PDT) Subject: Re: [PATCH v4 10/19] coresight: etm-perf: Allow an event to use different sinks To: Mathieu Poirier Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, mike.leach@linaro.org, anshuman.khandual@arm.com, leo.yan@linaro.org, Linu Cherian References: <20210225193543.2920532-1-suzuki.poulose@arm.com> <20210225193543.2920532-11-suzuki.poulose@arm.com> <20210316202345.GE1387186@xps15> From: Suzuki K Poulose Message-ID: <9f13fcc6-ae8f-9a29-8cf3-993d200b5535@arm.com> Date: Wed, 17 Mar 2021 10:47:56 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.0 MIME-Version: 1.0 In-Reply-To: <20210316202345.GE1387186@xps15> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210317_104807_858915_44D6D1B9 X-CRM114-Status: GOOD ( 43.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 3/16/21 8:23 PM, Mathieu Poirier wrote: > On Thu, Feb 25, 2021 at 07:35:34PM +0000, Suzuki K Poulose wrote: >> When a sink is not specified by the user, the etm perf driver >> finds a suitable sink automatically, based on the first ETM >> where this event could be scheduled. Then we allocate the >> sink buffer based on the selected sink. This is fine for a >> CPU bound event as the "sink" is always guaranteed to be >> reachable from the ETM (as this is the only ETM where the >> event is going to be scheduled). However, if we have a thread >> bound event, the event could be scheduled on any of the ETMs >> on the system. In this case, currently we automatically select >> a sink and exclude any ETMs that cannot reach the selected >> sink. This is problematic especially for 1x1 configurations. >> We end up in tracing the event only on the "first" ETM, >> as the default sink is local to the first ETM and unreachable >> from the rest. However, we could allow the other ETMs to >> trace if they all have a sink that is compatible with the >> "selected" sink and can use the sink buffer. This can be >> easily done by verifying that they are all driven by the >> same driver and matches the same subtype. Please note >> that at anytime there can be only one ETM tracing the event. >> >> Adding support for different types of sinks for a single >> event is complex and is not something that we expect >> on a sane configuration. >> >> Cc: Mathieu Poirier >> Cc: Mike Leach >> Tested-by: Linu Cherian >> Signed-off-by: Suzuki K Poulose >> --- >> Changes: >> - Rename sinks_match => sinks_compatible >> - Tighten the check by matching the sink subtype >> - Use user_sink instead of "sink_forced" and clean up the code (Mathieu) >> - More comments, better commit description >> --- >> .../hwtracing/coresight/coresight-etm-perf.c | 60 ++++++++++++++++--- >> 1 file changed, 52 insertions(+), 8 deletions(-) >> >> diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c >> index 0f603b4094f2..aa0974bd265b 100644 >> --- a/drivers/hwtracing/coresight/coresight-etm-perf.c >> +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c >> @@ -232,6 +232,25 @@ static void etm_free_aux(void *data) >> schedule_work(&event_data->work); >> } >> >> +/* >> + * Check if two given sinks are compatible with each other, >> + * so that they can use the same sink buffers, when an event >> + * moves around. >> + */ >> +static bool sinks_compatible(struct coresight_device *a, >> + struct coresight_device *b) >> +{ >> + if (!a || !b) >> + return false; >> + /* >> + * If the sinks are of the same subtype and driven >> + * by the same driver, we can use the same buffer >> + * on these sinks. >> + */ >> + return (a->subtype.sink_subtype == b->subtype.sink_subtype) && >> + (sink_ops(a) == sink_ops(b)); > > Ok > >> +} >> + >> static void *etm_setup_aux(struct perf_event *event, void **pages, >> int nr_pages, bool overwrite) >> { >> @@ -239,6 +258,7 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, >> int cpu = event->cpu; >> cpumask_t *mask; >> struct coresight_device *sink = NULL; >> + struct coresight_device *user_sink = NULL, *last_sink = NULL; >> struct etm_event_data *event_data = NULL; >> >> event_data = alloc_event_data(cpu); >> @@ -249,7 +269,7 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, >> /* First get the selected sink from user space. */ >> if (event->attr.config2) { >> id = (u32)event->attr.config2; >> - sink = coresight_get_sink_by_id(id); >> + sink = user_sink = coresight_get_sink_by_id(id); >> } >> >> mask = &event_data->mask; >> @@ -277,14 +297,33 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, >> } >> >> /* >> - * No sink provided - look for a default sink for one of the >> - * devices. At present we only support topology where all CPUs >> - * use the same sink [N:1], so only need to find one sink. The >> - * coresight_build_path later will remove any CPU that does not >> - * attach to the sink, or if we have not found a sink. >> + * No sink provided - look for a default sink for all the ETMs, >> + * where this event can be scheduled. >> + * We allocate the sink specific buffers only once for this >> + * event. If the ETMs have different default sink devices, we >> + * can only use a single "type" of sink as the event can carry >> + * only one sink specific buffer. Thus we have to make sure >> + * that the sinks are of the same type and driven by the same >> + * driver, as the one we allocate the buffer for. As such >> + * we choose the first sink and check if the remaining ETMs >> + * have a compatible default sink. We don't trace on a CPU >> + * if the sink is not compatible. >> */ >> - if (!sink) >> + if (!user_sink) { >> + /* Find the default sink for this ETM */ >> sink = coresight_find_default_sink(csdev); >> + if (!sink) { >> + cpumask_clear_cpu(cpu, mask); >> + continue; >> + } >> + >> + /* Check if this sink compatible with the last sink */ >> + if (last_sink && !sinks_compatible(last_sink, sink)) { >> + cpumask_clear_cpu(cpu, mask); >> + continue; >> + } >> + last_sink = sink; > > This is much better. > > I thought about something when I first looked a this patch in the previous > revision... With the above we are changing the behavior of the CS framework for > systems that have one sink per CPU _clusters_, but for once it is for the better. > > With this patch coresight_find_default_sink() is called for every CPU, > allowing CPUs in the second cluster to find a valid path and be included in the > trace session. Before this patch CPUs in the second cluster couldn't > establish a valid path to the sink since it was only reachable from the first > cluster. Exactly. That is the whole purpose of this patch. i.e, to allow tracing on all CPUs with a per-cpu sink configuration. > > Reviewed-by: Mathieu Poirier Thanks Suzuki _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel