Re: [RESEND,v2 1/2] dt-bindings: memory-controllers: mtk-smi: Add support for mt8189

["Zhengnan Chen (陈征南)" <Zhengnan.Chen@mediatek.com>]

On Tue, 2026-04-28 at 08:26 +0200, Krzysztof Kozlowski wrote:
> On Mon, Apr 27, 2026 at 03:04:28PM +0800, mtk20898 wrote:
> >  properties:
> >    compatible:
> >      oneOf:
> > @@ -40,6 +55,8 @@ properties:
> >            - mediatek,mt8186-smi-common
> >            - mediatek,mt8188-smi-common-vdo
> >            - mediatek,mt8188-smi-common-vpp
> > +          - mediatek,mt8189-smi-common
> > +          - mediatek,mt8189-smi-sub-common
> >            - mediatek,mt8192-smi-common
> >            - mediatek,mt8195-smi-common-vdo
> >            - mediatek,mt8195-smi-common-vpp
> > @@ -108,19 +125,23 @@ allOf:
> >          compatible:
> >            contains:
> >              enum:
> > +              - mediatek,mt8189-smi-sub-common
> >                - mediatek,mt8195-smi-sub-common
> >      then:
> >        required:
> >          - mediatek,smi
> >        properties:
> >          clocks:
> > -          minItems: 3
> > +          minItems: 2
> 
> Same problem as v2 before resend.
> 
> Please explain me how mt8195 requires three clocks. You can prove it
> by
> trying a malformed DTS (past here the snippet/diff) and pasting here
> the
> validation error.
> 
> 
> Best regards,
> Krzysztof
> 
The mt8195 smi-sub-comm has a three-clock configuration, for example:
smi_sub_common_cam_7x1: smi@16005000 {
	 compatible = "mediatek,mt8195-smi-sub-common";
	 reg = <0 0x16005000 0 0x1000>;
	 clocks = <&camsys CLK_CAM_LARB14>,
			  <&camsys CLK_CAM_CAM2MM1_GALS>,
			  <&vppsys0 CLK_VPP0_GALS_IMGSYS_CAMSYS>;
	 clock-names = "apb", "smi", "gals0";
	 mediatek,smi = <&smi_common_vpp>;
	 power-domains = <&spm MT8195_POWER_DOMAIN_CAM>;
};

but mt8189 smi-sub-comm only requires 2 clock cycles,
there is no case where three clock cycles are needed, for example:
smi_cam_3x1_sub_comm: smi@1a00c000 {
	compatible = "mediatek,mt8189-smi-sub-common";
	reg = <0 0x1a00c000 0 0x1000>;
	clocks = <&camsys_main_clk CLK_CAM_M_CAM2MM_GALS>,
		 <&camsys_main_clk CLK_CAM_M_CAM2MM_GALS>;
	clock-names = "apb", "smi";
	power-domains = <&spm MT8189_POWER_DOMAIN_CAM_MAIN>;
	mediatek,smi = <&smi_disp_common>;
};

Our current approach is rather lenient. 

If stricter restrictions are needed, it should be revised. 
We want to change it to a format similar to the following:

allOf:
  # Generic rule: only sub-common nodes can have mediatek,smi
  - if:
      properties:
        compatible:
          contains:
            pattern: "^mediatek,mt[0-9]+-smi-sub-common$"
    then:
      required:
        - mediatek,smi
    else:
      properties:
        mediatek,smi: false

  # Group A: sub-common SoCs with exactly 2 clocks
  - if:
      properties:
        compatible:
          contains:
            enum:
              - mediatek,mt8189-smi-sub-common
    then:
      properties:
        clocks:
          minItems: 2
          maxItems: 2
        clock-names:
          minItems: 2
          maxItems: 2
          items:
            - const: apb
            - const: smi

  # Group B: sub-common SoCs with exactly 3 clocks
  - if:
      properties:
        compatible:
          contains:
            enum:
              - mediatek,mt8195-smi-sub-common
    then:
      properties:
        clocks:
          minItems: 3
          maxItems: 3
        clock-names:
          minItems: 3
          maxItems: 3
          items:
            - const: apb
            - const: smi
            - const: gals0
			
Is this writing okay?