From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B2299EB64DC for ; Thu, 20 Jul 2023 09:36:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:From:References:CC:To:Subject: MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=AbJ5v5jHYX4cpv77Xk4SWh3gqQJlXhRJfkhzwKgAUVk=; b=exXsr/cpGX2A8Q lJ9VO0SmQgYCMU0h5hBXZl96PU5JFn8qToNI8Q5zjWj94BWSpGco7NXCMGkFbWU9cSA0I1Z6rMilb Mo1gBi5Ulh4EXIOIIzf6jcYiOGNRLzWowrcZLoge5GAEg2mz+yBlmLDqGeKKv1NMg+c+IuUAtnzus siENnRAVH96JaihqoyUjoNJ+6fKILvdqNd3zSL4vF0zebIoeTguKSqUefpOiVK9MOPeKDrWFr2xwe 9NRVE+WrYZJp8T9PIExy8YpcWbDBTDxQM6uyxqKn0Q4uoU9HxppnoiCFew6mhSD4qOsrANcsxep4V TNITy5t7NvqehFF+ttmA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qMQ55-00AYWm-2D; Thu, 20 Jul 2023 09:36:19 +0000 Received: from lelv0142.ext.ti.com ([198.47.23.249]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qMQ52-00AYUj-2f for linux-arm-kernel@lists.infradead.org; Thu, 20 Jul 2023 09:36:18 +0000 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 36K9a8IR001950; Thu, 20 Jul 2023 04:36:08 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1689845768; bh=Dnt9wmoI6Y4KkKZIBmTnRBQCPVwxJXMNz/kAajIElsk=; h=Date:Subject:To:CC:References:From:In-Reply-To; b=CHBMtF5swqadytcwAnLmehE/lci7ywPp6C3TeWnP5aesGNQB65ug/dOu5YnaiKh6S BpBa3CNy3HMs6IxLgaV7lLN6dNa135Np8A+6AxYcnLi7cIVUqeXCqk9cMDEFryJ1K9 BTCv7T3wuROVkesrySQgsQD4BXArVhcnbpijKnbs= Received: from DFLE110.ent.ti.com (dfle110.ent.ti.com [10.64.6.31]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 36K9a867087339 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 20 Jul 2023 04:36:08 -0500 Received: from DFLE107.ent.ti.com (10.64.6.28) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 20 Jul 2023 04:36:07 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 20 Jul 2023 04:36:07 -0500 Received: from [172.24.227.112] (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 36K9a4FJ111420; Thu, 20 Jul 2023 04:36:05 -0500 Message-ID: <9f5d52fc-f9da-1429-1f97-bdec16d80a43@ti.com> Date: Thu, 20 Jul 2023 15:06:03 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH v5 3/5] arm64: dts: ti: k3-j784s4: Add WIZ and SERDES PHY nodes Content-Language: en-US To: Nishanth Menon , Andrew Davis CC: , , , , , , , References: <20230710101705.154119-1-j-choudhary@ti.com> <20230710101705.154119-4-j-choudhary@ti.com> <20230712141828.lnpo4mhd5dv34rlz@census> <18310450-05f3-172c-e4bc-fda114f333a4@ti.com> <20230713182107.ashuygyg4x4j77s5@backboard> <20230713185835.ek5jskqyengvba56@ascertain> From: Jayesh Choudhary In-Reply-To: <20230713185835.ek5jskqyengvba56@ascertain> X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230720_023617_038222_345AED7E X-CRM114-Status: GOOD ( 22.83 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 14/07/23 00:28, Nishanth Menon wrote: > On 13:31-20230713, Andrew Davis wrote: >> On 7/13/23 1:21 PM, Nishanth Menon wrote: >>> On 21:01-20230713, Jayesh Choudhary wrote: >>>> >>>> >>>> On 12/07/23 19:48, Nishanth Menon wrote: >>>>> On 15:47-20230710, Jayesh Choudhary wrote: >>>>>> From: Siddharth Vadapalli >>>>>> >>>>>> J784S4 SoC has 4 Serdes instances along with their respective WIZ >>>>>> instances. Add device-tree nodes for them and disable them by default. >>>>>> >>>>>> Signed-off-by: Siddharth Vadapalli >>>>>> [j-choudhary@ti.com: fix serdes_wiz clock order] >>>>>> Signed-off-by: Jayesh Choudhary >>>>>> --- >>>>> NAK. This patch introduces the following dtbs_check warning. >>>>> arch/arm64/boot/dts/ti/k3-am69-sk.dtb: serdes-refclk: 'clock-frequency' is a required property >>>>> >>>> >>>> Sorry for this. This property was added in the final board file. >>>> I will fix it in the next revision. >>>> I will add '0' as clock-property in the main file similar to j721e[1] >>>> which will be overridden in the board file with required value to get >>>> rid of this warning. >>> >>> That would follow what renesas (r8a774a1.dtsi) and imx >>> (imx8dxl-ss-conn.dtsi) seem to be doing as well. Just make sure to add >>> documentation to the property to indicate expectation. Unless someone >>> has objections to this approach. >>> >> >> Would it work better to disable these nodes, only enabling them in the >> board files when a real clock-frequency can be provided? >> >> My initial reaction would be to move the whole external reference clock >> node to the board file since that is where it is provided, but seems >> that would cause more churn in serdes_wiz* nodes than we would want.. > > I would prefer that as well, but I have'nt gone around looking for > similar examples on other SoCs (Jayesh, can you check?). One other > approach (alipine and few other places) has been for the bootloader to > update the property set in dtb as 0, which is not needed in this case > to the best of what I see.. just hoping we use a technique that most > board folks are familiar with across SoCs. > I can see the clock nodes in board files for some vendors. But like Andrew said, that would cause issues with serdes_wiz node in the main.dtsi. So I think it would be better to keep the external clock node in main dtsi itself. I will add comments to the property to indicate that this value will be over-written in board dts. Posting v6 to address these comments and others on the series. Thanks, Jayesh _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel