From mboxrd@z Thu Jan 1 00:00:00 1970 From: embed3d@gmail.com (Philipp Rossak) Date: Tue, 13 Feb 2018 12:32:15 +0100 Subject: BUG: A31s Not booting anymore In-Reply-To: References: Message-ID: <9f7123d1-a14b-c51a-d7a8-63c58a3f83dd@gmail.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 13.02.2018 03:59, Chen-Yu Tsai wrote: > On Tue, Feb 13, 2018 at 9:25 AM, Philipp Rossak wrote: >> >> >> On 12.02.2018 19:21, Philipp Rossak wrote: >>> >>> Hey, >>> >>> When I try to boot my A31s (Bananapi M2) u-boot is showing only Starting >>> kernel ... . After enabling the earlyprintk I could capture this log: [1]. >>> >>> After reverting those 5 commits from Chen-Yu I was able to boot again: >>> >>> >>> clk: sunxi-ng: Support fixed post-dividers on NM style clocks >>> 7d333ef1cc1b8c8951f3a2c41f6406e2295d8be9 >>> >>> clk: sunxi-ng: sun8i: a83t: Add /2 fixed post divider to audio PLL >>> 10e6eb4f2c5b35ae71c9bc0db83d74238719b453 >>> >>> clk: sunxi-ng: sun8i: a83t: Use sigma-delta modulation for audio PLL >>> e952ca3c6b2ffdfbf9618e4bd3e9aad1ff3f5eb4 >>> >>> clk: sunxi-ng: Support fixed post-dividers on MP style clocks >>> 946797aa3f08e2f6f5992f3ec2be44791e9b9260 >>> >>> clk: sunxi-ng: sun50i: a64: Add 2x fixed post-divider to MMC module clocks >>> 83fe3be4d1974f5f50c5e2039a1609f4960e8579 >>> >>> >>> I allready tried to fix it with making them save against zero: >>> >>> if (cmp->common.features & CCU_FEATURE_FIXED_POSTDIV && \ >>> cmp->fixed_post_div with) >>> rate *= cmp->fixed_post_div; >>> >>> But that didn't help. >>> >>> Any ideas? >>> >>> Regards, >>> Philipp >>> >>> [1]: https://pastebin.com/64Fzzqvg >> >> >> It took me some time, but I have now a few more infos: >> >> Right now the code breaks at this point here [1], with this clock [2]. >> If we have a look now at the clock config [3], we see here a table which is >> an u8 array and also a fixed_predivs struct. > > The u8 array is for mapping the parents from the index in the parents > array to the actual register value you listed below. > > How are you figuring out which clock is triggering this? Because that > is not even the right type of clock. The backtrace you posted shows > the error occurring in a DIV or M type clock, not the MP type you > are pointing to. > > Could you add some noisy printk calls to the sunxi_ccu_probe() > function in drivers/clk/sunxi-ng/ccu_common.c so it's much clearer > which clock is failing? Thats what I basically did to find out which clock is failing. This here are the changes I'm doing [1] and thats the dirty log [2]. It fails at clock NR 155 which is this one [3] mentioned before. > > >> >> If we have a look at the function call where it breaks [4], shouldn't the >> table be a clk_div_table struct instead of an u8? > > The table argument is an option. Did you go through how the sunxi-ng driver > calls this function? As mentioned above, you are looking at the wrong thing. > > Thanks > ChenYu I followed the failing call to this function (through the clock driver). As you can see I added an additional printk statement to see where it fails. Regards, Philipp > >> >> The a31s is the only board where we have this combination of a fixed_predivs >> and a table. >> >> Philipp >> >> >> Related Clock source register A31s: >> >> 0000: OSC24MHz/750=32KHz >> 0001: LOSC >> 0010: OSC24MHz >> 0011: / >> 0100: / >> 0101: / >> 0110: / >> 0111: / >> 1000: / >> 1001: / >> 1010: / >> 1011: AXICLK/4 >> 1100: / >> 1101: AHB1CLK/4 >> 1110: / >> 1111: / >> >> >> [1]: >> http://lxr.bootlin.com/linux/v4.16-rc1/source/drivers/clk/clk-divider.c#L89 >> >> [2]: >> http://lxr.bootlin.com/linux/v4.16-rc1/source/drivers/clk/sunxi-ng/ccu-sun6i-a31.c#L1137 >> >> [3]: >> http://lxr.bootlin.com/linux/v4.16-rc1/source/drivers/clk/sunxi-ng/ccu-sun6i-a31.c#L749 >> >> [4]: >> http://lxr.bootlin.com/linux/v4.16-rc1/source/drivers/clk/clk-divider.c#L93 >> [1]: https://pastebin.com/tvDunAWq [2]: https://pastebin.com/SBn2VQLu [3]: http://lxr.bootlin.com/linux/v4.16-rc1/source/include/dt-bindings/clock/sun6i-a31-ccu.h#L187