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Tue, 11 Aug 2026 12:23:28 -0700 (PDT) Date: Tue, 11 Aug 2026 19:23:28 +0000 In-Reply-To: <9huzldaczcr4.fsf@tarunix.c.googlers.com> Mime-Version: 1.0 References: <9huzldaczcr4.fsf@tarunix.c.googlers.com> Message-ID: <9huzcxvotqa7.fsf@tarunix.c.googlers.com> Subject: Re: QNS: ARM64: Cache coherency while doing Kexec for KHO From: tarunsahu@google.com To: Pasha Tatashin , Pratyush Yadav , Mike Rapoport , will@kernel.org, changyuanl@google.com, Alexander Graf , mark.rutland@arm.com, jgg@nvidia.com, dmatlack@google.com, skhawaja@google.com Cc: linux-arm-kernel@lists.infradead.org, kexec@lists.infradead.org Content-Type: text/plain; charset="UTF-8" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260811_122331_420762_324E66C6 X-CRM114-Status: GOOD ( 13.47 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org + Added more folks to the lists Tarun Sahu writes: > Hi, > > I have a question regarding cache maintenance for Kernel Handover (KHO) > preserved memory across kexec reboots on arm64. > > During kexec, all other CPUs gets hot-unplugged where they flush all > of their caches so there will be no issues with any KHO data preserved > having caches on these CPUs. > > But CPU0 still has not been flushed its D-cache (Is this correct?) and > it will only do flushing for specific area by kexec_segment_flush(). > > So for KHO preserved memory, if its caches still marked dirty on CPU0 > they will not be flushed? > > Is my understanding correct? or AM I missing something? > Also if this true, This will be a problem? > > PS: Pardon my less knowledge on ARM64 cache coherency. > > ~Tarun