[PATCH 2/3] ep93xx: add /proc/cpuinfo extension

[PATCH 2/3] ep93xx: add /proc/cpuinfo extension

[H Hartley Sweeten]

Add a callback to mach-ep93xx for the /proc/cpuinfo extension.

This cpuinfo extension dumps the processor unique ID and Maverick
Key as well as the processor silicon revision and a number of
boot configuration options.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>

---

This patch depends on ep93xx: added chip revision reading function

diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 90fb591..fe1eb7a 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -26,6 +26,7 @@
 #include <linux/io.h>
 #include <linux/gpio.h>
 #include <linux/leds.h>
+#include <linux/seq_file.h>
 #include <linux/termios.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/serial.h>
@@ -618,6 +619,81 @@ void ep93xx_keypad_release_gpio(struct platform_device *pdev)
 EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
 
 
+/*************************************************************************
+ * EP93xx proc/cpuinfo extension
+ *************************************************************************/
+#define EP93XX_SECURITY_REG(x)			(EP93XX_SECURITY_BASE + (x))
+#define EP93XX_SECURITY_SECFLG			EP93XX_SECURITY_REG(0x2400)
+#define EP93XX_SECURITY_FUSEFLG			EP93XX_SECURITY_REG(0x2410)
+#define EP93XX_SECURITY_UNIQID			EP93XX_SECURITY_REG(0x2440)
+#define EP93XX_SECURITY_UNIQCHK			EP93XX_SECURITY_REG(0x2450)
+#define EP93XX_SECURITY_UNIQVAL			EP93XX_SECURITY_REG(0x2460)
+#define EP93XX_SECURITY_SECID1			EP93XX_SECURITY_REG(0x2500)
+#define EP93XX_SECURITY_SECID2			EP93XX_SECURITY_REG(0x2504)
+#define EP93XX_SECURITY_SECCHK1			EP93XX_SECURITY_REG(0x2520)
+#define EP93XX_SECURITY_SECCHK2			EP93XX_SECURITY_REG(0x2524)
+#define EP93XX_SECURITY_UNIQID2			EP93XX_SECURITY_REG(0x2700)
+#define EP93XX_SECURITY_UNIQID3			EP93XX_SECURITY_REG(0x2704)
+#define EP93XX_SECURITY_UNIQID4			EP93XX_SECURITY_REG(0x2708)
+#define EP93XX_SECURITY_UNIQID5			EP93XX_SECURITY_REG(0x270c)
+
+static const char *ep93xx_rev[] = {
+	"A", "B", "C", "D0", "D1", "E0", "E1", "E2", "??"
+};
+
+void ep93xx_cpuinfo(struct seq_file *m, void *v)
+{
+	u32 val;
+
+	seq_puts(m, "\n");
+
+	/*
+	 * Fuse0 [63:40]	EP93XX_SECURITY_SECID1  [23: 0]
+	 * Fuse0 [39:32]	EP93XX_SECURITY_UNIQCHK [ 7: 0]
+	 * Fuse0 [31: 0]	EP93XX_SECURITY_UNIQID  [31: 0]
+	 *
+	 * Fuse1 [63:56]	EP93XX_SECURITY_FUSEFLG [ 7: 0]
+	 * Fuse1 [55:48]	EP93XX_SECURITY_SECCHK2 [ 7: 0]
+	 * Fuse1 [47:16]	EP93XX_SECURITY_SECID2  [31: 0]
+	 * Fuse1 [15: 8]	EP93XX_SECURITY_SECCHK1 [ 7: 0]
+	 * Fuse1 [ 7: 0]	EP93XX_SECURITY_SECID1  [31:24]
+	 *
+	 * Fuse2 [63:32]	EP93XX_SECURITY_UNIQID3 [31: 0]
+	 * Fuse2 [31: 0]	EP93XX_SECURITY_UNIQID2 [31: 0]
+	 *
+	 * Fuse3 [63:32]	EP93XX_SECURITY_UNIQID5 [31: 0]
+	 * Fuse3 [31: 0]	EP93XX_SECURITY_UNIQID4 [31: 0]
+	 *
+	 * See http://arm.cirrus.com/forum/viewtopic.php?p=1767
+	 */
+	seq_printf(m, "Unique ID\t: %8.8x\n",
+		__raw_readl(EP93XX_SECURITY_UNIQID));
+	seq_printf(m, "Maverick Key\t: %8.8x%8.8x%8.8x%6.6x %s\n",
+		__raw_readl(EP93XX_SECURITY_UNIQID2),
+		__raw_readl(EP93XX_SECURITY_UNIQID3),
+		__raw_readl(EP93XX_SECURITY_UNIQID4),
+		__raw_readl(EP93XX_SECURITY_UNIQID5) & 0x00ffffff,
+		__raw_readl(EP93XX_SECURITY_UNIQVAL) == 1 ? "OK" : "BAD");
+
+	/* See http://www.cirrus.com/en/pubs/appNote/AN273REV4.pdf */
+	val = ep93xx_chip_revision();
+	if (val > ARRAY_SIZE(ep93xx_rev))
+		val = ARRAY_SIZE(ep93xx_rev) - 1;
+	seq_printf(m, "Silicon Rev\t: %s\n", ep93xx_rev[val]);
+
+	val = __raw_readl(EP93XX_SYSCON_SYSCFG);
+	seq_printf(m, "Watchdog\t: %s\n",
+		(val & EP93XX_SYSCON_SYSCFG_LCSN1) ? "disabled" : "active");
+	seq_printf(m, "Reset duration\t: %s\n",
+		(val & EP93XX_SYSCON_SYSCFG_LCSN2) ? "disabled" : "active");
+	seq_printf(m, "Boot mode\t: %s %ssync %sternal %d-bit\n",
+		(val & EP93XX_SYSCON_SYSCFG_SBOOT) ? "serial" : "normal",
+		(val & EP93XX_SYSCON_SYSCFG_LASDO) ? "" : "a",
+		(val & EP93XX_SYSCON_SYSCFG_LEECLK) ? "in" : "ex",
+		ep93xx_boot_width());
+}
+
+
 extern void ep93xx_gpio_init(void);
 
 void __init ep93xx_init_devices(void)
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h
index c6dc14d..576676f 100644
--- a/arch/arm/mach-ep93xx/include/mach/platform.h
+++ b/arch/arm/mach-ep93xx/include/mach/platform.h
@@ -9,6 +9,7 @@ struct i2c_board_info;
 struct platform_device;
 struct ep93xxfb_mach_info;
 struct ep93xx_keypad_platform_data;
+struct seq_file;
 
 struct ep93xx_eth_data
 {
@@ -44,6 +45,9 @@ void ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data);
 int ep93xx_keypad_acquire_gpio(struct platform_device *pdev);
 void ep93xx_keypad_release_gpio(struct platform_device *pdev);
 
+/* EP93xx /proc/cpuinfo extension */
+void ep93xx_cpuinfo(struct seq_file *m, void *v);
+
 void ep93xx_init_devices(void);
 extern struct sys_timer ep93xx_timer;
 

[PATCH 2/3] ep93xx: add /proc/cpuinfo extension

[Mika Westerberg]

Hi,

On Mon, Mar 22, 2010 at 01:39:00PM -0500, H Hartley Sweeten wrote:
> Add a callback to mach-ep93xx for the /proc/cpuinfo extension.
> 
> This cpuinfo extension dumps the processor unique ID and Maverick
> Key as well as the processor silicon revision and a number of
> boot configuration options.
> 
> Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
> 
> ---
> 
> This patch depends on ep93xx: added chip revision reading function
> 
> diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
> index 90fb591..fe1eb7a 100644
> --- a/arch/arm/mach-ep93xx/core.c
> +++ b/arch/arm/mach-ep93xx/core.c
> @@ -26,6 +26,7 @@
>  #include <linux/io.h>
>  #include <linux/gpio.h>
>  #include <linux/leds.h>
> +#include <linux/seq_file.h>
>  #include <linux/termios.h>
>  #include <linux/amba/bus.h>
>  #include <linux/amba/serial.h>
> @@ -618,6 +619,81 @@ void ep93xx_keypad_release_gpio(struct platform_device *pdev)
>  EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
>  
>  
> +/*************************************************************************
> + * EP93xx proc/cpuinfo extension
> + *************************************************************************/
> +#define EP93XX_SECURITY_REG(x)			(EP93XX_SECURITY_BASE + (x))
> +#define EP93XX_SECURITY_SECFLG			EP93XX_SECURITY_REG(0x2400)
> +#define EP93XX_SECURITY_FUSEFLG			EP93XX_SECURITY_REG(0x2410)
> +#define EP93XX_SECURITY_UNIQID			EP93XX_SECURITY_REG(0x2440)
> +#define EP93XX_SECURITY_UNIQCHK			EP93XX_SECURITY_REG(0x2450)
> +#define EP93XX_SECURITY_UNIQVAL			EP93XX_SECURITY_REG(0x2460)
> +#define EP93XX_SECURITY_SECID1			EP93XX_SECURITY_REG(0x2500)
> +#define EP93XX_SECURITY_SECID2			EP93XX_SECURITY_REG(0x2504)
> +#define EP93XX_SECURITY_SECCHK1			EP93XX_SECURITY_REG(0x2520)
> +#define EP93XX_SECURITY_SECCHK2			EP93XX_SECURITY_REG(0x2524)
> +#define EP93XX_SECURITY_UNIQID2			EP93XX_SECURITY_REG(0x2700)
> +#define EP93XX_SECURITY_UNIQID3			EP93XX_SECURITY_REG(0x2704)
> +#define EP93XX_SECURITY_UNIQID4			EP93XX_SECURITY_REG(0x2708)
> +#define EP93XX_SECURITY_UNIQID5			EP93XX_SECURITY_REG(0x270c)
> +
> +static const char *ep93xx_rev[] = {
> +	"A", "B", "C", "D0", "D1", "E0", "E1", "E2", "??"
> +};
> +
> +void ep93xx_cpuinfo(struct seq_file *m, void *v)
> +{
> +	u32 val;
> +
> +	seq_puts(m, "\n");
> +
> +	/*
> +	 * Fuse0 [63:40]	EP93XX_SECURITY_SECID1  [23: 0]
> +	 * Fuse0 [39:32]	EP93XX_SECURITY_UNIQCHK [ 7: 0]
> +	 * Fuse0 [31: 0]	EP93XX_SECURITY_UNIQID  [31: 0]
> +	 *
> +	 * Fuse1 [63:56]	EP93XX_SECURITY_FUSEFLG [ 7: 0]
> +	 * Fuse1 [55:48]	EP93XX_SECURITY_SECCHK2 [ 7: 0]
> +	 * Fuse1 [47:16]	EP93XX_SECURITY_SECID2  [31: 0]
> +	 * Fuse1 [15: 8]	EP93XX_SECURITY_SECCHK1 [ 7: 0]
> +	 * Fuse1 [ 7: 0]	EP93XX_SECURITY_SECID1  [31:24]
> +	 *
> +	 * Fuse2 [63:32]	EP93XX_SECURITY_UNIQID3 [31: 0]
> +	 * Fuse2 [31: 0]	EP93XX_SECURITY_UNIQID2 [31: 0]
> +	 *
> +	 * Fuse3 [63:32]	EP93XX_SECURITY_UNIQID5 [31: 0]
> +	 * Fuse3 [31: 0]	EP93XX_SECURITY_UNIQID4 [31: 0]
> +	 *
> +	 * See http://arm.cirrus.com/forum/viewtopic.php?p=1767
> +	 */
> +	seq_printf(m, "Unique ID\t: %8.8x\n",
> +		__raw_readl(EP93XX_SECURITY_UNIQID));
> +	seq_printf(m, "Maverick Key\t: %8.8x%8.8x%8.8x%6.6x %s\n",
> +		__raw_readl(EP93XX_SECURITY_UNIQID2),
> +		__raw_readl(EP93XX_SECURITY_UNIQID3),
> +		__raw_readl(EP93XX_SECURITY_UNIQID4),
> +		__raw_readl(EP93XX_SECURITY_UNIQID5) & 0x00ffffff,
> +		__raw_readl(EP93XX_SECURITY_UNIQVAL) == 1 ? "OK" : "BAD");
> +
> +	/* See http://www.cirrus.com/en/pubs/appNote/AN273REV4.pdf */
> +	val = ep93xx_chip_revision();
> +	if (val > ARRAY_SIZE(ep93xx_rev))
> +		val = ARRAY_SIZE(ep93xx_rev) - 1;
> +	seq_printf(m, "Silicon Rev\t: %s\n", ep93xx_rev[val]);
> +
> +	val = __raw_readl(EP93XX_SYSCON_SYSCFG);
> +	seq_printf(m, "Watchdog\t: %s\n",
> +		(val & EP93XX_SYSCON_SYSCFG_LCSN1) ? "disabled" : "active");
> +	seq_printf(m, "Reset duration\t: %s\n",
> +		(val & EP93XX_SYSCON_SYSCFG_LCSN2) ? "disabled" : "active");
> +	seq_printf(m, "Boot mode\t: %s %ssync %sternal %d-bit\n",
> +		(val & EP93XX_SYSCON_SYSCFG_SBOOT) ? "serial" : "normal",
> +		(val & EP93XX_SYSCON_SYSCFG_LASDO) ? "" : "a",
> +		(val & EP93XX_SYSCON_SYSCFG_LEECLK) ? "in" : "ex",
> +		ep93xx_boot_width());
                ^^^^^^^^^^^^^^^^^
 
I got following compile error:

  CC      arch/arm/mach-ep93xx/core.o
arch/arm/mach-ep93xx/core.c: In function 'ep93xx_cpuinfo':
arch/arm/mach-ep93xx/core.c:707: error: implicit declaration of function 'ep93xx_boot_width'
make[1]: *** [arch/arm/mach-ep93xx/core.o] Error 1
make: *** [arch/arm/mach-ep93xx] Error 2

Should this function be included in the patch set also? I applied these on top of
latest mainline kernel.

Thanks,
MW 

[PATCH 2/3] ep93xx: add /proc/cpuinfo extension

[H Hartley Sweeten]

On Tuesday, March 23, 2010 8:36 AM, Mika Westerberg wrote:
> On Mon, Mar 22, 2010 at 01:39:00PM -0500, H Hartley Sweeten wrote:
>> Add a callback to mach-ep93xx for the /proc/cpuinfo extension.
>> 
>> This cpuinfo extension dumps the processor unique ID and Maverick
>> Key as well as the processor silicon revision and a number of
>> boot configuration options.
>> 
>> Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
>> 
>> ---

[snip]

>> +	seq_printf(m, "Boot mode\t: %s %ssync %sternal %d-bit\n",
>> +		(val & EP93XX_SYSCON_SYSCFG_SBOOT) ? "serial" : "normal",
>> +		(val & EP93XX_SYSCON_SYSCFG_LASDO) ? "" : "a",
>> +		(val & EP93XX_SYSCON_SYSCFG_LEECLK) ? "in" : "ex",
>> +		ep93xx_boot_width());
>           ^^^^^^^^^^^^^^^^^
> 
> I got following compile error:
>
>  CC      arch/arm/mach-ep93xx/core.o
> arch/arm/mach-ep93xx/core.c: In function 'ep93xx_cpuinfo':
> arch/arm/mach-ep93xx/core.c:707: error: implicit declaration of function 'ep93xx_boot_width'
> make[1]: *** [arch/arm/mach-ep93xx/core.o] Error 1
> make: *** [arch/arm/mach-ep93xx] Error 2
>
> Should this function be included in the patch set also? I applied these on top of
> latest mainline kernel.

Grr.. Left that piece out, sorry about that.

I will post the updated patch in a bit.

If you want to test this now, just put the following after the 
ep93xx_chip_revision() in core.c (and of course the proper prototype in
platform.h).

Regards,
Hartley

---

/**
 * ep93xx_boot_width() - returns the external bus width for the boot device
 */
int ep93xx_boot_width(void)
{
	u32 val;
	int width;

	val = __raw_readl(EP93XX_SYSCON_SYSCFG);
	if (val & EP93XX_SYSCON_SYSCFG_LASDO) {
		/* Sync boot */
		if (val & EP93XX_SYSCON_SYSCFG_LCSN7)
			width = 32;
		else
			width = 16;
	} else {
		/* Async boot */
		if (val & EP93XX_SYSCON_SYSCFG_LCSN7)
			width = 32;
		else if (val & EP93XX_SYSCON_SYSCFG_LCSN6)
			width = 16;
		else
			width = 8;
	}
	return width;
}

[PATCH 2/3] ep93xx: add /proc/cpuinfo extension

[H Hartley Sweeten]

Add a callback to mach-ep93xx for the /proc/cpuinfo extension.

This cpuinfo extension dumps the processor unique ID and Maverick
Key as well as the processor silicon revision and a number of
boot configuration options.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>

---

This patch depends on ep93xx: added chip revision reading function

V2: add missing ep93xx_boot_width function

diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 90fb591..999c152 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -26,6 +26,7 @@
 #include <linux/io.h>
 #include <linux/gpio.h>
 #include <linux/leds.h>
+#include <linux/seq_file.h>
 #include <linux/termios.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/serial.h>
@@ -222,6 +223,33 @@ void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
 }
 EXPORT_SYMBOL(ep93xx_devcfg_set_clear);
 
+/**
+ * ep93xx_boot_width() - returns the external bus width for the boot device
+ */
+int ep93xx_boot_width(void)
+{
+	u32 val;
+	int width;
+
+	val = __raw_readl(EP93XX_SYSCON_SYSCFG);
+	if (val & EP93XX_SYSCON_SYSCFG_LASDO) {
+		/* Sync boot */
+		if (val & EP93XX_SYSCON_SYSCFG_LCSN7)
+			width = 32;
+		else
+			width = 16;
+	} else {
+		/* Async boot */
+		if (val & EP93XX_SYSCON_SYSCFG_LCSN7)
+			width = 32;
+		else if (val & EP93XX_SYSCON_SYSCFG_LCSN6)
+			width = 16;
+		else
+			width = 8;
+	}
+	return width;
+}
+
 
 /*************************************************************************
  * EP93xx peripheral handling
@@ -618,6 +646,81 @@ void ep93xx_keypad_release_gpio(struct platform_device *pdev)
 EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
 
 
+/*************************************************************************
+ * EP93xx proc/cpuinfo extension
+ *************************************************************************/
+#define EP93XX_SECURITY_REG(x)			(EP93XX_SECURITY_BASE + (x))
+#define EP93XX_SECURITY_SECFLG			EP93XX_SECURITY_REG(0x2400)
+#define EP93XX_SECURITY_FUSEFLG			EP93XX_SECURITY_REG(0x2410)
+#define EP93XX_SECURITY_UNIQID			EP93XX_SECURITY_REG(0x2440)
+#define EP93XX_SECURITY_UNIQCHK			EP93XX_SECURITY_REG(0x2450)
+#define EP93XX_SECURITY_UNIQVAL			EP93XX_SECURITY_REG(0x2460)
+#define EP93XX_SECURITY_SECID1			EP93XX_SECURITY_REG(0x2500)
+#define EP93XX_SECURITY_SECID2			EP93XX_SECURITY_REG(0x2504)
+#define EP93XX_SECURITY_SECCHK1			EP93XX_SECURITY_REG(0x2520)
+#define EP93XX_SECURITY_SECCHK2			EP93XX_SECURITY_REG(0x2524)
+#define EP93XX_SECURITY_UNIQID2			EP93XX_SECURITY_REG(0x2700)
+#define EP93XX_SECURITY_UNIQID3			EP93XX_SECURITY_REG(0x2704)
+#define EP93XX_SECURITY_UNIQID4			EP93XX_SECURITY_REG(0x2708)
+#define EP93XX_SECURITY_UNIQID5			EP93XX_SECURITY_REG(0x270c)
+
+static const char *ep93xx_rev[] = {
+	"A", "B", "C", "D0", "D1", "E0", "E1", "E2", "??"
+};
+
+void ep93xx_cpuinfo(struct seq_file *m, void *v)
+{
+	u32 val;
+
+	seq_puts(m, "\n");
+
+	/*
+	 * Fuse0 [63:40]	EP93XX_SECURITY_SECID1  [23: 0]
+	 * Fuse0 [39:32]	EP93XX_SECURITY_UNIQCHK [ 7: 0]
+	 * Fuse0 [31: 0]	EP93XX_SECURITY_UNIQID  [31: 0]
+	 *
+	 * Fuse1 [63:56]	EP93XX_SECURITY_FUSEFLG [ 7: 0]
+	 * Fuse1 [55:48]	EP93XX_SECURITY_SECCHK2 [ 7: 0]
+	 * Fuse1 [47:16]	EP93XX_SECURITY_SECID2  [31: 0]
+	 * Fuse1 [15: 8]	EP93XX_SECURITY_SECCHK1 [ 7: 0]
+	 * Fuse1 [ 7: 0]	EP93XX_SECURITY_SECID1  [31:24]
+	 *
+	 * Fuse2 [63:32]	EP93XX_SECURITY_UNIQID3 [31: 0]
+	 * Fuse2 [31: 0]	EP93XX_SECURITY_UNIQID2 [31: 0]
+	 *
+	 * Fuse3 [63:32]	EP93XX_SECURITY_UNIQID5 [31: 0]
+	 * Fuse3 [31: 0]	EP93XX_SECURITY_UNIQID4 [31: 0]
+	 *
+	 * See http://arm.cirrus.com/forum/viewtopic.php?p=1767
+	 */
+	seq_printf(m, "Unique ID\t: %8.8x\n",
+		__raw_readl(EP93XX_SECURITY_UNIQID));
+	seq_printf(m, "Maverick Key\t: %8.8x%8.8x%8.8x%6.6x %s\n",
+		__raw_readl(EP93XX_SECURITY_UNIQID2),
+		__raw_readl(EP93XX_SECURITY_UNIQID3),
+		__raw_readl(EP93XX_SECURITY_UNIQID4),
+		__raw_readl(EP93XX_SECURITY_UNIQID5) & 0x00ffffff,
+		__raw_readl(EP93XX_SECURITY_UNIQVAL) == 1 ? "OK" : "BAD");
+
+	/* See http://www.cirrus.com/en/pubs/appNote/AN273REV4.pdf */
+	val = ep93xx_chip_revision();
+	if (val > ARRAY_SIZE(ep93xx_rev))
+		val = ARRAY_SIZE(ep93xx_rev) - 1;
+	seq_printf(m, "Silicon Rev\t: %s\n", ep93xx_rev[val]);
+
+	val = __raw_readl(EP93XX_SYSCON_SYSCFG);
+	seq_printf(m, "Watchdog\t: %s\n",
+		(val & EP93XX_SYSCON_SYSCFG_LCSN1) ? "disabled" : "active");
+	seq_printf(m, "Reset duration\t: %s\n",
+		(val & EP93XX_SYSCON_SYSCFG_LCSN2) ? "disabled" : "active");
+	seq_printf(m, "Boot mode\t: %s %ssync %sternal %d-bit\n",
+		(val & EP93XX_SYSCON_SYSCFG_SBOOT) ? "serial" : "normal",
+		(val & EP93XX_SYSCON_SYSCFG_LASDO) ? "" : "a",
+		(val & EP93XX_SYSCON_SYSCFG_LEECLK) ? "in" : "ex",
+		ep93xx_boot_width());
+}
+
+
 extern void ep93xx_gpio_init(void);
 
 void __init ep93xx_init_devices(void)
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h
index c6dc14d..5ca2fce 100644
--- a/arch/arm/mach-ep93xx/include/mach/platform.h
+++ b/arch/arm/mach-ep93xx/include/mach/platform.h
@@ -9,6 +9,7 @@ struct i2c_board_info;
 struct platform_device;
 struct ep93xxfb_mach_info;
 struct ep93xx_keypad_platform_data;
+struct seq_file;
 
 struct ep93xx_eth_data
 {
@@ -33,6 +34,8 @@ static inline void ep93xx_devcfg_clear_bits(unsigned int bits)
 	ep93xx_devcfg_set_clear(0x00, bits);
 }
 
+int ep93xx_boot_width(void);
+
 void ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr);
 void ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
 			 struct i2c_board_info *devices, int num);
@@ -44,6 +47,9 @@ void ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data);
 int ep93xx_keypad_acquire_gpio(struct platform_device *pdev);
 void ep93xx_keypad_release_gpio(struct platform_device *pdev);
 
+/* EP93xx /proc/cpuinfo extension */
+void ep93xx_cpuinfo(struct seq_file *m, void *v);
+
 void ep93xx_init_devices(void);
 extern struct sys_timer ep93xx_timer;
 

[PATCH 2/3] ep93xx: add /proc/cpuinfo extension

[Mika Westerberg]

On Tue, Mar 23, 2010 at 11:34:32AM -0500, H Hartley Sweeten wrote:
> On Tuesday, March 23, 2010 8:36 AM, Mika Westerberg wrote:
> > On Mon, Mar 22, 2010 at 01:39:00PM -0500, H Hartley Sweeten wrote:
> >> Add a callback to mach-ep93xx for the /proc/cpuinfo extension.
> >> 
> >> This cpuinfo extension dumps the processor unique ID and Maverick
> >> Key as well as the processor silicon revision and a number of
> >> boot configuration options.
> >> 
> >> Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
> >> 
> >> ---
> 
> [snip]
> 
> >> +	seq_printf(m, "Boot mode\t: %s %ssync %sternal %d-bit\n",
> >> +		(val & EP93XX_SYSCON_SYSCFG_SBOOT) ? "serial" : "normal",
> >> +		(val & EP93XX_SYSCON_SYSCFG_LASDO) ? "" : "a",
> >> +		(val & EP93XX_SYSCON_SYSCFG_LEECLK) ? "in" : "ex",
> >> +		ep93xx_boot_width());
> >           ^^^^^^^^^^^^^^^^^
> > 
> > I got following compile error:
> >
> >  CC      arch/arm/mach-ep93xx/core.o
> > arch/arm/mach-ep93xx/core.c: In function 'ep93xx_cpuinfo':
> > arch/arm/mach-ep93xx/core.c:707: error: implicit declaration of function 'ep93xx_boot_width'
> > make[1]: *** [arch/arm/mach-ep93xx/core.o] Error 1
> > make: *** [arch/arm/mach-ep93xx] Error 2
> >
> > Should this function be included in the patch set also? I applied these on top of
> > latest mainline kernel.
> 
> Grr.. Left that piece out, sorry about that.
> 
> I will post the updated patch in a bit.
> 
> If you want to test this now, just put the following after the 
> ep93xx_chip_revision() in core.c (and of course the proper prototype in
> platform.h).

Ok. Thanks.

With that function in place I get following on my TS-7260 board:

ts-7260:~# cat /proc/cpuinfo 
Processor       : ARM920T rev 0 (v4l)
BogoMIPS        : 49.76
Features        : swp half thumb crunch 
CPU implementer : 0x41
CPU architecture: 4T
CPU variant     : 0x1
CPU part        : 0x920
CPU revision    : 0

Hardware        : Technologic Systems TS-72xx SBC
Revision        : 0000
Serial          : 0000000000000000

Unique ID       : 920fef0b
Maverick Key    : 920fef0b58d363f79f0fa62c06a512 OK
Silicon Rev     : E2
Watchdog        : disabled
Reset duration  : disabled
Boot mode       : normal sync internal 16-bit

(Note that my bootloader doesn't pass the revision information).

Tested-by: Mika Westerberg <mika.westerberg@iki.fi>

Regards,
MW

[PATCH 2/3] ep93xx: add /proc/cpuinfo extension

[Martin Guy]

Just spotted an off-by-one error in this patch, if of very minor and
unlikely effect.

On 22 March 2010 19:39, H Hartley Sweeten <hartleys@visionengravers.com> wrote:
> Add a callback to mach-ep93xx for the /proc/cpuinfo extension.
>
> This cpuinfo extension dumps the processor unique ID and Maverick
> Key as well as the processor silicon revision and a number of
> boot configuration options.
> ...
> diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
> index 90fb591..fe1eb7a 100644
> --- a/arch/arm/mach-ep93xx/core.c
> +++ b/arch/arm/mach-ep93xx/core.c
>...
> +static const char *ep93xx_rev[] = {
> + ? ? ? "A", "B", "C", "D0", "D1", "E0", "E1", "E2", "??"
> +};
>...
> + ? ? ? val = ep93xx_chip_revision();
> + ? ? ? if (val > ARRAY_SIZE(ep93xx_rev))
> + ? ? ? ? ? ? ? val = ARRAY_SIZE(ep93xx_rev) - 1;
> + ? ? ? seq_printf(m, "Silicon Rev\t: %s\n", ep93xx_rev[val]);

Shouldn't that be

+       if (val >= ARRAY_SIZE(ep93xx_rev))

?

    M
?

[PATCH 2/3] ep93xx: add /proc/cpuinfo extension

[H Hartley Sweeten]

On Wednesday, March 16, 2011 8:30 PM, Martin Guy wrote:
>
> Just spotted an off-by-one error in this patch, if of very minor and
> unlikely effect.
>
> On 22 March 2010 19:39, H Hartley Sweeten <hartleys@visionengravers.com> wrote:

Cool.. I time traveled...

Actually, I submitted this last year.  I think Russell NAK'ed it at that time since
it modified the output of /proc/cpuinfo and he did not see a valid reason for it.

There is some discussion going on right now to add a "socinfo" to sysfs where this
information could be exposed.  When that gets worked out I will come up with a new
patch.

>> Add a callback to mach-ep93xx for the /proc/cpuinfo extension.
>>
>> This cpuinfo extension dumps the processor unique ID and Maverick
>> Key as well as the processor silicon revision and a number of
>> boot configuration options.
>> ...
>> diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
>> index 90fb591..fe1eb7a 100644
>> --- a/arch/arm/mach-ep93xx/core.c
>> +++ b/arch/arm/mach-ep93xx/core.c
>>...
>> +static const char *ep93xx_rev[] = {
>> + ? ? ? "A", "B", "C", "D0", "D1", "E0", "E1", "E2", "??"
>> +};
>>...
>> + ? ? ? val = ep93xx_chip_revision();
>> + ? ? ? if (val > ARRAY_SIZE(ep93xx_rev))
>> + ? ? ? ? ? ? ? val = ARRAY_SIZE(ep93xx_rev) - 1;
>> + ? ? ? seq_printf(m, "Silicon Rev\t: %s\n", ep93xx_rev[val]);
>
> Shouldn't that be
>
> +       if (val >= ARRAY_SIZE(ep93xx_rev))
>

Regardless, if I remember correctly, someone already pointed this out.  I'll
keep it in mind when I re-do this patch based on the "socinfo" stuff.

Thanks,
Hartley