[PATCH] ARM: S5PV210: add clocks (struct clk).

[PATCH] ARM: S5PV210: add clocks (struct clk).

[MyungJoo Ham]

Many clocks were not listed in the previous
arch/arm/mach-s5pv210/clock.c

We have added clocks defined as CLK_GATE_IPx[] in the user manual of
S5PV210. However, the clocks that were not turned on at the boot time
when tested with the previous kernel versions (2.6.32, 2.6.29) are
defined in "init_clocks_disabled" so that they are turned off at the
boot time.

The clocks added from CLK_GATE_IPx are:
	CSIS, JPEG, FIMC0 - 2, NFCON, SROMC, TVENC, HDMI, MIXER, VP,
	DSIM, TSI, HOSTIF, MODEM, PCM0 - 2, I2C-HDMI-PHY, I2C-HDMI-DDC,
	AC97, SPDIF, SECKEY, IEM-APC, IEM-IEC, CHIP-ID, PDMA0 - 1,
	MDMA, DMC0 - 1, NANDXL, TZIC0 - 3, VIC0 - 3, SECJTAG, CORESIGHT,
	SDM, SECSS, SYSCON, GPIO, TZPC0 - 3

Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 arch/arm/mach-s5pv210/clock.c |  298 ++++++++++++++++++++++++++++++++++++++++-
 1 files changed, 297 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index b3d156c..aa2b1c5 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -275,12 +275,72 @@ static struct clk_ops clk_hclk_imem_ops = {
 
 static struct clk init_clocks_disable[] = {
 	{
+		.name		= "csis",
+		.id		= -1,
+		.parent		= &clk_pclk_dsys.clk,
+		.enable		= s5pv210_clk_ip0_ctrl,
+		.ctrlbit	= (1 << 31),
+	}, {
 		.name		= "rot",
 		.id		= -1,
 		.parent		= &clk_hclk_dsys.clk,
 		.enable		= s5pv210_clk_ip0_ctrl,
 		.ctrlbit	= (1<<29),
 	}, {
+		.name		= "jpeg",
+		.id		= -1,
+		.parent		= &clk_hclk_dsys.clk,
+		.enable		= s5pv210_clk_ip0_ctrl,
+		.ctrlbit	= (1 << 28),
+	}, {
+		.name		= "fimc",
+		.id		= 0,
+		.parent		= &clk_hclk_dsys.clk,
+		.enable		= s5pv210_clk_ip0_ctrl,
+		.ctrlbit	= (1 << 24),
+	}, {
+		.name		= "fimc",
+		.id		= 1,
+		.parent		= &clk_hclk_dsys.clk,
+		.enable		= s5pv210_clk_ip0_ctrl,
+		.ctrlbit	= (1 << 25),
+	}, {
+		.name		= "fimc",
+		.id		= 2,
+		.parent		= &clk_hclk_dsys.clk,
+		.enable		= s5pv210_clk_ip0_ctrl,
+		.ctrlbit	= (1 << 26),
+	}, {
+		.name		= "nfcon",
+		.id		= -1,
+		.parent		= &clk_hclk_psys.clk,
+		.enable		= s5pv210_clk_ip1_ctrl,
+		.ctrlbit	= (1 << 28),
+	}, {
+		.name		= "sromc",
+		.id		= -1,
+		.parent		= &clk_hclk_psys.clk,
+		.enable		= s5pv210_clk_ip1_ctrl,
+		.ctrlbit	= (1 << 26),
+	}, {
+		.name		= "tvenc",
+		.id		= -1,
+		.parent		= &clk_hclk_dsys.clk,
+		.enable		= s5pv210_clk_ip1_ctrl,
+		.ctrlbit	= (1 << 10),
+	}, {
+		.name		= "hdmi",
+		.id		= -1,
+		.parent		= &clk_hclk_dsys.clk,
+		.enable		= s5pv210_clk_ip1_ctrl,
+		.ctrlbit	= (1 << 11),
+	}, {
+		.name		= "mixer",
+		.id		= -1,
+		.parent		= &clk_hclk_dsys.clk,
+		.enable		= s5pv210_clk_ip1_ctrl,
+		.ctrlbit	= (1 << 9),
+	}, {
 		.name		= "otg",
 		.id		= -1,
 		.parent		= &clk_hclk_psys.clk,
@@ -305,6 +365,18 @@ static struct clk init_clocks_disable[] = {
 		.enable		= s5pv210_clk_ip1_ctrl,
 		.ctrlbit	= (1<<25),
 	}, {
+		.name		= "vp",
+		.id		= -1,
+		.parent		= &clk_hclk_dsys.clk,
+		.enable		= s5pv210_clk_ip1_ctrl,
+		.ctrlbit	= (1 << 8),
+	}, {
+		.name		= "dsim",
+		.id		= -1,
+		.parent		= &clk_hclk_dsys.clk,
+		.enable		= s5pv210_clk_ip1_ctrl,
+		.ctrlbit	= (1 << 2),
+	}, {
 		.name		= "hsmmc",
 		.id		= 0,
 		.parent		= &clk_hclk_psys.clk,
@@ -329,6 +401,42 @@ static struct clk init_clocks_disable[] = {
 		.enable		= s5pv210_clk_ip2_ctrl,
 		.ctrlbit	= (1<<19),
 	}, {
+		.name		= "tsi",
+		.id		= -1,
+		.parent		= &clk_hclk_msys.clk,
+		.enable		= s5pv210_clk_ip2_ctrl,
+		.ctrlbit	= (1 << 20),
+	}, {
+		.name		= "hostif",
+		.id		= -1,
+		.parent		= &clk_hclk_psys.clk,
+		.enable		= s5pv210_clk_ip2_ctrl,
+		.ctrlbit	= (1 << 10),
+	}, {
+		.name		= "modem",
+		.id		= -1,
+		.parent		= &clk_hclk_psys.clk,
+		.enable		= s5pv210_clk_ip2_ctrl,
+		.ctrlbit	= (1 << 9),
+	}, {
+		.name		= "pcm",
+		.id		= 0,
+		.parent		= &clk_pclk_psys.clk,
+		.enable		= s5pv210_clk_ip3_ctrl,
+		.ctrlbit	= (1 << 28),
+	}, {
+		.name		= "pcm",
+		.id		= 1,
+		.parent		= &clk_pclk_psys.clk,
+		.enable		= s5pv210_clk_ip3_ctrl,
+		.ctrlbit	= (1 << 29),
+	}, {
+		.name		= "pcm",
+		.id		= 2,
+		.parent		= &clk_pclk_psys.clk,
+		.enable		= s5pv210_clk_ip3_ctrl,
+		.ctrlbit	= (1 << 30),
+	}, {
 		.name		= "systimer",
 		.id		= -1,
 		.parent		= &clk_pclk_psys.clk,
@@ -401,6 +509,18 @@ static struct clk init_clocks_disable[] = {
 		.enable		= s5pv210_clk_ip3_ctrl,
 		.ctrlbit	= (1<<21),
 	}, {
+		.name		= "i2c_hdmi_phy",
+		.id		= -1,
+		.parent		= &clk_pclk_dsys.clk,
+		.enable		= s5pv210_clk_ip3_ctrl,
+		.ctrlbit	= (1 << 11),
+	}, {
+		.name		= "i2c_hdmi_ddc",
+		.id		= -1,
+		.parent		= &clk_pclk_dsys.clk,
+		.enable		= s5pv210_clk_ip3_ctrl,
+		.ctrlbit	= (1 << 10),
+	}, {
 		.name		= "i2s_v50",
 		.id		= 0,
 		.parent		= &clk_p,
@@ -418,6 +538,41 @@ static struct clk init_clocks_disable[] = {
 		.parent		= &clk_p,
 		.enable		= s5pv210_clk_ip3_ctrl,
 		.ctrlbit	= (1 << 6),
+	}, {
+		.name		= "ac97",
+		.id		= -1,
+		.parent		= &clk_pclk_psys.clk,
+		.enable		= s5pv210_clk_ip3_ctrl,
+		.ctrlbit	= (1 << 1),
+	}, {
+		.name		= "spdif",
+		.id		= -1,
+		.parent		= &clk_pclk_psys.clk,
+		.enable		= s5pv210_clk_ip3_ctrl,
+		.ctrlbit	= (1 << 0),
+	}, {
+		.name		= "seckey",
+		.id		= -1,
+		.enable		= s5pv210_clk_ip4_ctrl,
+		.ctrlbit	= (1 << 3),
+	}, {
+		.name		= "iem_apc",
+		.id		= -1,
+		.parent		= &clk_pclk_psys.clk,
+		.enable		= s5pv210_clk_ip4_ctrl,
+		.ctrlbit	= (1 << 2),
+	}, {
+		.name		= "iem_iec",
+		.id		= -1,
+		.parent		= &clk_pclk_psys.clk,
+		.enable		= s5pv210_clk_ip4_ctrl,
+		.ctrlbit	= (1 << 1),
+	}, {
+		.name		= "chip_id",
+		.id		= -1,
+		.parent		= &clk_hclk_psys.clk,
+		.enable		= s5pv210_clk_ip4_ctrl,
+		.ctrlbit	= (1 << 0),
 	},
 };
 
@@ -426,10 +581,129 @@ static struct clk init_clocks[] = {
 		.name		= "hclk_imem",
 		.id		= -1,
 		.parent		= &clk_hclk_msys.clk,
-		.ctrlbit	= (1 << 5),
 		.enable		= s5pv210_clk_ip0_ctrl,
+		.ctrlbit	= (1 << 5),
 		.ops		= &clk_hclk_imem_ops,
 	}, {
+		.name		= "pdma",
+		.id		= 0,
+		.parent		= &clk_hclk_psys.clk,
+		.enable		= s5pv210_clk_ip0_ctrl,
+		.ctrlbit	= (1 << 3),
+	}, {
+		.name		= "pdma",
+		.id		= 1,
+		.parent		= &clk_hclk_psys.clk,
+		.enable		= s5pv210_clk_ip0_ctrl,
+		.ctrlbit	= (1 << 4),
+	}, {
+		.name		= "mdma",
+		.id		= -1,
+		.parent		= &clk_hclk_dsys.clk,
+		.enable		= s5pv210_clk_ip0_ctrl,
+		.ctrlbit	= (1 << 2),
+	}, {
+		.name		= "dmc",
+		.id		= 0,
+		.parent		= &clk_hclk_msys.clk,
+		.enable		= s5pv210_clk_ip0_ctrl,
+		.ctrlbit	= (1 << 0),
+	}, {
+		.name		= "dmc",
+		.id		= 1,
+		.parent		= &clk_hclk_msys.clk,
+		.enable		= s5pv210_clk_ip0_ctrl,
+		.ctrlbit	= (1 << 1),
+	}, {
+		.name		= "nandxl",
+		.id		= -1,
+		.parent		= &clk_hclk_psys.clk,
+		.enable		= s5pv210_clk_ip1_ctrl,
+		.ctrlbit	= (1 << 24),
+	}, {
+		.name		= "tzic",
+		.id		= 0,
+		.parent		= &clk_hclk_msys.clk,
+		.enable		= s5pv210_clk_ip2_ctrl,
+		.ctrlbit	= (1 << 28),
+	}, {
+		.name		= "tzic",
+		.id		= 1,
+		.parent		= &clk_hclk_msys.clk,
+		.enable		= s5pv210_clk_ip2_ctrl,
+		.ctrlbit	= (1 << 29),
+	}, {
+		.name		= "tzic",
+		.id		= 2,
+		.parent		= &clk_hclk_msys.clk,
+		.enable		= s5pv210_clk_ip2_ctrl,
+		.ctrlbit	= (1 << 30),
+	}, {
+		.name		= "tzic",
+		.id		= 3,
+		.parent		= &clk_hclk_msys.clk,
+		.enable		= s5pv210_clk_ip2_ctrl,
+		.ctrlbit	= (1 << 31),
+	}, {
+		.name		= "vic",
+		.id		= 0,
+		.parent		= &clk_hclk_msys.clk,
+		.enable		= s5pv210_clk_ip2_ctrl,
+		.ctrlbit	= (1 << 24),
+	}, {
+		.name		= "vic",
+		.id		= 1,
+		.parent		= &clk_hclk_msys.clk,
+		.enable		= s5pv210_clk_ip2_ctrl,
+		.ctrlbit	= (1 << 25),
+	}, {
+		.name		= "vic",
+		.id		= 2,
+		.parent		= &clk_hclk_msys.clk,
+		.enable		= s5pv210_clk_ip2_ctrl,
+		.ctrlbit	= (1 << 26),
+	}, {
+		.name		= "vic",
+		.id		= 3,
+		.parent		= &clk_hclk_msys.clk,
+		.enable		= s5pv210_clk_ip2_ctrl,
+		.ctrlbit	= (1 << 27),
+	}, {
+		.name		= "secjtag",
+		.id		= -1,
+		.parent		= &clk_hclk_psys.clk,
+		.enable		= s5pv210_clk_ip2_ctrl,
+		.ctrlbit	= (1 << 11),
+	}, {
+		.name		= "coresight",
+		.id		= -1,
+		.parent		= &clk_hclk_psys.clk,
+		.enable		= s5pv210_clk_ip2_ctrl,
+		.ctrlbit	= (1 << 8),
+	}, {
+		.name		= "sdm",
+		.id		= -1,
+		.enable		= s5pv210_clk_ip2_ctrl,
+		.ctrlbit	= (1 << 1),
+	}, {
+		.name		= "secss",
+		.id		= -1,
+		.parent		= &clk_hclk_psys.clk,
+		.enable		= s5pv210_clk_ip2_ctrl,
+		.ctrlbit	= (1 << 0),
+	}, {
+		.name		= "syscon",
+		.id		= -1,
+		.parent		= &clk_pclk_psys.clk,
+		.enable		= s5pv210_clk_ip3_ctrl,
+		.ctrlbit	= (1 << 27),
+	}, {
+		.name		= "gpio",
+		.id		= -1,
+		.parent		= &clk_pclk_psys.clk,
+		.enable		= s5pv210_clk_ip3_ctrl,
+		.ctrlbit	= (1 << 26),
+	}, {
 		.name		= "uart",
 		.id		= 0,
 		.parent		= &clk_pclk_psys.clk,
@@ -453,6 +727,28 @@ static struct clk init_clocks[] = {
 		.parent		= &clk_pclk_psys.clk,
 		.enable		= s5pv210_clk_ip3_ctrl,
 		.ctrlbit	= (1 << 20),
+	}, {
+		.name		= "tzpc",
+		.id		= 0,
+		.parent		= &clk_pclk_msys.clk,
+		.enable		= s5pv210_clk_ip4_ctrl,
+		.ctrlbit	= (1 << 5),
+	}, {
+		.name		= "tzpc",
+		.id		= 1,
+		.parent		= &clk_pclk_psys.clk,
+		.enable		= s5pv210_clk_ip4_ctrl,
+		.ctrlbit	= (1 << 6),
+	}, {
+		.name		= "tzpc",
+		.id		= 2,
+		.enable		= s5pv210_clk_ip4_ctrl,
+		.ctrlbit	= (1 << 7),
+	}, {
+		.name		= "tzpc",
+		.id		= 3,
+		.enable		= s5pv210_clk_ip4_ctrl,
+		.ctrlbit	= (1 << 8),
 	},
 };
 
-- 
1.6.3.3

[PATCH] ARM: S5PV210: add clocks (struct clk).

[Kukjin Kim]

MyungJoo Ham wrote:
> 
Hi,

Please include Ben Dooks in the Cc..
And...excuse me..who is benh at kernel.crashing.org?

> Many clocks were not listed in the previous
> arch/arm/mach-s5pv210/clock.c
> 
> We have added clocks defined as CLK_GATE_IPx[] in the user manual of
> S5PV210. However, the clocks that were not turned on at the boot time
> when tested with the previous kernel versions (2.6.32, 2.6.29) are
> defined in "init_clocks_disabled" so that they are turned off at the
> boot time.

I think, no need to register all of clocks which are in the CLK_GATE_IPx
into 'init_clocks_disabled'..because it depends on each platform or project.

> 
> The clocks added from CLK_GATE_IPx are:
> 	CSIS, JPEG, FIMC0 - 2, NFCON, SROMC, TVENC, HDMI, MIXER, VP,
> 	DSIM, TSI, HOSTIF, MODEM, PCM0 - 2, I2C-HDMI-PHY, I2C-HDMI-DDC,
> 	AC97, SPDIF, SECKEY, IEM-APC, IEM-IEC, CHIP-ID, PDMA0 - 1,
> 	MDMA, DMC0 - 1, NANDXL, TZIC0 - 3, VIC0 - 3, SECJTAG, CORESIGHT,
> 	SDM, SECSS, SYSCON, GPIO, TZPC0 - 3
> 

For example...in the case of JPEG, FIMC, disabling is better at the booting
time..because can be enabled dynamically in the device driver when it is
used.
But if CORESIGHT which does not having own driver is disabled at that time,
basically can't use JTAG debugger.

So need to sort out clocks to register into 'init_clocks_disabled'

> Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> ---
>  arch/arm/mach-s5pv210/clock.c |  298
> ++++++++++++++++++++++++++++++++++++++++-
>  1 files changed, 297 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
> index b3d156c..aa2b1c5 100644
> --- a/arch/arm/mach-s5pv210/clock.c
> +++ b/arch/arm/mach-s5pv210/clock.c

(snip)

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH] ARM: S5PV210: add clocks (struct clk).

[MyungJoo Ham]

Hello,

On Fri, Jul 9, 2010 at 11:36 AM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> MyungJoo Ham wrote:
>>
> Hi,
>
> Please include Ben Dooks in the Cc..
> And...excuse me..who is benh at kernel.crashing.org?

Ah.. I was confused by my own reply regarding common struct clk, which
had benh at kernel.crashing.org as Cc. I'll update the CC setting.

>
>> Many clocks were not listed in the previous
>> arch/arm/mach-s5pv210/clock.c
>>
>> We have added clocks defined as CLK_GATE_IPx[] in the user manual of
>> S5PV210. However, the clocks that were not turned on at the boot time
>> when tested with the previous kernel versions (2.6.32, 2.6.29) are
>> defined in "init_clocks_disabled" so that they are turned off at the
>> boot time.
>
> I think, no need to register all of clocks which are in the CLK_GATE_IPx
> into 'init_clocks_disabled'..because it depends on each platform or project.
>
>>
>> The clocks added from CLK_GATE_IPx are:
>> ? ? ? CSIS, JPEG, FIMC0 - 2, NFCON, SROMC, TVENC, HDMI, MIXER, VP,
>> ? ? ? DSIM, TSI, HOSTIF, MODEM, PCM0 - 2, I2C-HDMI-PHY, I2C-HDMI-DDC,
>> ? ? ? AC97, SPDIF, SECKEY, IEM-APC, IEM-IEC, CHIP-ID, PDMA0 - 1,
>> ? ? ? MDMA, DMC0 - 1, NANDXL, TZIC0 - 3, VIC0 - 3, SECJTAG, CORESIGHT,
>> ? ? ? SDM, SECSS, SYSCON, GPIO, TZPC0 - 3
>>
>
> For example...in the case of JPEG, FIMC, disabling is better at the booting
> time..because can be enabled dynamically in the device driver when it is
> used.
> But if CORESIGHT which does not having own driver is disabled at that time,
> basically can't use JTAG debugger.
>
> So need to sort out clocks to register into 'init_clocks_disabled'
>

Yes, I agree. I'll put some clocks including CORESIGHT out of
init_clocks_disabled.


Anyway, I've been considering adding "flag" to struct clk, which has
the following bits:

#define CLKFLAGS_BOOT_ON        (0x1)
#define CLKFLAGS_CANNOT_DISABLE (0x2)
#define CLKFLAGS_ALWAYS_ON      (CLKFLAGS_BOOT_ON | CLKFLAGS_CANNOT_DISABLE)
#define CLKFLAGS_BOOT_OFF       (0x4) /* Force off when boot */
#define CLKFLAGS_DEPRECATED     (0x8) /* Warn when clk_get'd */
/* Note that CLKFLAGS_BOOT_ON and CLKFLAGS_CANNOT_DISABLE overrides
 * CLKFLAGS_BOOT_OFF */

and merging init_clocks and init_clocks_disabled. This provides more
precise control on clocks, and we've been using such features in other
versions of the kernel. Besides, combined with
powerdomain control, these flags are helpful on implementing
powerdomain/block-gating control.


>> Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
>> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
>> ---
>> ?arch/arm/mach-s5pv210/clock.c | ?298
>> ++++++++++++++++++++++++++++++++++++++++-
>> ?1 files changed, 297 insertions(+), 1 deletions(-)
>>
>> diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
>> index b3d156c..aa2b1c5 100644
>> --- a/arch/arm/mach-s5pv210/clock.c
>> +++ b/arch/arm/mach-s5pv210/clock.c
>
> (snip)
>
> Thanks.
>
> Best regards,
> Kgene.
> --
> Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
> SW Solution Development Team, Samsung Electronics Co., Ltd.
>
>

Cheers!
- MyungJoo

-- 
MyungJoo Ham (???), Ph.D.
Mobile Software Platform Lab,
Digital Media and Communications (DMC) Business
Samsung Electronics
cell: 82-10-6714-2858

[PATCH] ARM: S5PV210: add clocks (struct clk).

[MyungJoo Ham]

Hello, again.

On Fri, Jul 9, 2010 at 11:59 AM, MyungJoo Ham <myungjoo.ham@samsung.com> wrote:
> Hello,
>
> On Fri, Jul 9, 2010 at 11:36 AM, Kukjin Kim <kgene.kim@samsung.com> wrote:
>> MyungJoo Ham wrote:
>>>
>> Hi,
>>
>> Please include Ben Dooks in the Cc..
>> And...excuse me..who is benh at kernel.crashing.org?
>
> Ah.. I was confused by my own reply regarding common struct clk, which
> had benh at kernel.crashing.org as Cc. I'll update the CC setting.
>
>>
>>> Many clocks were not listed in the previous
>>> arch/arm/mach-s5pv210/clock.c
>>>
>>> We have added clocks defined as CLK_GATE_IPx[] in the user manual of
>>> S5PV210. However, the clocks that were not turned on at the boot time
>>> when tested with the previous kernel versions (2.6.32, 2.6.29) are
>>> defined in "init_clocks_disabled" so that they are turned off at the
>>> boot time.
>>
>> I think, no need to register all of clocks which are in the CLK_GATE_IPx
>> into 'init_clocks_disabled'..because it depends on each platform or project.
>>
>>>
>>> The clocks added from CLK_GATE_IPx are:
>>> ? ? ? CSIS, JPEG, FIMC0 - 2, NFCON, SROMC, TVENC, HDMI, MIXER, VP,
>>> ? ? ? DSIM, TSI, HOSTIF, MODEM, PCM0 - 2, I2C-HDMI-PHY, I2C-HDMI-DDC,
>>> ? ? ? AC97, SPDIF, SECKEY, IEM-APC, IEM-IEC, CHIP-ID, PDMA0 - 1,
>>> ? ? ? MDMA, DMC0 - 1, NANDXL, TZIC0 - 3, VIC0 - 3, SECJTAG, CORESIGHT,
>>> ? ? ? SDM, SECSS, SYSCON, GPIO, TZPC0 - 3
>>>
>>
>> For example...in the case of JPEG, FIMC, disabling is better at the booting
>> time..because can be enabled dynamically in the device driver when it is
>> used.
>> But if CORESIGHT which does not having own driver is disabled at that time,
>> basically can't use JTAG debugger.
>>
>> So need to sort out clocks to register into 'init_clocks_disabled'
>>
>
> Yes, I agree. I'll put some clocks including CORESIGHT out of
> init_clocks_disabled.
>

Oh.. well, CORESIGHT is not included in init_clocks_disabled in the patch.

In this patch, PDMA, MDMA, DMC, NANDXL, TZIC, VIC, SECJTAG, CORESIGHT,
SDM, SECSS, SYSCON, GPIO, and TZPC are not added to
init_clocks_disabled, but to init_clocks.

Only others including CSIS, JPEG, FIMC0 - 2, NFCON, SROMC, TVENC,
HDMI, MIXER, VP, DSIM, TSI, HOSTIF, MODEM, PCM0 - 2, I2C-HDMI-PHY,
I2C-HDMI-DDC, AC97, SPDIF, SECKEY, IEM-APC, IEM-IEC, and CHIP-ID are
added to init_clocks_disabled. In this list, are there any clocks that
should be out of init_clocks_disabled?

>
> Anyway, I've been considering adding "flag" to struct clk, which has
> the following bits:
>
> #define CLKFLAGS_BOOT_ON ? ? ? ?(0x1)
> #define CLKFLAGS_CANNOT_DISABLE (0x2)
> #define CLKFLAGS_ALWAYS_ON ? ? ?(CLKFLAGS_BOOT_ON | CLKFLAGS_CANNOT_DISABLE)
> #define CLKFLAGS_BOOT_OFF ? ? ? (0x4) /* Force off when boot */
> #define CLKFLAGS_DEPRECATED ? ? (0x8) /* Warn when clk_get'd */
> /* Note that CLKFLAGS_BOOT_ON and CLKFLAGS_CANNOT_DISABLE overrides
> ?* CLKFLAGS_BOOT_OFF */
>
> and merging init_clocks and init_clocks_disabled. This provides more
> precise control on clocks, and we've been using such features in other
> versions of the kernel. Besides, combined with
> powerdomain control, these flags are helpful on implementing
> powerdomain/block-gating control.
>
>
>>> Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
>>> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
>>> ---
>>> ?arch/arm/mach-s5pv210/clock.c | ?298
>>> ++++++++++++++++++++++++++++++++++++++++-
>>> ?1 files changed, 297 insertions(+), 1 deletions(-)
>>>
>>> diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
>>> index b3d156c..aa2b1c5 100644
>>> --- a/arch/arm/mach-s5pv210/clock.c
>>> +++ b/arch/arm/mach-s5pv210/clock.c
>>
>> (snip)
>>
>> Thanks.
>>
>> Best regards,
>> Kgene.
>> --
>> Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
>> SW Solution Development Team, Samsung Electronics Co., Ltd.
>>
>>
>
> Cheers!
> - MyungJoo
>
> --
> MyungJoo Ham (???), Ph.D.
> Mobile Software Platform Lab,
> Digital Media and Communications (DMC) Business
> Samsung Electronics
> cell: 82-10-6714-2858
>



-- 
MyungJoo Ham (???), Ph.D.
Mobile Software Platform Lab,
Digital Media and Communications (DMC) Business
Samsung Electronics
cell: 82-10-6714-2858

[PATCH] ARM: S5PV210: add clocks (struct clk).

[Kukjin Kim]

MyungJoo Ham wrote:
> 
> Hello, again.
> 
Hi :-)

> On Fri, Jul 9, 2010 at 11:59 AM, MyungJoo Ham <myungjoo.ham@samsung.com>
> wrote:
> > Hello,
> >
> > On Fri, Jul 9, 2010 at 11:36 AM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> >> MyungJoo Ham wrote:
> >>>
> >> Hi,
> >>
> >> Please include Ben Dooks in the Cc..
> >> And...excuse me..who is benh at kernel.crashing.org?
> >
> > Ah.. I was confused by my own reply regarding common struct clk, which
> > had benh at kernel.crashing.org as Cc. I'll update the CC setting.
> >
> >>
> >>> Many clocks were not listed in the previous
> >>> arch/arm/mach-s5pv210/clock.c
> >>>
> >>> We have added clocks defined as CLK_GATE_IPx[] in the user manual of
> >>> S5PV210. However, the clocks that were not turned on at the boot time
> >>> when tested with the previous kernel versions (2.6.32, 2.6.29) are
> >>> defined in "init_clocks_disabled" so that they are turned off at the
> >>> boot time.
> >>
> >> I think, no need to register all of clocks which are in the CLK_GATE_IPx
> >> into 'init_clocks_disabled'..because it depends on each platform or project.
> >>
> >>>
> >>> The clocks added from CLK_GATE_IPx are:
> >>>       CSIS, JPEG, FIMC0 - 2, NFCON, SROMC, TVENC, HDMI, MIXER, VP,
> >>>       DSIM, TSI, HOSTIF, MODEM, PCM0 - 2, I2C-HDMI-PHY, I2C-HDMI-DDC,
> >>>       AC97, SPDIF, SECKEY, IEM-APC, IEM-IEC, CHIP-ID, PDMA0 - 1,
> >>>       MDMA, DMC0 - 1, NANDXL, TZIC0 - 3, VIC0 - 3, SECJTAG,
> CORESIGHT,
> >>>       SDM, SECSS, SYSCON, GPIO, TZPC0 - 3
> >>>
> >>
> >> For example...in the case of JPEG, FIMC, disabling is better at the booting
> >> time..because can be enabled dynamically in the device driver when it is
> >> used.
> >> But if CORESIGHT which does not having own driver is disabled at that time,
> >> basically can't use JTAG debugger.
> >>
> >> So need to sort out clocks to register into 'init_clocks_disabled'
> >>
> >
> > Yes, I agree. I'll put some clocks including CORESIGHT out of
> > init_clocks_disabled.
> >
> 
> Oh.. well, CORESIGHT is not included in init_clocks_disabled in the patch.
> 
> In this patch, PDMA, MDMA, DMC, NANDXL, TZIC, VIC, SECJTAG, CORESIGHT,
> SDM, SECSS, SYSCON, GPIO, and TZPC are not added to
> init_clocks_disabled, but to init_clocks.
> 
> Only others including CSIS, JPEG, FIMC0 - 2, NFCON, SROMC, TVENC,
> HDMI, MIXER, VP, DSIM, TSI, HOSTIF, MODEM, PCM0 - 2, I2C-HDMI-PHY,
> I2C-HDMI-DDC, AC97, SPDIF, SECKEY, IEM-APC, IEM-IEC, and CHIP-ID are
> added to init_clocks_disabled. In this list, are there any clocks that
> should be out of init_clocks_disabled?
> 
Hmm..SROMC should be in 'init_clocks'...because eg., generally network which connected SROM bank, driver doesn't have clock enable code...
And others, looks ok...but frankly, need to check again ;-)

> >
> > Anyway, I've been considering adding "flag" to struct clk, which has
> > the following bits:
> >
> > #define CLKFLAGS_BOOT_ON        (0x1)
> > #define CLKFLAGS_CANNOT_DISABLE (0x2)
> > #define CLKFLAGS_ALWAYS_ON      (CLKFLAGS_BOOT_ON |
> CLKFLAGS_CANNOT_DISABLE)
> > #define CLKFLAGS_BOOT_OFF       (0x4) /* Force off when boot */
> > #define CLKFLAGS_DEPRECATED     (0x8) /* Warn when clk_get'd */
> > /* Note that CLKFLAGS_BOOT_ON and CLKFLAGS_CANNOT_DISABLE
> overrides
> >  * CLKFLAGS_BOOT_OFF */
> >
> > and merging init_clocks and init_clocks_disabled. This provides more
> > precise control on clocks, and we've been using such features in other
> > versions of the kernel. Besides, combined with
> > powerdomain control, these flags are helpful on implementing
> > powerdomain/block-gating control.
> >
> >
> >>> Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
> >>> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> >>> ---
> >>>  arch/arm/mach-s5pv210/clock.c |  298
> >>> ++++++++++++++++++++++++++++++++++++++++-
> >>>  1 files changed, 297 insertions(+), 1 deletions(-)
> >>>
> >>> diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
> >>> index b3d156c..aa2b1c5 100644
> >>> --- a/arch/arm/mach-s5pv210/clock.c
> >>> +++ b/arch/arm/mach-s5pv210/clock.c
> >>
> >> (snip)
> >>
> >> Thanks.
> >>
> >> Best regards,
> >> Kgene.
> >> --
> >> Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
> >> SW Solution Development Team, Samsung Electronics Co., Ltd.
> >>
> >>


Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH] ARM: S5PV210: add clocks (struct clk).

[MyungJoo Ham]

Hello.

On Mon, Jul 12, 2010 at 11:32 AM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> MyungJoo Ham wrote:
>>
>> Hello, again.
>>
> Hi :-)
>
>> On Fri, Jul 9, 2010 at 11:59 AM, MyungJoo Ham <myungjoo.ham@samsung.com>
>> wrote:
>> > Hello,
>> >
>> > On Fri, Jul 9, 2010 at 11:36 AM, Kukjin Kim <kgene.kim@samsung.com> wrote:
>> >> MyungJoo Ham wrote:
>> >>>
>> >> Hi,
>> >>
>> >> Please include Ben Dooks in the Cc..
>> >> And...excuse me..who is benh at kernel.crashing.org?
>> >
>> > Ah.. I was confused by my own reply regarding common struct clk, which
>> > had benh at kernel.crashing.org as Cc. I'll update the CC setting.
>> >
>> >>
>> >>> Many clocks were not listed in the previous
>> >>> arch/arm/mach-s5pv210/clock.c
>> >>>
>> >>> We have added clocks defined as CLK_GATE_IPx[] in the user manual of
>> >>> S5PV210. However, the clocks that were not turned on at the boot time
>> >>> when tested with the previous kernel versions (2.6.32, 2.6.29) are
>> >>> defined in "init_clocks_disabled" so that they are turned off at the
>> >>> boot time.
>> >>
>> >> I think, no need to register all of clocks which are in the CLK_GATE_IPx
>> >> into 'init_clocks_disabled'..because it depends on each platform or project.
>> >>
>> >>>
>> >>> The clocks added from CLK_GATE_IPx are:
>> >>> ? ? ? CSIS, JPEG, FIMC0 - 2, NFCON, SROMC, TVENC, HDMI, MIXER, VP,
>> >>> ? ? ? DSIM, TSI, HOSTIF, MODEM, PCM0 - 2, I2C-HDMI-PHY, I2C-HDMI-DDC,
>> >>> ? ? ? AC97, SPDIF, SECKEY, IEM-APC, IEM-IEC, CHIP-ID, PDMA0 - 1,
>> >>> ? ? ? MDMA, DMC0 - 1, NANDXL, TZIC0 - 3, VIC0 - 3, SECJTAG,
>> CORESIGHT,
>> >>> ? ? ? SDM, SECSS, SYSCON, GPIO, TZPC0 - 3
>> >>>
>> >>
>> >> For example...in the case of JPEG, FIMC, disabling is better at the booting
>> >> time..because can be enabled dynamically in the device driver when it is
>> >> used.
>> >> But if CORESIGHT which does not having own driver is disabled at that time,
>> >> basically can't use JTAG debugger.
>> >>
>> >> So need to sort out clocks to register into 'init_clocks_disabled'
>> >>
>> >
>> > Yes, I agree. I'll put some clocks including CORESIGHT out of
>> > init_clocks_disabled.
>> >
>>
>> Oh.. well, CORESIGHT is not included in init_clocks_disabled in the patch.
>>
>> In this patch, PDMA, MDMA, DMC, NANDXL, TZIC, VIC, SECJTAG, CORESIGHT,
>> SDM, SECSS, SYSCON, GPIO, and TZPC are not added to
>> init_clocks_disabled, but to init_clocks.
>>
>> Only others including CSIS, JPEG, FIMC0 - 2, NFCON, SROMC, TVENC,
>> HDMI, MIXER, VP, DSIM, TSI, HOSTIF, MODEM, PCM0 - 2, I2C-HDMI-PHY,
>> I2C-HDMI-DDC, AC97, SPDIF, SECKEY, IEM-APC, IEM-IEC, and CHIP-ID are
>> added to init_clocks_disabled. In this list, are there any clocks that
>> should be out of init_clocks_disabled?
>>
> Hmm..SROMC should be in 'init_clocks'...because eg., generally network which connected SROM bank, driver doesn't have clock enable code...
> And others, looks ok...but frankly, need to check again ;-)

Fine.

Anyway, I'm planning to include the initial states of clocks in struct clk.

That is, adding "unsigned int flag", which include "BOOT_ON", "BOOT",
and "CANNOT_DISABLE", and let s3c_register_clock function do the
operation accordingly.

This will merge init_clocks_disable and init_clocks and allow us more
control over clocks.Besides, it makes it easier to support powerdomain
and block-gating control. Note that if a powerdomain is controlled
with only reference counter, it may turn off a powerdomain with a
clock actually enabled (by the bootloader or by the process default)
but not ever "clk_enable"'d. Adding such information explicitly with
such flags can help.

I will send patches of clock-powerdomain support and clock-flag support soon.


>
>> >
>> > Anyway, I've been considering adding "flag" to struct clk, which has
>> > the following bits:
>> >
>> > #define CLKFLAGS_BOOT_ON ? ? ? ?(0x1)
>> > #define CLKFLAGS_CANNOT_DISABLE (0x2)
>> > #define CLKFLAGS_ALWAYS_ON ? ? ?(CLKFLAGS_BOOT_ON |
>> CLKFLAGS_CANNOT_DISABLE)
>> > #define CLKFLAGS_BOOT_OFF ? ? ? (0x4) /* Force off when boot */
>> > #define CLKFLAGS_DEPRECATED ? ? (0x8) /* Warn when clk_get'd */
>> > /* Note that CLKFLAGS_BOOT_ON and CLKFLAGS_CANNOT_DISABLE
>> overrides
>> > ?* CLKFLAGS_BOOT_OFF */
>> >
>> > and merging init_clocks and init_clocks_disabled. This provides more
>> > precise control on clocks, and we've been using such features in other
>> > versions of the kernel. Besides, combined with
>> > powerdomain control, these flags are helpful on implementing
>> > powerdomain/block-gating control.
>> >
>> >
>> >>> Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
>> >>> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
>> >>> ---
>> >>> ?arch/arm/mach-s5pv210/clock.c | ?298
>> >>> ++++++++++++++++++++++++++++++++++++++++-
>> >>> ?1 files changed, 297 insertions(+), 1 deletions(-)
>> >>>
>> >>> diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
>> >>> index b3d156c..aa2b1c5 100644
>> >>> --- a/arch/arm/mach-s5pv210/clock.c
>> >>> +++ b/arch/arm/mach-s5pv210/clock.c
>> >>
>> >> (snip)
>> >>
>> >> Thanks.
>> >>
>> >> Best regards,
>> >> Kgene.
>> >> --
>> >> Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
>> >> SW Solution Development Team, Samsung Electronics Co., Ltd.
>> >>
>> >>
>
>
> Thanks.
>
> Best regards,
> Kgene.
> --
> Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
> SW Solution Development Team, Samsung Electronics Co., Ltd.
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>



-- 
MyungJoo Ham (???), Ph.D.
Mobile Software Platform Lab,
Digital Media and Communications (DMC) Business
Samsung Electronics
cell: 82-10-6714-2858