[PATCH 0/2] Support for __read_mostly

[PATCH 0/2] Support for __read_mostly

[Russell King - ARM Linux]

This patch set adds support for __read_mostly - a separate section
which is used to hold data which is hardly ever written.

The idea behind this feature is to reduce the amount of cache line
bouncing between SMP cores by avoiding this data sharing cache lines
with data which is written more frequently.  As long as a cache line
is not dirtied, several cores can keep a copy of the data in their
caches.

[PATCH 1/2] ARM: implement support for read-mostly sections

[Russell King - ARM Linux]

As our SMP implementation uses MESI protocols.  Grouping together data
which is mostly only read together means that we avoid unnecessary
cache line bouncing when this code shares a cache line with other data.

In other words, cache lines associated with read-mostly data are
expected to spend most of their time in shared state.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
 arch/arm/include/asm/cache.h  |    2 ++
 arch/arm/kernel/vmlinux.lds.S |    1 +
 2 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h
index 9d61220..75fe66b 100644
--- a/arch/arm/include/asm/cache.h
+++ b/arch/arm/include/asm/cache.h
@@ -23,4 +23,6 @@
 #define ARCH_SLAB_MINALIGN 8
 #endif
 
+#define __read_mostly __attribute__((__section__(".data..read_mostly")))
+
 #endif
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index cead889..1581f6d 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -167,6 +167,7 @@ SECTIONS
 
 		NOSAVE_DATA
 		CACHELINE_ALIGNED_DATA(32)
+		READ_MOSTLY_DATA(32)
 
 		/*
 		 * The exception fixup table (might need resorting at runtime)
-- 
1.6.2.5

[PATCH 2/2] ARM: move high-usage mostly read variables in setup.c to __read_mostly

[Russell King - ARM Linux]

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
 arch/arm/kernel/setup.c |   16 ++++++++--------
 1 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 336f14e..8075e59 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -75,9 +75,9 @@ extern void reboot_setup(char *str);
 
 unsigned int processor_id;
 EXPORT_SYMBOL(processor_id);
-unsigned int __machine_arch_type;
+unsigned int __machine_arch_type __read_mostly;
 EXPORT_SYMBOL(__machine_arch_type);
-unsigned int cacheid;
+unsigned int cacheid __read_mostly;
 EXPORT_SYMBOL(cacheid);
 
 unsigned int __atags_pointer __initdata;
@@ -91,24 +91,24 @@ EXPORT_SYMBOL(system_serial_low);
 unsigned int system_serial_high;
 EXPORT_SYMBOL(system_serial_high);
 
-unsigned int elf_hwcap;
+unsigned int elf_hwcap __read_mostly;
 EXPORT_SYMBOL(elf_hwcap);
 
 
 #ifdef MULTI_CPU
-struct processor processor;
+struct processor processor __read_mostly;
 #endif
 #ifdef MULTI_TLB
-struct cpu_tlb_fns cpu_tlb;
+struct cpu_tlb_fns cpu_tlb __read_mostly;
 #endif
 #ifdef MULTI_USER
-struct cpu_user_fns cpu_user;
+struct cpu_user_fns cpu_user __read_mostly;
 #endif
 #ifdef MULTI_CACHE
-struct cpu_cache_fns cpu_cache;
+struct cpu_cache_fns cpu_cache __read_mostly;
 #endif
 #ifdef CONFIG_OUTER_CACHE
-struct outer_cache_fns outer_cache;
+struct outer_cache_fns outer_cache __read_mostly;
 EXPORT_SYMBOL(outer_cache);
 #endif
 
-- 
1.6.2.5

[PATCH 1/2] ARM: implement support for read-mostly sections

[Catalin Marinas]

On 5 December 2010 11:43, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
> As our SMP implementation uses MESI protocols. ?Grouping together data
> which is mostly only read together means that we avoid unnecessary
> cache line bouncing when this code shares a cache line with other data.
>
> In other words, cache lines associated with read-mostly data are
> expected to spend most of their time in shared state.
>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
> ---
> ?arch/arm/include/asm/cache.h ?| ? ?2 ++
> ?arch/arm/kernel/vmlinux.lds.S | ? ?1 +
> ?2 files changed, 3 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h
> index 9d61220..75fe66b 100644
> --- a/arch/arm/include/asm/cache.h
> +++ b/arch/arm/include/asm/cache.h
> @@ -23,4 +23,6 @@
> ?#define ARCH_SLAB_MINALIGN 8
> ?#endif
>
> +#define __read_mostly __attribute__((__section__(".data..read_mostly")))
> +
> ?#endif
> diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
> index cead889..1581f6d 100644
> --- a/arch/arm/kernel/vmlinux.lds.S
> +++ b/arch/arm/kernel/vmlinux.lds.S
> @@ -167,6 +167,7 @@ SECTIONS
>
> ? ? ? ? ? ? ? ?NOSAVE_DATA
> ? ? ? ? ? ? ? ?CACHELINE_ALIGNED_DATA(32)
> + ? ? ? ? ? ? ? READ_MOSTLY_DATA(32)

Should we change the alignments to 64?

-- 
Catalin

[PATCH 1/2] ARM: implement support for read-mostly sections

[Russell King - ARM Linux]

On Sun, Dec 05, 2010 at 10:18:27PM +0000, Catalin Marinas wrote:
> On 5 December 2010 11:43, Russell King - ARM Linux
> <linux@arm.linux.org.uk> wrote:
> > diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
> > index cead889..1581f6d 100644
> > --- a/arch/arm/kernel/vmlinux.lds.S
> > +++ b/arch/arm/kernel/vmlinux.lds.S
> > @@ -167,6 +167,7 @@ SECTIONS
> >
> > ? ? ? ? ? ? ? ?NOSAVE_DATA
> > ? ? ? ? ? ? ? ?CACHELINE_ALIGNED_DATA(32)
> > + ? ? ? ? ? ? ? READ_MOSTLY_DATA(32)
> 
> Should we change the alignments to 64?

When we have some way to tell vmlinux.lds.S what the cache line size is.
It should be a separate patch.

[PATCH 1/2] ARM: implement support for read-mostly sections

[Catalin Marinas]

On 5 December 2010 23:04, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
> On Sun, Dec 05, 2010 at 10:18:27PM +0000, Catalin Marinas wrote:
>> On 5 December 2010 11:43, Russell King - ARM Linux
>> <linux@arm.linux.org.uk> wrote:
>> > diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
>> > index cead889..1581f6d 100644
>> > --- a/arch/arm/kernel/vmlinux.lds.S
>> > +++ b/arch/arm/kernel/vmlinux.lds.S
>> > @@ -167,6 +167,7 @@ SECTIONS
>> >
>> > ? ? ? ? ? ? ? ?NOSAVE_DATA
>> > ? ? ? ? ? ? ? ?CACHELINE_ALIGNED_DATA(32)
>> > + ? ? ? ? ? ? ? READ_MOSTLY_DATA(32)
>>
>> Should we change the alignments to 64?
>
> When we have some way to tell vmlinux.lds.S what the cache line size is.

I haven't tried but can we not use CONFIG_ARM_L1_CACHE_SHIFT?

-- 
Catalin