[RFC][PATCH 4/5] ARM: S5P64x0: Adding OTG PHY control code

[RFC][PATCH 4/5] ARM: S5P64x0: Adding OTG PHY control code

[Praveen Paneri]

Hi,

On Tue, Jun 21, 2011 at 4:19 PM, PRAVEEN PANERI <p.paneri@samsung.com> wrote:
>
>
>
> Hi,
>
> On Tue, Jun 21, 2011 at 12:33:46PM +0530, p.paneri at samsung.com wrote:
> > From: Praveen Paneri
> >
> > A generic method to initialize and exit OTG PHY which can be
> > used for all the samsung SoCs.
> > OTG platdata structure added in platform to pass required
> > platform specific functions and data to the driver.
> >
> > Signed-off-by: Praveen Paneri
> > ---
> >??arch/arm/mach-s5p64x0/Makefile?????????? |????1 +
> >??arch/arm/mach-s5p64x0/include/mach/map.h |????4 +
> >??arch/arm/mach-s5p64x0/setup-otg-phy.c????|?? 89 ++++++++++++++++++++++++++++++
> >??arch/arm/plat-s5p/include/plat/otg.h???? |?? 29 ++++++++++
> >??4 files changed, 123 insertions(+), 0 deletions(-)
> >??create mode 100644 arch/arm/mach-s5p64x0/setup-otg-phy.c
> >??create mode 100644 arch/arm/plat-s5p/include/plat/otg.h
> >
> > diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile
> > index ae6bf6f..611fb3a 100644
> > --- a/arch/arm/mach-s5p64x0/Makefile
> > +++ b/arch/arm/mach-s5p64x0/Makefile
> > @@ -28,3 +28,4 @@ obj-y += dev-audio.o
> >??obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
> >
> >??obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o
> > +obj-$(CONFIG_S3C_DEV_DWC_OTG) += setup-otg-phy.o
> > diff --git a/arch/arm/mach-s5p64x0/include/mach/map.h b/arch/arm/mach-s5p64x0/include/mach/map.h
> > index 95c9125..717c279 100644
> > --- a/arch/arm/mach-s5p64x0/include/mach/map.h
> > +++ b/arch/arm/mach-s5p64x0/include/mach/map.h
> > @@ -44,6 +44,8 @@
> >??#define S5P64X0_PA_SPI1 0xEC500000
> >
> >??#define S5P64X0_PA_HSOTG 0xED100000
> > +#define S5P64X0_PA_USB_HSPHY 0xED200000
> > +#define S5P64X0_VA_USB_HSPHY S3C_ADDR_CPU(0x00100000)
> >
> >??#define S5P64X0_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000))
> >
> > @@ -71,6 +73,8 @@
> >??#define S5P_PA_TIMER S5P64X0_PA_TIMER
> >
> >??#define SAMSUNG_PA_ADC S5P64X0_PA_ADC
> > +#define S3C_PA_USB_HSOTG S5P64X0_PA_HSOTG
> > +#define S3C_VA_USB_HSPHY????????S5P64X0_VA_USB_HSPHY
> >
> >??/* UART */
> >
> > diff --git a/arch/arm/mach-s5p64x0/setup-otg-phy.c b/arch/arm/mach-s5p64x0/setup-otg-phy.c
>
> drivers should not live in arch/arm/*, why don't you move this to
> drivers/usb/otg where the PHYs are staying right now ?
PHY init/exit code can vary across SoCs. Wouldn't it be better to have it in the
SoC specific location?
>
> > new file mode 100644
> > index 0000000..c351554
> > --- /dev/null
> > +++ b/arch/arm/mach-s5p64x0/setup-otg-phy.c
> > @@ -0,0 +1,89 @@
> > +/*
> > + * Copyright (C) 2011 Samsung Electronics Co.Ltd
> > + * Author: Praveen Paneri
> > + * based on arch/arm/mach-exynos4/setup-usb-phy.c
> > + * written by Joonyoung Shim
> > + *
> > + *??This program is free software; you can redistribute??it and/or modify it
> > + *??under??the terms of??the GNU General??Public License as published by the
> > + *??Free Software Foundation;??either version 2 of the??License, or (at your
> > + *??option) any later version.
> > + *
> > + */
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +struct clk *otg_clk;
> > +static int s5p64x0_otg_phy_init(struct platform_device *pdev)
> > +{
> > + int err;
> > +
> > + otg_clk = clk_get(&pdev->dev, "otg");
> > + if (IS_ERR(otg_clk)) {
> > + dev_err(&pdev->dev, "Failed to get otg clock\n");
> > + return PTR_ERR(otg_clk);
> > + }
> > +
> > + err = clk_enable(otg_clk);
> > + if (err) {
> > + clk_put(otg_clk);
> > + return err;
> > + }
> > +
> > + if (gpio_is_valid(S5P6440_GPN(1))) {
> > + err = gpio_request(S5P6440_GPN(1), "GPN");
> > + if (err)
> > + printk(KERN_ERR "failed to request GPN1\n");
> > + gpio_direction_output(S5P6440_GPN(1), 1);
> > + }
> > +
> > + writel(readl(S5P64X0_OTHERS)&~S5P64X0_OTHERS_USB_SIG_MASK,
> > + S5P64X0_OTHERS);
> > + writel(0x0, S3C_PHYPWR);???????? /* Power up */
> > + writel(S3C_PHYCLK_CLKSEL_12M, S3C_PHYCLK);
> > + writel(S3C_RSTCON_PHY, S3C_RSTCON);
> > +
> > + udelay(50);
> > + writel(0x0, S3C_RSTCON);
> > + udelay(50);
> > +
> > + return 0;
> > +}
> > +
> > +static int s5p64x0_otg_phy_exit(struct platform_device *pdev)
> > +{
> > + writel(readl(S3C_PHYPWR)|(0x1F<<1), S3C_PHYPWR);
> > + writel(readl(S5P64X0_OTHERS)&~S5P64X0_OTHERS_USB_SIG_MASK,
> > + S5P64X0_OTHERS);
> > +
> > + gpio_free(S5P6440_GPN(1));
> > +
> > + clk_disable(otg_clk);
> > + clk_put(otg_clk);
> > +
> > + return 0;
> > +}
> > +
> > +int s5p_usb_phy_init(struct platform_device *pdev, int type)
> > +{
> > + if (type == S5P_USB_PHY_DEVICE)
> > + return s5p64x0_otg_phy_init(pdev);
> > +
> > + return -EINVAL;
> > +}
> > +
> > +int s5p_usb_phy_exit(struct platform_device *pdev, int type)
> > +{
> > + if (type == S5P_USB_PHY_DEVICE)
> > + return s5p64x0_otg_phy_exit(pdev);
> > +
> > + return -EINVAL;
> > +}
>
> no way to make this a real driver instead of set a exported functions ??
>
> --
> balbi
>
paneri

[RFC][PATCH 4/5] ARM: S5P64x0: Adding OTG PHY control code

[Felipe Balbi]

Hi,

On Wed, Jun 22, 2011 at 01:56:25PM +0530, Praveen Paneri wrote:
> > > diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile
> > > index ae6bf6f..611fb3a 100644
> > > --- a/arch/arm/mach-s5p64x0/Makefile
> > > +++ b/arch/arm/mach-s5p64x0/Makefile
> > > @@ -28,3 +28,4 @@ obj-y += dev-audio.o
> > >??obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
> > >
> > >??obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o
> > > +obj-$(CONFIG_S3C_DEV_DWC_OTG) += setup-otg-phy.o
> > > diff --git a/arch/arm/mach-s5p64x0/include/mach/map.h b/arch/arm/mach-s5p64x0/include/mach/map.h
> > > index 95c9125..717c279 100644
> > > --- a/arch/arm/mach-s5p64x0/include/mach/map.h
> > > +++ b/arch/arm/mach-s5p64x0/include/mach/map.h
> > > @@ -44,6 +44,8 @@
> > >??#define S5P64X0_PA_SPI1 0xEC500000
> > >
> > >??#define S5P64X0_PA_HSOTG 0xED100000
> > > +#define S5P64X0_PA_USB_HSPHY 0xED200000
> > > +#define S5P64X0_VA_USB_HSPHY S3C_ADDR_CPU(0x00100000)
> > >
> > >??#define S5P64X0_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000))
> > >
> > > @@ -71,6 +73,8 @@
> > >??#define S5P_PA_TIMER S5P64X0_PA_TIMER
> > >
> > >??#define SAMSUNG_PA_ADC S5P64X0_PA_ADC
> > > +#define S3C_PA_USB_HSOTG S5P64X0_PA_HSOTG
> > > +#define S3C_VA_USB_HSPHY????????S5P64X0_VA_USB_HSPHY
> > >
> > >??/* UART */
> > >
> > > diff --git a/arch/arm/mach-s5p64x0/setup-otg-phy.c b/arch/arm/mach-s5p64x0/setup-otg-phy.c
> >
> > drivers should not live in arch/arm/*, why don't you move this to
> > drivers/usb/otg where the PHYs are staying right now ?
> PHY init/exit code can vary across SoCs. Wouldn't it be better to have it in the
> SoC specific location?

It will vary how ? If it's only regarding e.g. a different GPIO pin or a
different IRQ number, you handle that by passing data down to driver
(via platform_data or struct resource), now if it varies because a
different board uses a different PHY, then another driver should be
written (well, as long as it's really different from the one you have
now, otherwise you should see if it's worth making the existing driver
more flexible).

-- 
balbi
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[RFC][PATCH 4/5] ARM: S5P64x0: Adding OTG PHY control code

[Praveen Paneri]

Hi Felipe,

Sorry for a delayed response to your comment. I have been addressing
all the comment given
by you, following two points remain where I need your suggestion.

On Wed, Jun 22, 2011 at 3:19 PM, Felipe Balbi <balbi@ti.com> wrote:
> Hi,
>
> On Wed, Jun 22, 2011 at 01:56:25PM +0530, Praveen Paneri wrote:
>> > > diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile
>> > > index ae6bf6f..611fb3a 100644
>> > > --- a/arch/arm/mach-s5p64x0/Makefile
>> > > +++ b/arch/arm/mach-s5p64x0/Makefile
>> > > @@ -28,3 +28,4 @@ obj-y += dev-audio.o
>> > >??obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
>> > >
>> > >??obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o
>> > > +obj-$(CONFIG_S3C_DEV_DWC_OTG) += setup-otg-phy.o
>> > > diff --git a/arch/arm/mach-s5p64x0/include/mach/map.h b/arch/arm/mach-s5p64x0/include/mach/map.h
>> > > index 95c9125..717c279 100644
>> > > --- a/arch/arm/mach-s5p64x0/include/mach/map.h
>> > > +++ b/arch/arm/mach-s5p64x0/include/mach/map.h
>> > > @@ -44,6 +44,8 @@
>> > >??#define S5P64X0_PA_SPI1 0xEC500000
>> > >
>> > >??#define S5P64X0_PA_HSOTG 0xED100000
>> > > +#define S5P64X0_PA_USB_HSPHY 0xED200000
>> > > +#define S5P64X0_VA_USB_HSPHY S3C_ADDR_CPU(0x00100000)
>> > >
>> > >??#define S5P64X0_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000))
>> > >
>> > > @@ -71,6 +73,8 @@
>> > >??#define S5P_PA_TIMER S5P64X0_PA_TIMER
>> > >
>> > >??#define SAMSUNG_PA_ADC S5P64X0_PA_ADC
>> > > +#define S3C_PA_USB_HSOTG S5P64X0_PA_HSOTG
>> > > +#define S3C_VA_USB_HSPHY????????S5P64X0_VA_USB_HSPHY
>> > >
>> > >??/* UART */
>> > >
>> > > diff --git a/arch/arm/mach-s5p64x0/setup-otg-phy.c b/arch/arm/mach-s5p64x0/setup-otg-phy.c
>> >
>> > drivers should not live in arch/arm/*, why don't you move this to
>> > drivers/usb/otg where the PHYs are staying right now ?
>> PHY init/exit code can vary across SoCs. Wouldn't it be better to have it in the
>> SoC specific location?
>
> It will vary how ? If it's only regarding e.g. a different GPIO pin or a
> different IRQ number, you handle that by passing data down to driver
> (via platform_data or struct resource), now if it varies because a
> different board uses a different PHY, then another driver should be
> written (well, as long as it's really different from the one you have
> now, otherwise you should see if it's worth making the existing driver
> more flexible).
We have only 4 registers which are used for phy control. The bit structure
of these registers vary across the SoCs.
1) PHY power control
2) PHY clock control
3) OTG reset control
4) PHY tune

To init/de-init the phy we just need to set the above 4 registers appropriately.
Do you still think there is a necessity for a separate driver ?

I have gone through the reference drivers suggested by you.
Functionality of this PHY
control remains very less relative to those drivers.

I have removed a lot of ifdefery from the initial patches. The only
problem I am facing is
in implementing a generic register I/O method which can work for both
ARM and PPC.
Existing code for PPC was using following funtions
in_le32, in_be32, out_le32, out_be32
while in ARM readl and writel functions are used.
kindly suggest a way out of it.
>
> --
> balbi
>

[RFC][PATCH 4/5] ARM: S5P64x0: Adding OTG PHY control code

[Felipe Balbi]

Hi,

On Wed, Jul 06, 2011 at 11:03:10AM +0530, Praveen Paneri wrote:
> >> > drivers should not live in arch/arm/*, why don't you move this to
> >> > drivers/usb/otg where the PHYs are staying right now ?
> >> PHY init/exit code can vary across SoCs. Wouldn't it be better to have it in the
> >> SoC specific location?
> >
> > It will vary how ? If it's only regarding e.g. a different GPIO pin or a
> > different IRQ number, you handle that by passing data down to driver
> > (via platform_data or struct resource), now if it varies because a
> > different board uses a different PHY, then another driver should be
> > written (well, as long as it's really different from the one you have
> > now, otherwise you should see if it's worth making the existing driver
> > more flexible).
> We have only 4 registers which are used for phy control. The bit structure
> of these registers vary across the SoCs.
> 1) PHY power control
> 2) PHY clock control
> 3) OTG reset control
> 4) PHY tune
> 
> To init/de-init the phy we just need to set the above 4 registers appropriately.
> Do you still think there is a necessity for a separate driver ?

well, we do have the otg utilities on drivers/usb/otg/ ;-)

> I have gone through the reference drivers suggested by you.
> Functionality of this PHY
> control remains very less relative to those drivers.

on OMAP4 we have one "PHY" which actually only handle VBUS and ID pin
detection :-p

> I have removed a lot of ifdefery from the initial patches. The only
> problem I am facing is
> in implementing a generic register I/O method which can work for both
> ARM and PPC.
> Existing code for PPC was using following funtions
> in_le32, in_be32, out_le32, out_be32
> while in ARM readl and writel functions are used.
> kindly suggest a way out of it.

Can you use the versions on include/asm-generic/io.h ?
ioread8(addr), ioread16(addr), ioread32(addr)

-- 
balbi
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[RFC][PATCH 4/5] ARM: S5P64x0: Adding OTG PHY control code

[Praveen Paneri]

Hi,

On Tue, Jun 21, 2011 at 4:20 PM, PRAVEEN PANERI <p.paneri@samsung.com> wrote:
>
> On Tue, Jun 21, 2011 at 12:33:46PM +0530, p.paneri at samsung.com wrote:
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
>
> linux/gpio.h please.
will change it
Thanks
Paneri
>
>
>
>
>
>

[RFC][PATCH 4/5] ARM: S5P64x0: Adding OTG PHY control code

[Russell King - ARM Linux]

On Tue, Jun 21, 2011 at 05:56:05PM +0530, Praveen Paneri wrote:
> Hi,
> 
> On Tue, Jun 21, 2011 at 4:20 PM, PRAVEEN PANERI <p.paneri@samsung.com> wrote:

Err, that attributation is wrong.

> > On Tue, Jun 21, 2011 at 12:33:46PM +0530, p.paneri at samsung.com wrote:
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> >
> > linux/gpio.h please.
> will change it

You should question why your mailer decided to remove the contents after
the "#include" when quoting.  Maybe you need to get a better mailer, fix
some configuration setting, or complain to google that gmail is messing
with emails in ways it shouldn't.

However, I doubt that gmail itself is as broken as it appears to be
above... but whatever it is, it needs fixing.

[RFC][PATCH 0/5] USB: DWC OTG: Add dwc_otg driver for S5P6440 samsung SoC.

[p.paneri at samsung.com]

From: Praveen Paneri <p.paneri@samsung.com>

These patches modify DWC OTG driver for ARM and add it for ARM based SoCs.
Currently it has been tested for Samsung's S5P6440. The development is still 
under process so these are not the best set of patches. They are just for review
and not for merge. Intent of these patches is to show required modifications
to make dwc_otg patches work on ARM.

Following features are tested for basic functions on SMDK6440
board after modifications:
OTG HOST: HID and mass-storage
OTG DEVICE: mass-storage and adb

This patch series is based on below dwc_otg patches
	http://patchwork.ozlabs.org/patch/89560/

To: Tirumala Marri, Felipe Balbi
[PATCH 1/5] USB: DWC OTG: Modification in DWC OTG driver for ARM based SoCs

To: Kukjin Kim
[PATCH 2/5] ARM: SAMSUNG: Changing the build condition of OTG platform device for samsung
[PATCH 3/5] ARM: SAMSUNG: Adding IO mapping for OTG
[PATCH 4/5] ARM: S5P64x0: Adding OTG PHY control code
[PATCH 5/5] ARM: S5P64x0: Adding OTG device and initialization code for smdk6440

[RFC][PATCH 4/5] ARM: S5P64x0: Adding OTG PHY control code

[p.paneri at samsung.com]

From: Praveen Paneri <p.paneri@samsung.com>

A generic method to initialize and exit OTG PHY which can be
used for all the samsung SoCs.
OTG platdata structure added in platform to pass required
platform specific functions and data to the driver.

Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
---
 arch/arm/mach-s5p64x0/Makefile           |    1 +
 arch/arm/mach-s5p64x0/include/mach/map.h |    4 +
 arch/arm/mach-s5p64x0/setup-otg-phy.c    |   89 ++++++++++++++++++++++++++++++
 arch/arm/plat-s5p/include/plat/otg.h     |   29 ++++++++++
 4 files changed, 123 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-s5p64x0/setup-otg-phy.c
 create mode 100644 arch/arm/plat-s5p/include/plat/otg.h

diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile
index ae6bf6f..611fb3a 100644
--- a/arch/arm/mach-s5p64x0/Makefile
+++ b/arch/arm/mach-s5p64x0/Makefile
@@ -28,3 +28,4 @@ obj-y				+= dev-audio.o
 obj-$(CONFIG_S3C64XX_DEV_SPI)	+= dev-spi.o
 
 obj-$(CONFIG_S5P64X0_SETUP_I2C1)	+= setup-i2c1.o
+obj-$(CONFIG_S3C_DEV_DWC_OTG)	+= setup-otg-phy.o
diff --git a/arch/arm/mach-s5p64x0/include/mach/map.h b/arch/arm/mach-s5p64x0/include/mach/map.h
index 95c9125..717c279 100644
--- a/arch/arm/mach-s5p64x0/include/mach/map.h
+++ b/arch/arm/mach-s5p64x0/include/mach/map.h
@@ -44,6 +44,8 @@
 #define S5P64X0_PA_SPI1		0xEC500000
 
 #define S5P64X0_PA_HSOTG	0xED100000
+#define S5P64X0_PA_USB_HSPHY	0xED200000
+#define S5P64X0_VA_USB_HSPHY	S3C_ADDR_CPU(0x00100000)
 
 #define S5P64X0_PA_HSMMC(x)	(0xED800000 + ((x) * 0x100000))
 
@@ -71,6 +73,8 @@
 #define S5P_PA_TIMER		S5P64X0_PA_TIMER
 
 #define SAMSUNG_PA_ADC		S5P64X0_PA_ADC
+#define S3C_PA_USB_HSOTG	S5P64X0_PA_HSOTG
+#define S3C_VA_USB_HSPHY        S5P64X0_VA_USB_HSPHY
 
 /* UART */
 
diff --git a/arch/arm/mach-s5p64x0/setup-otg-phy.c b/arch/arm/mach-s5p64x0/setup-otg-phy.c
new file mode 100644
index 0000000..c351554
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/setup-otg-phy.c
@@ -0,0 +1,89 @@
+/*
+ * Copyright (C) 2011 Samsung Electronics Co.Ltd
+ * Author: Praveen Paneri <p.paneri@samsung.com>
+ * based on arch/arm/mach-exynos4/setup-usb-phy.c
+ * written by Joonyoung Shim <jy0922.shim@samsung.com>
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <mach/regs-clock.h>
+#include <mach/gpio.h>
+#include <plat/regs-usb-hsotg-phy.h>
+#include <plat/usb-phy.h>
+
+struct clk *otg_clk;
+static int s5p64x0_otg_phy_init(struct platform_device *pdev)
+{
+	int err;
+
+	otg_clk = clk_get(&pdev->dev, "otg");
+	if (IS_ERR(otg_clk)) {
+		dev_err(&pdev->dev, "Failed to get otg clock\n");
+		return PTR_ERR(otg_clk);
+	}
+
+	err = clk_enable(otg_clk);
+	if (err) {
+		clk_put(otg_clk);
+		return err;
+	}
+
+	if (gpio_is_valid(S5P6440_GPN(1))) {
+		err = gpio_request(S5P6440_GPN(1), "GPN");
+		if (err)
+			printk(KERN_ERR "failed to request GPN1\n");
+		gpio_direction_output(S5P6440_GPN(1), 1);
+	}
+
+	writel(readl(S5P64X0_OTHERS)&~S5P64X0_OTHERS_USB_SIG_MASK,
+							S5P64X0_OTHERS);
+	writel(0x0, S3C_PHYPWR);         /* Power up */
+	writel(S3C_PHYCLK_CLKSEL_12M, S3C_PHYCLK);
+	writel(S3C_RSTCON_PHY, S3C_RSTCON);
+
+	udelay(50);
+	writel(0x0, S3C_RSTCON);
+	udelay(50);
+
+	return 0;
+}
+
+static int s5p64x0_otg_phy_exit(struct platform_device *pdev)
+{
+	writel(readl(S3C_PHYPWR)|(0x1F<<1), S3C_PHYPWR);
+	writel(readl(S5P64X0_OTHERS)&~S5P64X0_OTHERS_USB_SIG_MASK,
+							S5P64X0_OTHERS);
+
+	gpio_free(S5P6440_GPN(1));
+
+	clk_disable(otg_clk);
+	clk_put(otg_clk);
+
+	return 0;
+}
+
+int s5p_usb_phy_init(struct platform_device *pdev, int type)
+{
+	if (type == S5P_USB_PHY_DEVICE)
+		return s5p64x0_otg_phy_init(pdev);
+
+	return -EINVAL;
+}
+
+int s5p_usb_phy_exit(struct platform_device *pdev, int type)
+{
+	if (type == S5P_USB_PHY_DEVICE)
+		return s5p64x0_otg_phy_exit(pdev);
+
+	return -EINVAL;
+}
diff --git a/arch/arm/plat-s5p/include/plat/otg.h b/arch/arm/plat-s5p/include/plat/otg.h
new file mode 100644
index 0000000..3111dcc
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/otg.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2011 Samsung Electronics Co.Ltd
+ * Author: Praveen Paneri <p.paneri@samsung.com>
+ * based on arch/arm/plat-s5p/include/plat/usb-phy.h
+ * written by Joonyoung Shim <jy0922.shim@samsung.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __PLAT_S5P_OTG_H
+#define __PLAT_S5P_OTG_H
+
+struct s5p_otg_platdata {
+	int (*phy_init)(struct platform_device *pdev, int type);
+	int (*phy_exit)(struct platform_device *pdev, int type);
+	u32 dev_rx_fifo_size;
+	u32 dev_nptx_fifo_size;
+	u32 host_rx_fifo_size;
+	u32 host_nptx_fifo_size;
+	u32 host_ch_num;
+
+};
+
+extern void s5p_otg_set_platdata(struct s5p_otg_platdata *pd);
+
+#endif /* __PLAT_S5P_OTG_H */
-- 
1.7.0.4

[RFC][PATCH 4/5] ARM: S5P64x0: Adding OTG PHY control code

[Felipe Balbi]

Hi,

On Tue, Jun 21, 2011 at 12:33:46PM +0530, p.paneri at samsung.com wrote:
> From: Praveen Paneri <p.paneri@samsung.com>
> 
> A generic method to initialize and exit OTG PHY which can be
> used for all the samsung SoCs.
> OTG platdata structure added in platform to pass required
> platform specific functions and data to the driver.
> 
> Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
> ---
>  arch/arm/mach-s5p64x0/Makefile           |    1 +
>  arch/arm/mach-s5p64x0/include/mach/map.h |    4 +
>  arch/arm/mach-s5p64x0/setup-otg-phy.c    |   89 ++++++++++++++++++++++++++++++
>  arch/arm/plat-s5p/include/plat/otg.h     |   29 ++++++++++
>  4 files changed, 123 insertions(+), 0 deletions(-)
>  create mode 100644 arch/arm/mach-s5p64x0/setup-otg-phy.c
>  create mode 100644 arch/arm/plat-s5p/include/plat/otg.h
> 
> diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile
> index ae6bf6f..611fb3a 100644
> --- a/arch/arm/mach-s5p64x0/Makefile
> +++ b/arch/arm/mach-s5p64x0/Makefile
> @@ -28,3 +28,4 @@ obj-y				+= dev-audio.o
>  obj-$(CONFIG_S3C64XX_DEV_SPI)	+= dev-spi.o
>  
>  obj-$(CONFIG_S5P64X0_SETUP_I2C1)	+= setup-i2c1.o
> +obj-$(CONFIG_S3C_DEV_DWC_OTG)	+= setup-otg-phy.o
> diff --git a/arch/arm/mach-s5p64x0/include/mach/map.h b/arch/arm/mach-s5p64x0/include/mach/map.h
> index 95c9125..717c279 100644
> --- a/arch/arm/mach-s5p64x0/include/mach/map.h
> +++ b/arch/arm/mach-s5p64x0/include/mach/map.h
> @@ -44,6 +44,8 @@
>  #define S5P64X0_PA_SPI1		0xEC500000
>  
>  #define S5P64X0_PA_HSOTG	0xED100000
> +#define S5P64X0_PA_USB_HSPHY	0xED200000
> +#define S5P64X0_VA_USB_HSPHY	S3C_ADDR_CPU(0x00100000)
>  
>  #define S5P64X0_PA_HSMMC(x)	(0xED800000 + ((x) * 0x100000))
>  
> @@ -71,6 +73,8 @@
>  #define S5P_PA_TIMER		S5P64X0_PA_TIMER
>  
>  #define SAMSUNG_PA_ADC		S5P64X0_PA_ADC
> +#define S3C_PA_USB_HSOTG	S5P64X0_PA_HSOTG
> +#define S3C_VA_USB_HSPHY        S5P64X0_VA_USB_HSPHY
>  
>  /* UART */
>  
> diff --git a/arch/arm/mach-s5p64x0/setup-otg-phy.c b/arch/arm/mach-s5p64x0/setup-otg-phy.c

drivers should not live in arch/arm/*, why don't you move this to
drivers/usb/otg where the PHYs are staying right now ?

> new file mode 100644
> index 0000000..c351554
> --- /dev/null
> +++ b/arch/arm/mach-s5p64x0/setup-otg-phy.c
> @@ -0,0 +1,89 @@
> +/*
> + * Copyright (C) 2011 Samsung Electronics Co.Ltd
> + * Author: Praveen Paneri <p.paneri@samsung.com>
> + * based on arch/arm/mach-exynos4/setup-usb-phy.c
> + * written by Joonyoung Shim <jy0922.shim@samsung.com>
> + *
> + *  This program is free software; you can redistribute  it and/or modify it
> + *  under  the terms of  the GNU General  Public License as published by the
> + *  Free Software Foundation;  either version 2 of the  License, or (at your
> + *  option) any later version.
> + *
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/platform_device.h>
> +#include <mach/regs-clock.h>
> +#include <mach/gpio.h>
> +#include <plat/regs-usb-hsotg-phy.h>
> +#include <plat/usb-phy.h>
> +
> +struct clk *otg_clk;
> +static int s5p64x0_otg_phy_init(struct platform_device *pdev)
> +{
> +	int err;
> +
> +	otg_clk = clk_get(&pdev->dev, "otg");
> +	if (IS_ERR(otg_clk)) {
> +		dev_err(&pdev->dev, "Failed to get otg clock\n");
> +		return PTR_ERR(otg_clk);
> +	}
> +
> +	err = clk_enable(otg_clk);
> +	if (err) {
> +		clk_put(otg_clk);
> +		return err;
> +	}
> +
> +	if (gpio_is_valid(S5P6440_GPN(1))) {
> +		err = gpio_request(S5P6440_GPN(1), "GPN");
> +		if (err)
> +			printk(KERN_ERR "failed to request GPN1\n");
> +		gpio_direction_output(S5P6440_GPN(1), 1);
> +	}
> +
> +	writel(readl(S5P64X0_OTHERS)&~S5P64X0_OTHERS_USB_SIG_MASK,
> +							S5P64X0_OTHERS);
> +	writel(0x0, S3C_PHYPWR);         /* Power up */
> +	writel(S3C_PHYCLK_CLKSEL_12M, S3C_PHYCLK);
> +	writel(S3C_RSTCON_PHY, S3C_RSTCON);
> +
> +	udelay(50);
> +	writel(0x0, S3C_RSTCON);
> +	udelay(50);
> +
> +	return 0;
> +}
> +
> +static int s5p64x0_otg_phy_exit(struct platform_device *pdev)
> +{
> +	writel(readl(S3C_PHYPWR)|(0x1F<<1), S3C_PHYPWR);
> +	writel(readl(S5P64X0_OTHERS)&~S5P64X0_OTHERS_USB_SIG_MASK,
> +							S5P64X0_OTHERS);
> +
> +	gpio_free(S5P6440_GPN(1));
> +
> +	clk_disable(otg_clk);
> +	clk_put(otg_clk);
> +
> +	return 0;
> +}
> +
> +int s5p_usb_phy_init(struct platform_device *pdev, int type)
> +{
> +	if (type == S5P_USB_PHY_DEVICE)
> +		return s5p64x0_otg_phy_init(pdev);
> +
> +	return -EINVAL;
> +}
> +
> +int s5p_usb_phy_exit(struct platform_device *pdev, int type)
> +{
> +	if (type == S5P_USB_PHY_DEVICE)
> +		return s5p64x0_otg_phy_exit(pdev);
> +
> +	return -EINVAL;
> +}

no way to make this a real driver instead of set a exported functions ??

-- 
balbi
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[RFC][PATCH 4/5] ARM: S5P64x0: Adding OTG PHY control code

[Russell King - ARM Linux]

On Tue, Jun 21, 2011 at 12:33:46PM +0530, p.paneri at samsung.com wrote:
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/platform_device.h>
> +#include <mach/regs-clock.h>
> +#include <mach/gpio.h>

linux/gpio.h please.

[RFC][PATCH 4/5] ARM: S5P64x0: Adding OTG PHY control code

[Kyungmin Park]

On Tue, Jun 21, 2011 at 4:03 PM,  <p.paneri@samsung.com> wrote:
> From: Praveen Paneri <p.paneri@samsung.com>
>
> A generic method to initialize and exit OTG PHY which can be
> used for all the samsung SoCs.
> OTG platdata structure added in platform to pass required
> platform specific functions and data to the driver.
>
> Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
> ---
> ?arch/arm/mach-s5p64x0/Makefile ? ? ? ? ? | ? ?1 +
> ?arch/arm/mach-s5p64x0/include/mach/map.h | ? ?4 +
> ?arch/arm/mach-s5p64x0/setup-otg-phy.c ? ?| ? 89 ++++++++++++++++++++++++++++++
> ?arch/arm/plat-s5p/include/plat/otg.h ? ? | ? 29 ++++++++++
> ?4 files changed, 123 insertions(+), 0 deletions(-)
> ?create mode 100644 arch/arm/mach-s5p64x0/setup-otg-phy.c
> ?create mode 100644 arch/arm/plat-s5p/include/plat/otg.h
>
> diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile
> index ae6bf6f..611fb3a 100644
> --- a/arch/arm/mach-s5p64x0/Makefile
> +++ b/arch/arm/mach-s5p64x0/Makefile
> @@ -28,3 +28,4 @@ obj-y ? ? ? ? ? ? ? ? ? ? ? ? += dev-audio.o
> ?obj-$(CONFIG_S3C64XX_DEV_SPI) ?+= dev-spi.o
>
> ?obj-$(CONFIG_S5P64X0_SETUP_I2C1) ? ? ? += setup-i2c1.o
> +obj-$(CONFIG_S3C_DEV_DWC_OTG) ?+= setup-otg-phy.o
> diff --git a/arch/arm/mach-s5p64x0/include/mach/map.h b/arch/arm/mach-s5p64x0/include/mach/map.h
> index 95c9125..717c279 100644
> --- a/arch/arm/mach-s5p64x0/include/mach/map.h
> +++ b/arch/arm/mach-s5p64x0/include/mach/map.h
> @@ -44,6 +44,8 @@
> ?#define S5P64X0_PA_SPI1 ? ? ? ? ? ? ? ?0xEC500000
>
> ?#define S5P64X0_PA_HSOTG ? ? ? 0xED100000
> +#define S5P64X0_PA_USB_HSPHY ? 0xED200000
> +#define S5P64X0_VA_USB_HSPHY ? S3C_ADDR_CPU(0x00100000)
>
> ?#define S5P64X0_PA_HSMMC(x) ? ?(0xED800000 + ((x) * 0x100000))
>
> @@ -71,6 +73,8 @@
> ?#define S5P_PA_TIMER ? ? ? ? ? S5P64X0_PA_TIMER
>
> ?#define SAMSUNG_PA_ADC ? ? ? ? S5P64X0_PA_ADC
> +#define S3C_PA_USB_HSOTG ? ? ? S5P64X0_PA_HSOTG
> +#define S3C_VA_USB_HSPHY ? ? ? ?S5P64X0_VA_USB_HSPHY
>
> ?/* UART */
>
> diff --git a/arch/arm/mach-s5p64x0/setup-otg-phy.c b/arch/arm/mach-s5p64x0/setup-otg-phy.c
> new file mode 100644
> index 0000000..c351554
> --- /dev/null
> +++ b/arch/arm/mach-s5p64x0/setup-otg-phy.c
> @@ -0,0 +1,89 @@
> +/*
> + * Copyright (C) 2011 Samsung Electronics Co.Ltd
> + * Author: Praveen Paneri <p.paneri@samsung.com>
> + * based on arch/arm/mach-exynos4/setup-usb-phy.c
> + * written by Joonyoung Shim <jy0922.shim@samsung.com>
> + *
> + * ?This program is free software; you can redistribute ?it and/or modify it
> + * ?under ?the terms of ?the GNU General ?Public License as published by the
> + * ?Free Software Foundation; ?either version 2 of the ?License, or (at your
> + * ?option) any later version.
> + *
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/platform_device.h>
> +#include <mach/regs-clock.h>
> +#include <mach/gpio.h>
> +#include <plat/regs-usb-hsotg-phy.h>
> +#include <plat/usb-phy.h>
> +
> +struct clk *otg_clk;
> +static int s5p64x0_otg_phy_init(struct platform_device *pdev)
> +{
> + ? ? ? int err;
> +
> + ? ? ? otg_clk = clk_get(&pdev->dev, "otg");
> + ? ? ? if (IS_ERR(otg_clk)) {
> + ? ? ? ? ? ? ? dev_err(&pdev->dev, "Failed to get otg clock\n");
> + ? ? ? ? ? ? ? return PTR_ERR(otg_clk);
> + ? ? ? }
> +
> + ? ? ? err = clk_enable(otg_clk);
> + ? ? ? if (err) {
> + ? ? ? ? ? ? ? clk_put(otg_clk);
> + ? ? ? ? ? ? ? return err;
> + ? ? ? }
> +
> + ? ? ? if (gpio_is_valid(S5P6440_GPN(1))) {
> + ? ? ? ? ? ? ? err = gpio_request(S5P6440_GPN(1), "GPN");
> + ? ? ? ? ? ? ? if (err)
> + ? ? ? ? ? ? ? ? ? ? ? printk(KERN_ERR "failed to request GPN1\n");
> + ? ? ? ? ? ? ? gpio_direction_output(S5P6440_GPN(1), 1);
> + ? ? ? }

What's the GPN(1)? I think it's board specific pins. so please replace
it at board file.
> +
> + ? ? ? writel(readl(S5P64X0_OTHERS)&~S5P64X0_OTHERS_USB_SIG_MASK,
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? S5P64X0_OTHERS);
> + ? ? ? writel(0x0, S3C_PHYPWR); ? ? ? ? /* Power up */
> + ? ? ? writel(S3C_PHYCLK_CLKSEL_12M, S3C_PHYCLK);
> + ? ? ? writel(S3C_RSTCON_PHY, S3C_RSTCON);
> +
> + ? ? ? udelay(50);
> + ? ? ? writel(0x0, S3C_RSTCON);
> + ? ? ? udelay(50);
> +
> + ? ? ? return 0;
> +}
> +
> +static int s5p64x0_otg_phy_exit(struct platform_device *pdev)
> +{
> + ? ? ? writel(readl(S3C_PHYPWR)|(0x1F<<1), S3C_PHYPWR);
> + ? ? ? writel(readl(S5P64X0_OTHERS)&~S5P64X0_OTHERS_USB_SIG_MASK,
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? S5P64X0_OTHERS);
> +
> + ? ? ? gpio_free(S5P6440_GPN(1));
ditto
> +
> + ? ? ? clk_disable(otg_clk);
> + ? ? ? clk_put(otg_clk);
> +
> + ? ? ? return 0;
> +}
> +
> +int s5p_usb_phy_init(struct platform_device *pdev, int type)
> +{
> + ? ? ? if (type == S5P_USB_PHY_DEVICE)
> + ? ? ? ? ? ? ? return s5p64x0_otg_phy_init(pdev);
> +
> + ? ? ? return -EINVAL;
> +}
> +
> +int s5p_usb_phy_exit(struct platform_device *pdev, int type)
> +{
> + ? ? ? if (type == S5P_USB_PHY_DEVICE)
> + ? ? ? ? ? ? ? return s5p64x0_otg_phy_exit(pdev);
> +
> + ? ? ? return -EINVAL;
> +}
> diff --git a/arch/arm/plat-s5p/include/plat/otg.h b/arch/arm/plat-s5p/include/plat/otg.h
> new file mode 100644
> index 0000000..3111dcc
> --- /dev/null
> +++ b/arch/arm/plat-s5p/include/plat/otg.h
> @@ -0,0 +1,29 @@
> +/*
> + * Copyright (C) 2011 Samsung Electronics Co.Ltd
> + * Author: Praveen Paneri <p.paneri@samsung.com>
> + * based on arch/arm/plat-s5p/include/plat/usb-phy.h
> + * written by Joonyoung Shim <jy0922.shim@samsung.com>
> + *
> + * This program is free software; you can redistribute ?it and/or modify it
> + * under ?the terms of ?the GNU General ?Public License as published by the
> + * Free Software Foundation; ?either version 2 of the ?License, or (at your
> + * option) any later version.
> + */
> +
> +#ifndef __PLAT_S5P_OTG_H
> +#define __PLAT_S5P_OTG_H
> +
> +struct s5p_otg_platdata {
> + ? ? ? int (*phy_init)(struct platform_device *pdev, int type);
> + ? ? ? int (*phy_exit)(struct platform_device *pdev, int type);
> + ? ? ? u32 dev_rx_fifo_size;
> + ? ? ? u32 dev_nptx_fifo_size;
> + ? ? ? u32 host_rx_fifo_size;
> + ? ? ? u32 host_nptx_fifo_size;
> + ? ? ? u32 host_ch_num;
> +
> +};
> +
> +extern void s5p_otg_set_platdata(struct s5p_otg_platdata *pd);
> +
> +#endif /* __PLAT_S5P_OTG_H */
> --
> 1.7.0.4
>
> --
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