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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=hx4Xj0vKM3i9b8JRtUJiv/sbaqsj2HeLHhMvN2rvbzQ=; b=iSLBNR77P2mw5dBjTJ4MX8r2KrzmomicXKKHzU3xRwo3+f2wYMfSpy7JqLvEBVAODm nnEDfn8tke2s97Pzq3lksXhkzKhb8cYmkScNeV+q8/P+Sn/jbHbpjqV7Yc9Mzjlb+RZr GAmRlngS5Le6HvuQpH+0QQbAzSNss4rl7Qc6S2ZyEGWlGckWygszA7hPV7d/TxSOrJA8 nhpubeSqD7P7AfPygP1QsGL9YRKZi9qIgK3DiygqOrDCLC6EQP0dovNU1XuEP4/Sbfwp TN93IfSCXaqx0TxePoyF6o5wMje0kNSdMSlgjcXXIcbp1C3q6O8nEQICYPKitCdxIk/3 nDMg== X-Gm-Message-State: AJIora+Kiuxms6LDeozSrDP2jgmDWBJc2p1FeGQJzwiASErzqK9TC8uC sH6i0Mf6R7VpuWZhvKNXclF/SP+yENayNpXZ7pEc6g== X-Google-Smtp-Source: AGRyM1t2GYOvYiSczm91nCPcsRJRH4FqjR9E7NVKZ+m4L5fqZwnWxrxafS/w6hG5adH2Z02J62sZu85S85XMttB+tZA= X-Received: by 2002:a17:906:2086:b0:717:4e91:f1db with SMTP id 6-20020a170906208600b007174e91f1dbmr18061273ejq.345.1657542766827; Mon, 11 Jul 2022 05:32:46 -0700 (PDT) MIME-Version: 1.0 References: <20220125171129.472775-1-aford173@gmail.com> <20220125171129.472775-8-aford173@gmail.com> <4b958892ba788a0e9e73a9135c305aacbe33294d.camel@pengutronix.de> <17c5ef22479cfea3f43dce1885f6613f1bef8064.camel@pengutronix.de> <2f25ea965289f6fdcd5fc0f12f445b174637ce74.camel@puri.sm> In-Reply-To: <2f25ea965289f6fdcd5fc0f12f445b174637ce74.camel@puri.sm> From: Ezequiel Garcia Date: Mon, 11 Jul 2022 09:32:35 -0300 Message-ID: Subject: Re: [PATCH V4 07/11] arm64: dts: imx8mq: Enable both G1 and G2 VPU's with vpu-blk-ctrl To: Martin Kepplinger Cc: Lucas Stach , Adam Ford , linux-media , Adam Ford-BE , Chris Healy , kernel test robot , Philipp Zabel , Mauro Carvalho Chehab , Rob Herring , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Greg Kroah-Hartman , "open list:ARM/Rockchip SoC..." , devicetree , linux-arm-kernel , Linux Kernel Mailing List , "open list:STAGING SUBSYSTEM" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220711_053252_173409_3AF46EB0 X-CRM114-Status: GOOD ( 41.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Martin, On Mon, Jul 11, 2022 at 6:53 AM Martin Kepplinger wrote: > > Am Dienstag, dem 26.04.2022 um 12:43 +0200 schrieb Lucas Stach: > > Am Dienstag, dem 26.04.2022 um 09:38 +0200 schrieb Martin Kepplinger: > > > Am Montag, dem 25.04.2022 um 17:34 +0200 schrieb Lucas Stach: > > > > Hi Martin, > > > > > > > > Am Montag, dem 25.04.2022 um 17:22 +0200 schrieb Martin > > > > Kepplinger: > > > > > Am Dienstag, dem 25.01.2022 um 11:11 -0600 schrieb Adam Ford: > > > > > > With the Hantro G1 and G2 now setup to run independently, > > > > > > update > > > > > > the device tree to allow both to operate. This requires the > > > > > > vpu-blk-ctrl node to be configured. Since vpu-blk-ctrl needs > > > > > > certain clock enabled to handle the gating of the G1 and G2 > > > > > > fuses, the clock-parents and clock-rates for the various > > > > > > VPU's > > > > > > to be moved into the pgc_vpu because they cannot get re- > > > > > > parented > > > > > > once enabled, and the pgc_vpu is the highest in the chain. > > > > > > > > > > > > Signed-off-by: Adam Ford > > > > > > Reported-by: kernel test robot > > > > > > Reviewed-by: Ezequiel Garcia > > > > > > > > > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi > > > > > > b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > > > > > > index 2df2510d0118..549b2440f55d 100644 > > > > > > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi > > > > > > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > > > > > > @@ -737,7 +737,21 @@ pgc_gpu: power-domain@5 { > > > > > > pgc_vpu: power- > > > > > > domain@6 { > > > > > > #power- > > > > > > domain- > > > > > > cells = > > > > > > <0>; > > > > > > reg = > > > > > > ; > > > > > > - clocks = > > > > > > <&clk > > > > > > IMX8MQ_CLK_VPU_DEC_ROOT>; > > > > > > + clocks = > > > > > > <&clk > > > > > > IMX8MQ_CLK_VPU_DEC_ROOT>, > > > > > > + > > > > > > <&clk > > > > > > IMX8MQ_CLK_VPU_G1_ROOT>, > > > > > > + > > > > > > <&clk > > > > > > IMX8MQ_CLK_VPU_G2_ROOT>; > > > > > > + assigned- > > > > > > clocks = > > > > > > <&clk IMX8MQ_CLK_VPU_G1>, > > > > > > + > > > > > > > > > > > > <&clk IMX8MQ_CLK_VPU_G2>, > > > > > > + > > > > > > > > > > > > <&clk IMX8MQ_CLK_VPU_BUS>, > > > > > > + > > > > > > > > > > > > <&clk IMX8MQ_VPU_PLL_BYPASS>; > > > > > > + assigned- > > > > > > clock- > > > > > > parents = <&clk IMX8MQ_VPU_PLL_OUT>, > > > > > > + > > > > > > > > > > > > > > > > > > <&clk IMX8MQ_VPU_PLL_OUT>, > > > > > > + > > > > > > > > > > > > > > > > > > <&clk IMX8MQ_SYS1_PLL_800M>, > > > > > > + > > > > > > > > > > > > > > > > > > <&clk IMX8MQ_VPU_PLL>; > > > > > > + assigned- > > > > > > clock- > > > > > > rates > > > > > > = <600000000>, > > > > > > + > > > > > > > > > > > > > > > > > > <600000000>, > > > > > > + > > > > > > > > > > > > > > > > > > <800000000>, > > > > > > + > > > > > > > > > > > > > > > > > > <0>; > > > > > > }; > > > > > > > > > > > > pgc_disp: > > > > > > power-domain@7 > > > > > > { > > > > > > @@ -1457,30 +1471,31 @@ usb3_phy1: usb-phy@382f0040 { > > > > > > status = "disabled"; > > > > > > }; > > > > > > > > > > > > - vpu: video-codec@38300000 { > > > > > > - compatible = "nxp,imx8mq-vpu"; > > > > > > - reg = <0x38300000 0x10000>, > > > > > > - <0x38310000 0x10000>, > > > > > > - <0x38320000 0x10000>; > > > > > > - reg-names = "g1", "g2", "ctrl"; > > > > > > - interrupts = > > > > > IRQ_TYPE_LEVEL_HIGH>, > > > > > > - > > > > > IRQ_TYPE_LEVEL_HIGH>; > > > > > > - interrupt-names = "g1", "g2"; > > > > > > + vpu_g1: video-codec@38300000 { > > > > > > + compatible = "nxp,imx8mq-vpu-g1"; > > > > > > + reg = <0x38300000 0x10000>; > > > > > > + interrupts = > > > > > IRQ_TYPE_LEVEL_HIGH>; > > > > > > + clocks = <&clk > > > > > > IMX8MQ_CLK_VPU_G1_ROOT>; > > > > > > + power-domains = <&vpu_blk_ctrl > > > > > > IMX8MQ_VPUBLK_PD_G1>; > > > > > > + }; > > > > > > + > > > > > > + vpu_g2: video-codec@38310000 { > > > > > > + compatible = "nxp,imx8mq-vpu-g2"; > > > > > > + reg = <0x38310000 0x10000>; > > > > > > + interrupts = > > > > > IRQ_TYPE_LEVEL_HIGH>; > > > > > > + clocks = <&clk > > > > > > IMX8MQ_CLK_VPU_G2_ROOT>; > > > > > > + power-domains = <&vpu_blk_ctrl > > > > > > IMX8MQ_VPUBLK_PD_G2>; > > > > > > + }; > > > > > > + > > > > > > + vpu_blk_ctrl: blk-ctrl@38320000 { > > > > > > + compatible = "fsl,imx8mq-vpu-blk- > > > > > > ctrl"; > > > > > > + reg = <0x38320000 0x100>; > > > > > > + power-domains = <&pgc_vpu>, > > > > > > <&pgc_vpu>, > > > > > > <&pgc_vpu>; > > > > > > + power-domain-names = "bus", "g1", > > > > > > "g2"; > > > > > > clocks = <&clk > > > > > > IMX8MQ_CLK_VPU_G1_ROOT>, > > > > > > - <&clk > > > > > > IMX8MQ_CLK_VPU_G2_ROOT>, > > > > > > - <&clk > > > > > > IMX8MQ_CLK_VPU_DEC_ROOT>; > > > > > > - clock-names = "g1", "g2", "bus"; > > > > > > - assigned-clocks = <&clk > > > > > > IMX8MQ_CLK_VPU_G1>, > > > > > > - <&clk > > > > > > IMX8MQ_CLK_VPU_G2>, > > > > > > - <&clk > > > > > > IMX8MQ_CLK_VPU_BUS>, > > > > > > - <&clk > > > > > > IMX8MQ_VPU_PLL_BYPASS>; > > > > > > - assigned-clock-parents = <&clk > > > > > > IMX8MQ_VPU_PLL_OUT>, > > > > > > - <&clk > > > > > > IMX8MQ_VPU_PLL_OUT>, > > > > > > - <&clk > > > > > > IMX8MQ_SYS1_PLL_800M>, > > > > > > - <&clk > > > > > > IMX8MQ_VPU_PLL>; > > > > > > - assigned-clock-rates = <600000000>, > > > > > > <600000000>, > > > > > > - <800000000>, > > > > > > <0>; > > > > > > - power-domains = <&pgc_vpu>; > > > > > > + <&clk > > > > > > IMX8MQ_CLK_VPU_G2_ROOT>; > > > > > > + clock-names = "g1", "g2"; > > > > > > + #power-domain-cells = <1>; > > > > > > }; > > > > > > > > > > > > pcie0: pcie@33800000 { > > > > > > > > > > With this update, when testing suspend to ram on imx8mq, I get: > > > > > > > > > > buck4: failed to disable: -ETIMEDOUT > > > > > > > > > > where buck4 is power-supply of pgc_vpu. And thus the transition > > > > > to > > > > > suspend (and resuming) fails. > > > > > > > > > > Have you tested system suspend after the imx8m-blk-ctrl update > > > > > on > > > > > imx8mq? > > > > > > > > I haven't tested system suspend, don't know if anyone else did. > > > > However > > > > I guess that this is just uncovering a preexisting issue in the > > > > system > > > > suspend sequencing, which you would also hit if the video > > > > decoders > > > > were > > > > active at system suspend time. > > > > > > > > My guess is that the regulator disable fails, due to the power > > > > domains > > > > being disabled quite late in the suspend sequence, where i2c > > > > communication with the PMIC is no longer possible due to i2c > > > > being > > > > suspended already or something like that. Maybe you can dig in a > > > > bit > > > > on > > > > the actual sequence on your system and we can see how we can > > > > rework > > > > things to suspend the power domains at a time where communication > > > > with > > > > the PMIC is still possible? > > > > > > What exactly would you like to see? Here's all gpcv2 regulators > > > disabling on suspend. (gpu (domain 5) is disabled by runtime pm > > > often): > > > > > > [ 47.138700] imx-pgc imx-pgc-domain.5: disabling regulator > > > [ 47.298071] Freezing user space processes ... (elapsed 0.008 > > > seconds) done. > > > [ 47.313432] OOM killer disabled. > > > [ 47.316670] Freezing remaining freezable tasks ... (elapsed > > > 2.221 > > > seconds) done. > > > [ 49.672052] imx8m-blk-ctrl 38320000.blk-ctrl: > > > imx8m_blk_ctrl_suspend > > > start > > > [ 49.704417] imx-pgc imx-pgc-domain.0: disabling regulator > > > [ 49.711114] imx-pgc imx-pgc-domain.6: disabling regulator > > > [ 49.819064] buck4: failed to disable: -ETIMEDOUT > > > > > > The stack looks pretty much the same for all of them, from > > > pm_suspend() > > > over genpd_suspend_noiry(). > > > > So the GPU domain is already suspended before the system suspend, > > probably due to short runtime PM timeouts. > > > > Can you please check at which point the i2c subsystem is suspended? I > > think we are already past that point when running the PM domain > > suspend > > from a _noirq callback. I'll take a look on how we can properly > > change > > this ordering. > > > > Regards, > > Lucas > > > > hi Lucas, sorry for not following up on this for so long. This fixes > suspend/resume for me: > > https://lore.kernel.org/linux-arm-kernel/20220711094549.3445566-1-martin.kepplinger@puri.sm/T/#t > > thank you for you help so far, > Thanks a lot for keeping us posted. The fix for suspend/resume looks great! Ezequiel _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel