From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D097AC4332F for ; Wed, 16 Nov 2022 07:17:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=EKuPc6WVXHnWlBiMF7MzN0zKjtPHup5ECc8nPy1KR3A=; b=WyfNjC0bYwKM8C NhpeLqxnga5QEeT+pWRFOYHkq3rzulaoNyFHmg5+PvrDcQ8YWDKlRhJGpuS/8VtxeRDeQLAs+ntpQ iKIF0vcstsFhFzUB2OPJaozmtuhTnDIBqwYV3n1Ykotal/97pTczXzzkzNecq0NXe1EPqa6dcKVwl izJxgOMTq6cE3V0VgP4ceBIX9I7x0KISGwXj/GpJQtbKV5ic/mvdMrCC46aIoARsjBY84QomYeKuz UyFefTvP/1RnDEhe2eTEcXPk9bXu3koLBRfo+81RNI8Kt6cU1GIIYKnd7DH+WobqWRwDieyrXfxFn F3dviThELsWkBMKUD/3Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ovCe5-000Vvg-PW; Wed, 16 Nov 2022 07:15:41 +0000 Received: from mail-pg1-x532.google.com ([2607:f8b0:4864:20::532]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1ovCe2-000Vsv-A6 for linux-arm-kernel@lists.infradead.org; Wed, 16 Nov 2022 07:15:39 +0000 Received: by mail-pg1-x532.google.com with SMTP id h193so15844687pgc.10 for ; Tue, 15 Nov 2022 23:15:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=jyttA9l5U2zfeLkz1BoPbTHDObwZ9U09dDfAmOF59co=; b=WFqq62z11REleJUcpbpVLlAz/I8zQKWQ+yMcq6YOPBsK8EeIRNA9fM/ZUz9I4p3IJ0 C8q7ZZ6YcPejwgXCZeHT8NOcQqHHgth+qZN/42XgLiPLF9g6r2oyYVmdK/pmXqIV5zp5 oO3TzCZ9K133Y3I1ptdzoqSH85jKM5JxoUXfufR57VP8Qg4tBegBGCSZ0cFl5DuUdy+u ii9NfgQVVV/orMxW0MIbmHtairHx9xnJtkFym2hXGxqC4xLPF4tSaZteayNFLdfPsceJ e6494BhU3c7sbxuPksbIPSv7e3/nHRbIWk+JhlG+s1twJBWOAvlDtRFsD3VS32+WuS08 k0ew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=jyttA9l5U2zfeLkz1BoPbTHDObwZ9U09dDfAmOF59co=; b=kukz3mMF/TfMCuggeZqpOlM7QYwbnvhGIjtF0ftLnueERs0ZImE0zil92n4G07PPSw +N4GC7oKkyimV1cK5MoUek3SEw+a+PGZ4nPNzJ6j3KQVHbzt8XZtlS9qsQn3Htt5v9hs C/Vql1IkmRuJ6q+kwFnOMymkPfkG47Xd6Y4I5KRRbJ7RCP34zaKuIVkfbPO7IcqWX/xz OcMlJKZ/cqRNixLY9QChh/mMcMGNfzX4n8BX6ZTuro4q9iFeEZyXZuC/MXzk6+ElMcCB BzVp3gVWpkLuE+5PAfWS1DxCykAgdXJBdolcQFY+pHhl5cyotNAW3J0Cpf48e90gBOWz VrGw== X-Gm-Message-State: ANoB5pm06bG+Yv4yf+kUZx9idYsggLq+8ZOEktxQl7yuu/Ax+t/QVdMO 7VHwcEIaPUn4SPIOcYYNT6Bvc36TeN3MFFCg99HDUA== X-Google-Smtp-Source: AA0mqf4qVAOrSxpdJT6zZt/NoVVD9G5rp2nauOK2/L5V//qjk/naZGSqn65Gl+5u9CTiAvh6VcZAIATmMtW/6CkBhjU= X-Received: by 2002:a63:4a21:0:b0:46f:d9f:476 with SMTP id x33-20020a634a21000000b0046f0d9f0476mr18938299pga.468.1668582932759; Tue, 15 Nov 2022 23:15:32 -0800 (PST) MIME-Version: 1.0 References: <20221113163832.3154370-1-maz@kernel.org> <20221113163832.3154370-3-maz@kernel.org> In-Reply-To: <20221113163832.3154370-3-maz@kernel.org> From: Reiji Watanabe Date: Tue, 15 Nov 2022 23:15:16 -0800 Message-ID: Subject: Re: [PATCH v4 02/16] KVM: arm64: PMU: Align chained counter implementation with architecture pseudocode To: Marc Zyngier Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvmarm@lists.linux.dev, kvm@vger.kernel.org, James Morse , Suzuki K Poulose , Alexandru Elisei , Oliver Upton , Ricardo Koller X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221115_231538_393389_44315B54 X-CRM114-Status: GOOD ( 16.35 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sun, Nov 13, 2022 at 8:38 AM Marc Zyngier wrote: > > Ricardo recently pointed out that the PMU chained counter emulation > in KVM wasn't quite behaving like the one on actual hardware, in > the sense that a chained counter would expose an overflow on > both halves of a chained counter, while KVM would only expose the > overflow on the top half. > > The difference is subtle, but significant. What does the architecture > say (DDI0087 H.a): > > - Up to PMUv3p4, all counters but the cycle counter are 32bit > > - A 32bit counter that overflows generates a CHAIN event on the > adjacent counter after exposing its own overflow status > > - The CHAIN event is accounted if the counter is correctly > configured (CHAIN event selected and counter enabled) > > This all means that our current implementation (which uses 64bit > perf events) prevents us from emulating this overflow on the lower half. > > How to fix this? By implementing the above, to the letter. > > This largly results in code deletion, removing the notions of nit: s/largly/largely ? > "counter pair", "chained counters", and "canonical counter". > The code is further restructured to make the CHAIN handling similar > to SWINC, as the two are now extremely similar in behaviour. > > Reported-by: Ricardo Koller > Signed-off-by: Marc Zyngier Reviewed-by: Reiji Watanabe _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel