From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 73AC8C433EF for ; Thu, 5 May 2022 16:25:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Zj8XPNVvFJflG3H51c/LK/H0HfKl6tFGPUChBwMC9W4=; b=401XsX3C7SLAAn JZro4P46MfmrRVXNG2ndysixBIbac8TzyeeyTkAFKy4LybAJJ2wO+Wb7eqChgnfbsd2Bm4gVmX+Oq H6iang+M1HZn749qX3szhYx/bEnPE1a7xKSctSWlkvIOwuCERC5tsvfkUmOllNWRxL1qSAe36yVuE 7MkwsnemGI0s5SW5ECSeQYhkn/MF7FYy1sLgcsZWA30PLra1obQ+LFF+JYNcuRJGYgCGe+vNFMfNo 5kO76dDAefU7sjeqF/6Yx4rdw39jG5PcBxsFIp6khdgi+Pu+NrGB/GLHGxtniOcVicNe9x0UWry8S gfZgIkuIB9kOr7AbYSrg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmeGu-00GqKf-Jd; Thu, 05 May 2022 16:24:08 +0000 Received: from mail-yw1-x112b.google.com ([2607:f8b0:4864:20::112b]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmeGr-00GqJh-8N for linux-arm-kernel@lists.infradead.org; Thu, 05 May 2022 16:24:06 +0000 Received: by mail-yw1-x112b.google.com with SMTP id 00721157ae682-2f7d7e3b5bfso54352527b3.5 for ; Thu, 05 May 2022 09:24:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=smRiEfnbDo26TwlBRyyocGS+bQqlFH9vecfF+kAEs0s=; b=Qchh5LkpHNgVC4oS9Z3uWgrF0tIOlBwLOSM/ue3hd7CJxr3Xz29EiGWTzgXTX2LwGK 4uq7mH3isrmT1EXJizLeJvJFDf9LhlUWCoaapbPnape0t+PH8AJj+InrnhX20me7M3HY 0B22flgiAh5eU+2rzqiChpz1dG3nkkfcoA5K4izNjU7LnZI5qiNJ1bES9xbfWS0aiMLn FMtUx1jWRGAWdwCFESrmwS5Fc8W+htfQnqj9NZBWJhEW4YYXh4B6Plfp1rs4wwS80kCy 61wjIvrcCLt+vJmaIMIapWofk3R5LsYlU1VYyQHWZBjyEYCrwX1AeAxL3OazAT1j/diq aQ8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=smRiEfnbDo26TwlBRyyocGS+bQqlFH9vecfF+kAEs0s=; b=hatpZ4BF9ZNMAx+LxEA+BTRrbmLHJH4md+fPsdvNiqN6eiCbi+Qud98NhtJlLJh0Wr RywFoXHK76zHSgFH+EAzutGcMM2HmicLx7Qy0BUitCnG2gGD3FNJITQnVw2kbO1wGLlD MkxefVpYNrWWKrhCkfTnxdabzO5WzfVcr88SGrdEpWwLECfhLQFAY3u0H3FvXJvgAyg0 sMVJcE9g8RpDokzDlXeKOmMRdABjIb5dXxZXg0RtXqh7TP0I6A5PSqYBAJUwujLFput5 0U/j+DWacmrF1KL1rVUMKJZIP/fcX4X5+COhA7oKdsjNEYitGP3uv7/KTwLYFWThWIoA JW2A== X-Gm-Message-State: AOAM5305UrJsLsYJSGWtzQlQMeT+BQHZcfhBhzqFPWssQMa4+IoTDBk1 LJPDGDQeVtusUCAM3yTVKg71no4v7swISe+/bCHH+w== X-Google-Smtp-Source: ABdhPJwBW6nLJQllaWjle33ZcjdAaJs8arGj4v4LRwbmOZTByqaTFnO79d1yMOwsSb1JbpmCL3d16OL6yDeASvHtlUs= X-Received: by 2002:a81:a93:0:b0:2f4:d65a:d44e with SMTP id 141-20020a810a93000000b002f4d65ad44emr23725228ywk.243.1651767843390; Thu, 05 May 2022 09:24:03 -0700 (PDT) MIME-Version: 1.0 References: <20220429203644.2868448-1-samitolvanen@google.com> <20220429203644.2868448-10-samitolvanen@google.com> In-Reply-To: From: Sami Tolvanen Date: Thu, 5 May 2022 09:23:27 -0700 Message-ID: Subject: Re: [RFC PATCH 09/21] arm64: Add CFI error handling To: Mark Rutland Cc: LKML , Kees Cook , Josh Poimboeuf , Peter Zijlstra , X86 ML , Catalin Marinas , Will Deacon , Nathan Chancellor , Nick Desaulniers , Joao Moreira , Sedat Dilek , Steven Rostedt , linux-hardening@vger.kernel.org, linux-arm-kernel , llvm@lists.linux.dev X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220505_092405_355765_64C72CF7 X-CRM114-Status: GOOD ( 21.96 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, May 5, 2022 at 8:45 AM Mark Rutland wrote: > It would be a bit nicer if we could encode the register index into the BRK > immediate, i.e. allocate a range of 32 immediates (or 31 given BLR XZR is > nonsensical), and have: > > BRK #CFI_BRK_IMM + n > > ... where `n` is the Xn index. > > That way the kernel doesn't need to know the specific code sequence and > wouldn't have to decode the instruction to find the relevant register -- we > could determine that from the ESR alone. That would also avoid tying the > compiler into a specific code sequence, and would allow that to change. > > Since the BRK immediate is 16 bits, we have enough space to also encode the > index of the wB register, which would allow the kernel's BRK handler to recover > and log the expected type value and the the value at the target of the branch > (that latter we can recover from xN, so we don't need wA to be encoded into the > immediate). Sure, sounds like a good idea. > ... does the compiler side of that sound possible? Yes, this should be doable. I'll take a look and change this in the next version. Sami _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel