From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1A7AECD6E55 for ; Wed, 11 Oct 2023 09:27:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=WrqTLJLN27wytFPobSdCX+IfoErFADySdyDhH9z/aC0=; b=oY2tVZ/zDc1haw EpSfUFWDrtEEAb3p4HWe9cWnHlmX5aLRcsBhDhX8bNX1/WMvdn1AW2e87wjdk+D/QCrOPkgJHb8b4 DLVxrb159x5WQOeMFub2cSHaV7/V/TD85/k1250IYiccbuM51gbnQbjQv+n3uwJdY9LjzHgAhjeby zr3uFO0VmEeROXZ+w2LkIjUv0n1epN5dhvQelD5MaFIQVNaNPVM5l35VAX0zfH7WX1CR59558kRbP FxXhhOgCvhK1w6lp6xC07ewNehoxMMAquheyazCaDcutFX1PzckdJVSdjv3fRuANbedsoGZJ9dama hlJqokcVAp5vrETFIXsg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qqVUO-00FKVR-2r; Wed, 11 Oct 2023 09:26:48 +0000 Received: from mail-ej1-x634.google.com ([2a00:1450:4864:20::634]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qqVUM-00FKUv-0g for linux-arm-kernel@lists.infradead.org; Wed, 11 Oct 2023 09:26:47 +0000 Received: by mail-ej1-x634.google.com with SMTP id a640c23a62f3a-9ba081173a3so748373766b.1 for ; Wed, 11 Oct 2023 02:26:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jms.id.au; s=google; t=1697016404; x=1697621204; darn=lists.infradead.org; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=+gXxCxi6vp030i+agdceTeSycONQUjyDJd68wM+eSmw=; b=NfSwaH66pJk0om2wtMb/H5DtuyEej3S42IVPR8V8T5V33t+MYIJMTNkM4Dg9O/nPwu SXNcU1iFpg+8G7/qHtg3l5r48JaPS2I7YSOd0b9AgwdC3kq9NUrR+9e0mvdqag10fBEO 45bijeP5kDRKA84WUdguhbey+S/pYTg5UmDuA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697016404; x=1697621204; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=+gXxCxi6vp030i+agdceTeSycONQUjyDJd68wM+eSmw=; b=nIummSCeYTW3yjNC8lU2rl1fSIbCw3zNxxKmfSxag7qC6ZBr+vZSZuZ4H3uezYwsVX w04kTUu5FrZidqD9m5NRZtcYayX94URMS7xOsbK1oN1yGYNolGTfinQffkPlq/UOCYri SDSYZFPfzaDZGJO5sXolVTZl8vFYOoqEqedpgsZ5Y0abt7J6F3XBcFwhx1Tc3l8QKKS0 kXyiwrP4sR2xnncglGkXYx9vRoRhoNREHfk+Adf/RRD1XhtlWYpAJV0uocJuMJCCgN6w /NEDC3+izwog0fPNalmBTgKN9aJfb50U8wlCytGZCwE9Snp1wYkKQD5nx6uZQBcHkmD/ yOvA== X-Gm-Message-State: AOJu0YzO8Nn2R0g4iP/FPPyb39quH9mhYnmSuwrKFyJQRs/FepOiRhCz Vk98CPcnqn8lOPVImp4ePEDgShO4eHQ9Pnp0GOs= X-Google-Smtp-Source: AGHT+IHApwH+q9IPC29LKXoGHb2xdanm+kml7BeaRr/3PjuQ3NKQJoVq6Zhgzq28/yAtLmjZHjvfQbxoOnsjY+1Rl5M= X-Received: by 2002:a17:907:7817:b0:9ad:e17c:464e with SMTP id la23-20020a170907781700b009ade17c464emr17132987ejc.68.1697016403957; Wed, 11 Oct 2023 02:26:43 -0700 (PDT) MIME-Version: 1.0 References: <20230922104231.1434-4-zev@bewilderbeest.net> <20230922104231.1434-6-zev@bewilderbeest.net> In-Reply-To: <20230922104231.1434-6-zev@bewilderbeest.net> From: Joel Stanley Date: Wed, 11 Oct 2023 19:56:32 +1030 Message-ID: Subject: Re: [PATCH 2/2] watchdog: aspeed: Add support for aspeed,reset-mask DT property To: Zev Weiss Cc: Andrew Jeffery , Guenter Roeck , "Milton D. Miller II" , Wim Van Sebroeck , linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org, openbmc@lists.ozlabs.org, Eddie James , Ivan Mikhaylov , =?UTF-8?Q?Thomas_Wei=C3=9Fschuh?= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231011_022646_244954_C48E87A6 X-CRM114-Status: GOOD ( 20.36 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, 22 Sept 2023 at 20:12, Zev Weiss wrote: > > This property allows the device-tree to specify how the Aspeed > watchdog timer's reset mask register(s) should be set, so that > peripherals can be individually exempted from (or opted in to) being > reset when the watchdog timer expires. > > Signed-off-by: Zev Weiss Reviewed-by: Joel Stanley A note below. > --- > drivers/watchdog/aspeed_wdt.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/watchdog/aspeed_wdt.c b/drivers/watchdog/aspeed_wdt.c > index b72a858bbac7..b4773a6aaf8c 100644 > --- a/drivers/watchdog/aspeed_wdt.c > +++ b/drivers/watchdog/aspeed_wdt.c > @@ -79,6 +79,8 @@ MODULE_DEVICE_TABLE(of, aspeed_wdt_of_table); > #define WDT_TIMEOUT_STATUS_BOOT_SECONDARY BIT(1) > #define WDT_CLEAR_TIMEOUT_STATUS 0x14 > #define WDT_CLEAR_TIMEOUT_AND_BOOT_CODE_SELECTION BIT(0) > +#define WDT_RESET_MASK1 0x1c > +#define WDT_RESET_MASK2 0x20 > > /* > * WDT_RESET_WIDTH controls the characteristics of the external pulse (if > @@ -402,6 +404,8 @@ static int aspeed_wdt_probe(struct platform_device *pdev) > > if ((of_device_is_compatible(np, "aspeed,ast2500-wdt")) || > (of_device_is_compatible(np, "aspeed,ast2600-wdt"))) { > + u32 reset_mask[2]; > + size_t nrstmask = of_device_is_compatible(np, "aspeed,ast2600-wdt") ? 2 : 1; > u32 reg = readl(wdt->base + WDT_RESET_WIDTH); > > reg &= wdt->cfg->ext_pulse_width_mask; > @@ -419,6 +423,13 @@ static int aspeed_wdt_probe(struct platform_device *pdev) > reg |= WDT_OPEN_DRAIN_MAGIC; > > writel(reg, wdt->base + WDT_RESET_WIDTH); > + > + ret = of_property_read_u32_array(np, "aspeed,reset-mask", reset_mask, nrstmask); > + if (!ret) { > + writel(reset_mask[0], wdt->base + WDT_RESET_MASK1); > + if (nrstmask > 1) > + writel(reset_mask[1], wdt->base + WDT_RESET_MASK2); > + } This will do funky things if someone is careless enough to put the property in an ast2400 device tree. The ast2700 has four reset mask registers. Not really your problem at this point, but we might need to move to a per-soc callback in the platform data or similar. > } > > if (!of_property_read_u32(np, "aspeed,ext-pulse-duration", &duration)) { > -- > 2.40.0.5.gf6e3b97ba6d2.dirty > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel