* preferable method for pinctrl driver
@ 2014-10-10 8:42 Oleksij Rempel
2014-10-13 9:05 ` Linus Walleij
0 siblings, 1 reply; 7+ messages in thread
From: Oleksij Rempel @ 2014-10-10 8:42 UTC (permalink / raw)
To: linux-arm-kernel
Hello all,
based on previous experience with clk driver, i know that own research
can be not enough. Before starting to writ pinctrl driver, i would like
to ask your suggestions.
Looks like there is at least two pinctrl driver types:
- imx23 which makes function description insight of DT;
- tegra with function descrption in the source code.
which way is preferable?
Other question, i didn't found exact same HW, do it make sense to merge
this driver with existing one? Are there some similarities with this one?:
http://pastebin.com/hW82Xupq
--
Regards,
Oleksij
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^ permalink raw reply [flat|nested] 7+ messages in thread
* preferable method for pinctrl driver
2014-10-10 8:42 preferable method for pinctrl driver Oleksij Rempel
@ 2014-10-13 9:05 ` Linus Walleij
2014-11-07 8:35 ` Oleksij Rempel
0 siblings, 1 reply; 7+ messages in thread
From: Linus Walleij @ 2014-10-13 9:05 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Oct 10, 2014 at 10:42 AM, Oleksij Rempel <linux@rempel-privat.de> wrote:
> Looks like there is at least two pinctrl driver types:
> - imx23 which makes function description insight of DT;
> - tegra with function descrption in the source code.
> which way is preferable?
The Tegra way. The driver should know about all groups
and functions, the DT should just configure the functions to
groups relation.
The i.MX driver happened before the DT use for pin controllers
was thought through.
> Other question, i didn't found exact same HW, do it make sense to merge
> this driver with existing one? Are there some similarities with this one?:
> http://pastebin.com/hW82Xupq
No idea, that's very little HW information. However
silicon vendors often du their I/O cell layout themselves
so many pin controllers are very unique.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 7+ messages in thread
* preferable method for pinctrl driver
2014-10-13 9:05 ` Linus Walleij
@ 2014-11-07 8:35 ` Oleksij Rempel
2014-11-07 10:17 ` Oleksij Rempel
0 siblings, 1 reply; 7+ messages in thread
From: Oleksij Rempel @ 2014-11-07 8:35 UTC (permalink / raw)
To: linux-arm-kernel
Am 13.10.2014 um 11:05 schrieb Linus Walleij:
> On Fri, Oct 10, 2014 at 10:42 AM, Oleksij Rempel <linux@rempel-privat.de> wrote:
>
>> Looks like there is at least two pinctrl driver types:
>> - imx23 which makes function description insight of DT;
>> - tegra with function descrption in the source code.
>> which way is preferable?
>
> The Tegra way. The driver should know about all groups
> and functions, the DT should just configure the functions to
> groups relation.
>
> The i.MX driver happened before the DT use for pin controllers
> was thought through.
>
>> Other question, i didn't found exact same HW, do it make sense to merge
>> this driver with existing one? Are there some similarities with this one?:
>> http://pastebin.com/hW82Xupq
>
> No idea, that's very little HW information. However
> silicon vendors often du their I/O cell layout themselves
> so many pin controllers are very unique.
>
> Yours,
> Linus Walleij
Hi,
thank you for your previous response. One more question: how pins should
be numbered? Continuous or register offsets can be used?
Documentations for this soc use pin names encoded like this
#NAME_#BANK_#PIN. Register offset can be calculated by ((bank) * 32 +
(pin) * 4)
In this case i need to have extra array to convert pin number to offset,
or use offset as pin number.
--
Regards,
Oleksij
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^ permalink raw reply [flat|nested] 7+ messages in thread
* preferable method for pinctrl driver
2014-11-07 8:35 ` Oleksij Rempel
@ 2014-11-07 10:17 ` Oleksij Rempel
2014-11-14 10:01 ` Linus Walleij
0 siblings, 1 reply; 7+ messages in thread
From: Oleksij Rempel @ 2014-11-07 10:17 UTC (permalink / raw)
To: linux-arm-kernel
Am 07.11.2014 um 09:35 schrieb Oleksij Rempel:
> Am 13.10.2014 um 11:05 schrieb Linus Walleij:
>> On Fri, Oct 10, 2014 at 10:42 AM, Oleksij Rempel <linux@rempel-privat.de> wrote:
>>
>>> Looks like there is at least two pinctrl driver types:
>>> - imx23 which makes function description insight of DT;
>>> - tegra with function descrption in the source code.
>>> which way is preferable?
>>
>> The Tegra way. The driver should know about all groups
>> and functions, the DT should just configure the functions to
>> groups relation.
>>
>> The i.MX driver happened before the DT use for pin controllers
>> was thought through.
>>
>>> Other question, i didn't found exact same HW, do it make sense to merge
>>> this driver with existing one? Are there some similarities with this one?:
>>> http://pastebin.com/hW82Xupq
>>
>> No idea, that's very little HW information. However
>> silicon vendors often du their I/O cell layout themselves
>> so many pin controllers are very unique.
>>
>> Yours,
>> Linus Walleij
>
> Hi,
> thank you for your previous response. One more question: how pins should
> be numbered? Continuous or register offsets can be used?
> Documentations for this soc use pin names encoded like this
> #NAME_#BANK_#PIN. Register offset can be calculated by ((bank) * 32 +
> (pin) * 4)
> In this case i need to have extra array to convert pin number to offset,
> or use offset as pin number.
Never mind, i think i found the answer:
This enumeration was arbitrarily chosen, in practice you need to think
through your numbering system so that it matches the layout of registers
and such things in your driver, or the code may become complicated. You
must also consider matching of offsets to the GPIO ranges that may be
handled by the pin controller.
--
Regards,
Oleksij
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^ permalink raw reply [flat|nested] 7+ messages in thread
* preferable method for pinctrl driver
2014-11-07 10:17 ` Oleksij Rempel
@ 2014-11-14 10:01 ` Linus Walleij
2015-02-09 10:41 ` Oleksij Rempel
0 siblings, 1 reply; 7+ messages in thread
From: Linus Walleij @ 2014-11-14 10:01 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Nov 7, 2014 at 11:17 AM, Oleksij Rempel <linux@rempel-privat.de> wrote:
>> thank you for your previous response. One more question: how pins should
>> be numbered? Continuous or register offsets can be used?
>> Documentations for this soc use pin names encoded like this
>> #NAME_#BANK_#PIN. Register offset can be calculated by ((bank) * 32 +
>> (pin) * 4)
>> In this case i need to have extra array to convert pin number to offset,
>> or use offset as pin number.
>
> Never mind, i think i found the answer:
> This enumeration was arbitrarily chosen, in practice you need to think
> through your numbering system so that it matches the layout of registers
> and such things in your driver, or the code may become complicated. You
> must also consider matching of offsets to the GPIO ranges that may be
> handled by the pin controller.
Yeah you're right :)
There is some resoning in Documentation/pinctrl.txt but it needs some
intuition etc.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 7+ messages in thread
* preferable method for pinctrl driver
2014-11-14 10:01 ` Linus Walleij
@ 2015-02-09 10:41 ` Oleksij Rempel
2015-03-05 8:44 ` Linus Walleij
0 siblings, 1 reply; 7+ messages in thread
From: Oleksij Rempel @ 2015-02-09 10:41 UTC (permalink / raw)
To: linux-arm-kernel
Am 14.11.2014 um 11:01 schrieb Linus Walleij:
> On Fri, Nov 7, 2014 at 11:17 AM, Oleksij Rempel <linux@rempel-privat.de> wrote:
>
>>> thank you for your previous response. One more question: how pins should
>>> be numbered? Continuous or register offsets can be used?
>>> Documentations for this soc use pin names encoded like this
>>> #NAME_#BANK_#PIN. Register offset can be calculated by ((bank) * 32 +
>>> (pin) * 4)
>>> In this case i need to have extra array to convert pin number to offset,
>>> or use offset as pin number.
>>
>> Never mind, i think i found the answer:
>> This enumeration was arbitrarily chosen, in practice you need to think
>> through your numbering system so that it matches the layout of registers
>> and such things in your driver, or the code may become complicated. You
>> must also consider matching of offsets to the GPIO ranges that may be
>> handled by the pin controller.
>
> Yeah you're right :)
>
> There is some resoning in Documentation/pinctrl.txt but it needs some
> intuition etc.
>
> Yours,
> Linus Walleij
>
What is preferred method of handling gpio_request_enable in pinctrl
driver? My hw provide GPIO as one of mux variants for each controlled
pin. if i see it correctly, pin subsystem will not prevent using one
pin as gpio and request for some other functionality? Should it be
prevented by driver?
Here is my current pinctrl driver, in case it help understand my point:
https://github.com/olerem/linux-2.6/commit/5d8963e24493db445207c29dec00a6a848d8e781
--
Regards,
Oleksij
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^ permalink raw reply [flat|nested] 7+ messages in thread
* preferable method for pinctrl driver
2015-02-09 10:41 ` Oleksij Rempel
@ 2015-03-05 8:44 ` Linus Walleij
0 siblings, 0 replies; 7+ messages in thread
From: Linus Walleij @ 2015-03-05 8:44 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Feb 9, 2015 at 11:41 AM, Oleksij Rempel <linux@rempel-privat.de> wrote:
> What is preferred method of handling gpio_request_enable in pinctrl
> driver? My hw provide GPIO as one of mux variants for each controlled
> pin. if i see it correctly, pin subsystem will not prevent using one
> pin as gpio and request for some other functionality? Should it be
> prevented by driver?
That is up to the driver writer. We have contemplated adding an
option to pinctrl_desc enforcing "exclusive GPIO" meaning that
GPIO and another mux setting cannot be used at the same time,
but noone got around to implementing that.
Some pin controllers can do GPIO and another function at the
same time, see illustrations and text in
Documentation/pinctrl.txt
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 7+ messages in thread
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2014-10-10 8:42 preferable method for pinctrl driver Oleksij Rempel
2014-10-13 9:05 ` Linus Walleij
2014-11-07 8:35 ` Oleksij Rempel
2014-11-07 10:17 ` Oleksij Rempel
2014-11-14 10:01 ` Linus Walleij
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