From: linus.walleij@linaro.org (Linus Walleij)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 1/6] ARM: mm: cache-l2x0: Add base address argument to write_sec callback
Date: Fri, 27 Jun 2014 09:44:28 +0200 [thread overview]
Message-ID: <CACRpkdaA2oDOTBcL=S2j5bUTSB7oaS8ZWN0Rnf9Pbwtf3fTKjQ@mail.gmail.com> (raw)
In-Reply-To: <1403703451-12233-2-git-send-email-t.figa@samsung.com>
On Wed, Jun 25, 2014 at 3:37 PM, Tomasz Figa <t.figa@samsung.com> wrote:
> For certain platforms (e.g. Exynos) it is necessary to read back some
> values from registers before they can be written (i.e. SMC calls that
> set multiple registers per call), so base address of L2C controller is
> needed for .write_sec operation. This patch adds base argument to
> .write_sec callback so that its implementation can also access registers
> directly.
>
> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
> arch/arm/mach-ux500/cache-l2x0.c | 3 ++-
In our case just changing the signature of the function I see so:
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Yours,
Linus Walleij
next prev parent reply other threads:[~2014-06-27 7:44 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-25 13:37 [PATCH v2 0/6] Enable L2 cache support on Exynos4210/4x12 SoCs Tomasz Figa
2014-06-25 13:37 ` [PATCH v2 1/6] ARM: mm: cache-l2x0: Add base address argument to write_sec callback Tomasz Figa
2014-06-27 7:44 ` Linus Walleij [this message]
2014-06-25 13:37 ` [PATCH v2 2/6] ARM: Get outer cache .write_sec callback from mach_desc only if not NULL Tomasz Figa
2014-06-25 13:37 ` [PATCH v2 3/6] ARM: mm: cache-l2x0: Use l2c_write_sec() for LATENCY_CTRL registers Tomasz Figa
2014-06-25 13:37 ` [PATCH v2 4/6] ARM: mm: l2x0: Add support for overriding prefetch settings Tomasz Figa
2014-06-25 13:37 ` [PATCH v2 5/6] ARM: EXYNOS: Add .write_sec outer cache callback for L2C-310 Tomasz Figa
2014-06-25 13:37 ` [PATCH v2 6/6] ARM: dts: exynos4: Add nodes for L2 cache controller Tomasz Figa
2014-06-25 13:50 ` [PATCH v2 0/6] Enable L2 cache support on Exynos4210/4x12 SoCs Russell King - ARM Linux
2014-06-25 14:13 ` Tomasz Figa
2014-06-25 14:37 ` Russell King - ARM Linux
2014-06-25 15:46 ` Tomasz Figa
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