[BUG] ARM: socfpga: L2 cache init

[dinh.linux@gmail.com (Dinh Nguyen)]

On Tue, Feb 17, 2015 at 4:28 PM, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
> On Tue, Feb 17, 2015 at 04:00:47PM -0600, Dinh Nguyen wrote:
>> On Fri, Feb 13, 2015 at 2:01 AM, Steffen Trumtrar
>> <s.trumtrar@pengutronix.de> wrote:
>> > Yes, seems very likely that Russell is right.
>>
>> The bug doesn't happen if I disable the L2. Digging more...
>
> What ensures that the value written to socfpga_cpu1start_addr (by
> of_property_read_u32() in socfpga_sysmgr_init(), called at .init_irq
> time) is visible to the secondary CPU?

Yes, I was able use a JTAG debugger and can see that the
secondary CPU is not seeing socfpga_cpu1start_addr correctly when the
error occurs.

>
> From what I can see, the physical address written there is not
> guaranteed to be flushed from all levels of cache.
>
> The flush_cache_all() in socfpga_boot_secondary() won't do the job -
> that won't touch the L2C-310.
>

Do you have a recommendation on what should be done?

Thanks,
Dinh