[PATCH v4 1/2] ARM: new cache maintenance api for iommu

[grgupta@ti.com (Gupta, Ramesh)]

Hi Russell,


On Sat, Sep 8, 2012 at 3:44 PM, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
> On Thu, Jul 05, 2012 at 10:50:17AM +0530, Gupta, Ramesh wrote:
>> + *   flush_iommu_mem(start, end)
>> + *
>> + *           Clean and invalidate the specified virtual address range.
>> + *           This is to support the non coherent iommu drivers.
>> + *           The iommu driver need to call this api with the page
>> + *           table memory address range to ensure the data held in
>> + *           the cache is visible to the slave processor MMU.
>> + *           - start  - virtual start address
>> + *           - end    - virtual end address
>
> I think:
>         iommu_flush_range(start, end)
> or
>         iommu_flush_area(start, size)
>                 Perform CPU specific cache operations are required to
>                 ensure that the IOMMU page table mappings covering the
>                 specified block of memory are visiable to the IOMMU.

I prefer iommu_flush_area(start, size).

>
> Notice that it's defined by purpose, not by implementation.  Also notice
> the distinction between _range taking two addresses, and _area taking
> a start plus size.
> Also notice that it is defined just for IOMMU page tables, not for general
> data for other processors.

Agree with your comments, may be I can add an explicit comment for not
using these apis other than IOMMU page tables.


> Note that iommu_flush_area is safer if your virt_to_phys() are non-linear.

Agree, I will send an updated patch series with iommu_flush_area.

thank you for the review comments.

Best regards
Ramesh Gupta G