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* [PATCH v2 0/5] MediaTek PLL Refactors and Fixes
@ 2025-10-08 16:05 Nicolas Frattaroli
  2025-10-08 16:05 ` [PATCH v2 1/5] clk: Respect CLK_OPS_PARENT_ENABLE during recalc Nicolas Frattaroli
                   ` (4 more replies)
  0 siblings, 5 replies; 20+ messages in thread
From: Nicolas Frattaroli @ 2025-10-08 16:05 UTC (permalink / raw)
  To: AngeloGioacchino Del Regno, Michael Turquette, Stephen Boyd,
	Dong Aisheng, Matthias Brugger, Yassine Oudjana, Laura Nao,
	Nícolas F. R. A. Prado, Chia-I Wu, Chen-Yu Tsai
  Cc: kernel, linux-clk, linux-kernel, linux-arm-kernel, linux-mediatek,
	Stephen Boyd, Nicolas Frattaroli

This series refactors all users of mtk-pll, just so we can enable
runtime power management for the clock controllers that want it. It's
also generally more useful to have the struct device in the pll code,
rather than the device node.

Also fix up MT8196 mfgpll to declare its parent-child relationship with
mfg_eb, and fix the common clock framework core to take
CLK_OPS_PARENT_ENABLE into account for the recalc_rate op as well.

The reason why this is all in the same series is that it grew out of me
first modelling this as an RPM clock for mfgpll, which Angelo disagreed
with, so I did some investigation and it seems MFG_EB indeed is a parent
clock. However, the earlier refactoring to pass the device pointer down
is still useful.

Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
Changes in v2:
- Drop bindings patch
- Drop mfgpll RPM patch
- Add patch to also transition pllfh to passing device
- Add fixes patch to make CLK_OPS_PARENT_ENABLE also apply to the
  recalc_rate operation
- Remodel mfgpll's mfg_eb dependency as parent-child with
  CLK_OPS_PARENT_ENABLE
- Link to v1: https://lore.kernel.org/r/20250929-mtk-pll-rpm-v1-0-49541777878d@collabora.com

---
Nicolas Frattaroli (5):
      clk: Respect CLK_OPS_PARENT_ENABLE during recalc
      clk: mediatek: Refactor pll registration to pass device
      clk: mediatek: Pass device to clk_hw_register for PLLs
      clk: mediatek: Refactor pllfh registration to pass device
      clk: mediatek: Add mfg_eb as parent to mt8196 mfgpll clocks

 drivers/clk/clk.c                            | 13 +++++++++++++
 drivers/clk/mediatek/clk-mt2701.c            |  2 +-
 drivers/clk/mediatek/clk-mt2712-apmixedsys.c |  2 +-
 drivers/clk/mediatek/clk-mt6735-apmixedsys.c |  4 ++--
 drivers/clk/mediatek/clk-mt6765.c            |  2 +-
 drivers/clk/mediatek/clk-mt6779.c            |  2 +-
 drivers/clk/mediatek/clk-mt6795-apmixedsys.c |  2 +-
 drivers/clk/mediatek/clk-mt6797.c            |  2 +-
 drivers/clk/mediatek/clk-mt7622-apmixedsys.c |  2 +-
 drivers/clk/mediatek/clk-mt7629.c            |  2 +-
 drivers/clk/mediatek/clk-mt7981-apmixed.c    |  2 +-
 drivers/clk/mediatek/clk-mt7986-apmixed.c    |  2 +-
 drivers/clk/mediatek/clk-mt7988-apmixed.c    |  2 +-
 drivers/clk/mediatek/clk-mt8135-apmixedsys.c |  3 ++-
 drivers/clk/mediatek/clk-mt8167-apmixedsys.c |  2 +-
 drivers/clk/mediatek/clk-mt8173-apmixedsys.c | 14 +++++++-------
 drivers/clk/mediatek/clk-mt8183-apmixedsys.c |  2 +-
 drivers/clk/mediatek/clk-mt8186-apmixedsys.c |  2 +-
 drivers/clk/mediatek/clk-mt8188-apmixedsys.c |  2 +-
 drivers/clk/mediatek/clk-mt8192-apmixedsys.c |  2 +-
 drivers/clk/mediatek/clk-mt8195-apmixedsys.c |  2 +-
 drivers/clk/mediatek/clk-mt8195-apusys_pll.c |  3 ++-
 drivers/clk/mediatek/clk-mt8196-apmixedsys.c |  3 ++-
 drivers/clk/mediatek/clk-mt8196-mcu.c        |  2 +-
 drivers/clk/mediatek/clk-mt8196-mfg.c        |  5 +++--
 drivers/clk/mediatek/clk-mt8196-vlpckgen.c   |  2 +-
 drivers/clk/mediatek/clk-mt8365-apmixedsys.c |  2 +-
 drivers/clk/mediatek/clk-mt8516-apmixedsys.c |  2 +-
 drivers/clk/mediatek/clk-pll.c               | 19 +++++++++++++------
 drivers/clk/mediatek/clk-pll.h               | 11 +++++++----
 drivers/clk/mediatek/clk-pllfh.c             | 13 ++++++++-----
 drivers/clk/mediatek/clk-pllfh.h             |  2 +-
 32 files changed, 81 insertions(+), 51 deletions(-)
---
base-commit: adff43957b0d8b9f6ad0e1b1f6daa7136f9ffbef
change-id: 20250929-mtk-pll-rpm-bf28192dd016

Best regards,
-- 
Nicolas Frattaroli <nicolas.frattaroli@collabora.com>



^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH v2 1/5] clk: Respect CLK_OPS_PARENT_ENABLE during recalc
  2025-10-08 16:05 [PATCH v2 0/5] MediaTek PLL Refactors and Fixes Nicolas Frattaroli
@ 2025-10-08 16:05 ` Nicolas Frattaroli
  2025-10-09  7:07   ` Chen-Yu Tsai
  2025-10-09  8:01   ` AngeloGioacchino Del Regno
  2025-10-08 16:05 ` [PATCH v2 2/5] clk: mediatek: Refactor pll registration to pass device Nicolas Frattaroli
                   ` (3 subsequent siblings)
  4 siblings, 2 replies; 20+ messages in thread
From: Nicolas Frattaroli @ 2025-10-08 16:05 UTC (permalink / raw)
  To: AngeloGioacchino Del Regno, Michael Turquette, Stephen Boyd,
	Dong Aisheng, Matthias Brugger, Yassine Oudjana, Laura Nao,
	Nícolas F. R. A. Prado, Chia-I Wu, Chen-Yu Tsai
  Cc: kernel, linux-clk, linux-kernel, linux-arm-kernel, linux-mediatek,
	Stephen Boyd, Nicolas Frattaroli

When CLK_OPS_PARENT_ENABLE was introduced, it guarded various clock
operations, such as setting the rate or switching parents. However,
another operation that can and often does touch actual hardware state is
recalc_rate, which may also be affected by such a dependency.

Add parent enables/disables where the recalc_rate op is called directly.

Fixes: fc8726a2c021 ("clk: core: support clocks which requires parents enable (part 2)")
Fixes: a4b3518d146f ("clk: core: support clocks which requires parents enable (part 1)")
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
 drivers/clk/clk.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 85d2f2481acf360f0618a4a382fb51250e9c2fc4..1b0f9d567f48e003497afc98df0c0d2ad244eb90 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -1921,7 +1921,14 @@ static unsigned long clk_recalc(struct clk_core *core,
 	unsigned long rate = parent_rate;
 
 	if (core->ops->recalc_rate && !clk_pm_runtime_get(core)) {
+		if (core->flags & CLK_OPS_PARENT_ENABLE)
+			clk_core_prepare_enable(core->parent);
+
 		rate = core->ops->recalc_rate(core->hw, parent_rate);
+
+		if (core->flags & CLK_OPS_PARENT_ENABLE)
+			clk_core_disable_unprepare(core->parent);
+
 		clk_pm_runtime_put(core);
 	}
 	return rate;
@@ -4031,6 +4038,9 @@ static int __clk_core_init(struct clk_core *core)
 	 */
 	clk_core_update_duty_cycle_nolock(core);
 
+	if (core->flags & CLK_OPS_PARENT_ENABLE)
+		clk_core_prepare_enable(core->parent);
+
 	/*
 	 * Set clk's rate.  The preferred method is to use .recalc_rate.  For
 	 * simple clocks and lazy developers the default fallback is to use the
@@ -4046,6 +4056,9 @@ static int __clk_core_init(struct clk_core *core)
 		rate = 0;
 	core->rate = core->req_rate = rate;
 
+	if (core->flags & CLK_OPS_PARENT_ENABLE)
+		clk_core_disable_unprepare(core->parent);
+
 	/*
 	 * Enable CLK_IS_CRITICAL clocks so newly added critical clocks
 	 * don't get accidentally disabled when walking the orphan tree and

-- 
2.51.0



^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [PATCH v2 2/5] clk: mediatek: Refactor pll registration to pass device
  2025-10-08 16:05 [PATCH v2 0/5] MediaTek PLL Refactors and Fixes Nicolas Frattaroli
  2025-10-08 16:05 ` [PATCH v2 1/5] clk: Respect CLK_OPS_PARENT_ENABLE during recalc Nicolas Frattaroli
@ 2025-10-08 16:05 ` Nicolas Frattaroli
  2025-10-09  7:09   ` Chen-Yu Tsai
                     ` (2 more replies)
  2025-10-08 16:05 ` [PATCH v2 3/5] clk: mediatek: Pass device to clk_hw_register for PLLs Nicolas Frattaroli
                   ` (2 subsequent siblings)
  4 siblings, 3 replies; 20+ messages in thread
From: Nicolas Frattaroli @ 2025-10-08 16:05 UTC (permalink / raw)
  To: AngeloGioacchino Del Regno, Michael Turquette, Stephen Boyd,
	Dong Aisheng, Matthias Brugger, Yassine Oudjana, Laura Nao,
	Nícolas F. R. A. Prado, Chia-I Wu, Chen-Yu Tsai
  Cc: kernel, linux-clk, linux-kernel, linux-arm-kernel, linux-mediatek,
	Stephen Boyd, Nicolas Frattaroli

As it stands, mtk_clk_register_plls takes a struct device_node pointer
as its first argument. This is a tragic happenstance, as it's trivial to
get the device_node from a struct device, but the opposite not so much.
The struct device is a much more useful thing to have passed down.

Refactor mtk_clk_register_plls to take a struct device pointer instead
of a struct device_node pointer, and fix up all users of this function.

Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
 drivers/clk/mediatek/clk-mt2701.c            | 2 +-
 drivers/clk/mediatek/clk-mt2712-apmixedsys.c | 2 +-
 drivers/clk/mediatek/clk-mt6735-apmixedsys.c | 4 ++--
 drivers/clk/mediatek/clk-mt6765.c            | 2 +-
 drivers/clk/mediatek/clk-mt6779.c            | 2 +-
 drivers/clk/mediatek/clk-mt6797.c            | 2 +-
 drivers/clk/mediatek/clk-mt7622-apmixedsys.c | 2 +-
 drivers/clk/mediatek/clk-mt7629.c            | 2 +-
 drivers/clk/mediatek/clk-mt7981-apmixed.c    | 2 +-
 drivers/clk/mediatek/clk-mt7986-apmixed.c    | 2 +-
 drivers/clk/mediatek/clk-mt7988-apmixed.c    | 2 +-
 drivers/clk/mediatek/clk-mt8135-apmixedsys.c | 3 ++-
 drivers/clk/mediatek/clk-mt8167-apmixedsys.c | 2 +-
 drivers/clk/mediatek/clk-mt8183-apmixedsys.c | 2 +-
 drivers/clk/mediatek/clk-mt8188-apmixedsys.c | 2 +-
 drivers/clk/mediatek/clk-mt8195-apusys_pll.c | 3 ++-
 drivers/clk/mediatek/clk-mt8196-apmixedsys.c | 3 ++-
 drivers/clk/mediatek/clk-mt8196-mcu.c        | 2 +-
 drivers/clk/mediatek/clk-mt8196-mfg.c        | 2 +-
 drivers/clk/mediatek/clk-mt8196-vlpckgen.c   | 2 +-
 drivers/clk/mediatek/clk-mt8365-apmixedsys.c | 2 +-
 drivers/clk/mediatek/clk-mt8516-apmixedsys.c | 2 +-
 drivers/clk/mediatek/clk-pll.c               | 7 ++++---
 drivers/clk/mediatek/clk-pll.h               | 6 +++---
 24 files changed, 33 insertions(+), 29 deletions(-)

diff --git a/drivers/clk/mediatek/clk-mt2701.c b/drivers/clk/mediatek/clk-mt2701.c
index 1e88ad8b93f4485ad40f842e19c68117e00a2fbe..d9f40fda73d1abc56ebc97ab755bb48bd5f0991f 100644
--- a/drivers/clk/mediatek/clk-mt2701.c
+++ b/drivers/clk/mediatek/clk-mt2701.c
@@ -978,7 +978,7 @@ static int mtk_apmixedsys_init(struct platform_device *pdev)
 	if (!clk_data)
 		return -ENOMEM;
 
-	mtk_clk_register_plls(node, apmixed_plls, ARRAY_SIZE(apmixed_plls),
+	mtk_clk_register_plls(&pdev->dev, apmixed_plls, ARRAY_SIZE(apmixed_plls),
 								clk_data);
 	mtk_clk_register_factors(apmixed_fixed_divs, ARRAY_SIZE(apmixed_fixed_divs),
 								clk_data);
diff --git a/drivers/clk/mediatek/clk-mt2712-apmixedsys.c b/drivers/clk/mediatek/clk-mt2712-apmixedsys.c
index a60622d251ff30fe8db2e596d87986a88f854e61..54b18e9f83f8f403460c77d8f5d4ea0737316774 100644
--- a/drivers/clk/mediatek/clk-mt2712-apmixedsys.c
+++ b/drivers/clk/mediatek/clk-mt2712-apmixedsys.c
@@ -119,7 +119,7 @@ static int clk_mt2712_apmixed_probe(struct platform_device *pdev)
 	if (!clk_data)
 		return -ENOMEM;
 
-	r = mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
+	r = mtk_clk_register_plls(&pdev->dev, plls, ARRAY_SIZE(plls), clk_data);
 	if (r)
 		goto free_clk_data;
 
diff --git a/drivers/clk/mediatek/clk-mt6735-apmixedsys.c b/drivers/clk/mediatek/clk-mt6735-apmixedsys.c
index e0949911e8f7da7894b204012caefd0404cf8308..9e30c089a2092472bab889ede419c41890c307a0 100644
--- a/drivers/clk/mediatek/clk-mt6735-apmixedsys.c
+++ b/drivers/clk/mediatek/clk-mt6735-apmixedsys.c
@@ -93,8 +93,8 @@ static int clk_mt6735_apmixed_probe(struct platform_device *pdev)
 		return -ENOMEM;
 	platform_set_drvdata(pdev, clk_data);
 
-	ret = mtk_clk_register_plls(pdev->dev.of_node, apmixedsys_plls,
-				   ARRAY_SIZE(apmixedsys_plls), clk_data);
+	ret = mtk_clk_register_plls(&pdev->dev, apmixedsys_plls,
+				    ARRAY_SIZE(apmixedsys_plls), clk_data);
 	if (ret) {
 		dev_err(&pdev->dev, "Failed to register PLLs: %d\n", ret);
 		return ret;
diff --git a/drivers/clk/mediatek/clk-mt6765.c b/drivers/clk/mediatek/clk-mt6765.c
index d53731e7933f46d88ff180e43eb7163e52fb5b1c..60f6f9fa7dcf279631d0fa2eb30a3bcbadef3225 100644
--- a/drivers/clk/mediatek/clk-mt6765.c
+++ b/drivers/clk/mediatek/clk-mt6765.c
@@ -740,7 +740,7 @@ static int clk_mt6765_apmixed_probe(struct platform_device *pdev)
 	if (!clk_data)
 		return -ENOMEM;
 
-	mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
+	mtk_clk_register_plls(&pdev->dev, plls, ARRAY_SIZE(plls), clk_data);
 
 	mtk_clk_register_gates(&pdev->dev, node, apmixed_clks,
 			       ARRAY_SIZE(apmixed_clks), clk_data);
diff --git a/drivers/clk/mediatek/clk-mt6779.c b/drivers/clk/mediatek/clk-mt6779.c
index 86732f5acf93407a5aa99bc2f386f0728a06bb9b..4b9dcb910b03f1078212dc7089d7171d05de7e7f 100644
--- a/drivers/clk/mediatek/clk-mt6779.c
+++ b/drivers/clk/mediatek/clk-mt6779.c
@@ -1220,7 +1220,7 @@ static int clk_mt6779_apmixed_probe(struct platform_device *pdev)
 	if (!clk_data)
 		return -ENOMEM;
 
-	mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
+	mtk_clk_register_plls(&pdev->dev, plls, ARRAY_SIZE(plls), clk_data);
 
 	mtk_clk_register_gates(&pdev->dev, node, apmixed_clks,
 			       ARRAY_SIZE(apmixed_clks), clk_data);
diff --git a/drivers/clk/mediatek/clk-mt6797.c b/drivers/clk/mediatek/clk-mt6797.c
index fb59e71af58e32d9419e036e3dbd28cdaa61cac3..ebf850ac57f540f2317e63dfabe94a953db3ae29 100644
--- a/drivers/clk/mediatek/clk-mt6797.c
+++ b/drivers/clk/mediatek/clk-mt6797.c
@@ -655,7 +655,7 @@ static int mtk_apmixedsys_init(struct platform_device *pdev)
 	if (!clk_data)
 		return -ENOMEM;
 
-	mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
+	mtk_clk_register_plls(&pdev->dev, plls, ARRAY_SIZE(plls), clk_data);
 
 	return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
 }
diff --git a/drivers/clk/mediatek/clk-mt7622-apmixedsys.c b/drivers/clk/mediatek/clk-mt7622-apmixedsys.c
index 2350592d9a934f3ec8efb0cd8197e4c4fee49697..8a29eaab0cfcb7a389e09f8869b572d5886e2eaf 100644
--- a/drivers/clk/mediatek/clk-mt7622-apmixedsys.c
+++ b/drivers/clk/mediatek/clk-mt7622-apmixedsys.c
@@ -96,7 +96,7 @@ static int clk_mt7622_apmixed_probe(struct platform_device *pdev)
 	if (!clk_data)
 		return -ENOMEM;
 
-	ret = mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
+	ret = mtk_clk_register_plls(dev, plls, ARRAY_SIZE(plls), clk_data);
 	if (ret)
 		return ret;
 
diff --git a/drivers/clk/mediatek/clk-mt7629.c b/drivers/clk/mediatek/clk-mt7629.c
index baf94e7bea373c59cb6333fdb483d00240b744c7..e154771b1b8bba7378af8a797c81d0784b626e3b 100644
--- a/drivers/clk/mediatek/clk-mt7629.c
+++ b/drivers/clk/mediatek/clk-mt7629.c
@@ -634,7 +634,7 @@ static int mtk_apmixedsys_init(struct platform_device *pdev)
 	if (!clk_data)
 		return -ENOMEM;
 
-	mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls),
+	mtk_clk_register_plls(&pdev->dev, plls, ARRAY_SIZE(plls),
 			      clk_data);
 
 	mtk_clk_register_gates(&pdev->dev, node, apmixed_clks,
diff --git a/drivers/clk/mediatek/clk-mt7981-apmixed.c b/drivers/clk/mediatek/clk-mt7981-apmixed.c
index e8211eb4e09e1a645f7e50a1e5814d29030c1757..6606b54fb376983ec7d49b00c2c0d1690c734058 100644
--- a/drivers/clk/mediatek/clk-mt7981-apmixed.c
+++ b/drivers/clk/mediatek/clk-mt7981-apmixed.c
@@ -76,7 +76,7 @@ static int clk_mt7981_apmixed_probe(struct platform_device *pdev)
 	if (!clk_data)
 		return -ENOMEM;
 
-	mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
+	mtk_clk_register_plls(&pdev->dev, plls, ARRAY_SIZE(plls), clk_data);
 
 	r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
 	if (r) {
diff --git a/drivers/clk/mediatek/clk-mt7986-apmixed.c b/drivers/clk/mediatek/clk-mt7986-apmixed.c
index 93751abe6be89784a102a0e5ac629d363ab3baaf..1c79418d08a77acf25cee914fb6573ac1707163e 100644
--- a/drivers/clk/mediatek/clk-mt7986-apmixed.c
+++ b/drivers/clk/mediatek/clk-mt7986-apmixed.c
@@ -74,7 +74,7 @@ static int clk_mt7986_apmixed_probe(struct platform_device *pdev)
 	if (!clk_data)
 		return -ENOMEM;
 
-	mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
+	mtk_clk_register_plls(&pdev->dev, plls, ARRAY_SIZE(plls), clk_data);
 
 	r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
 	if (r) {
diff --git a/drivers/clk/mediatek/clk-mt7988-apmixed.c b/drivers/clk/mediatek/clk-mt7988-apmixed.c
index 63d33a78cb48805f71aa6a74f8ed6b83f3b4fe22..416a4b88d100bb47bdb07e4f72bc13208c8707a7 100644
--- a/drivers/clk/mediatek/clk-mt7988-apmixed.c
+++ b/drivers/clk/mediatek/clk-mt7988-apmixed.c
@@ -86,7 +86,7 @@ static int clk_mt7988_apmixed_probe(struct platform_device *pdev)
 	if (!clk_data)
 		return -ENOMEM;
 
-	r = mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
+	r = mtk_clk_register_plls(&pdev->dev, plls, ARRAY_SIZE(plls), clk_data);
 	if (r)
 		goto free_apmixed_data;
 
diff --git a/drivers/clk/mediatek/clk-mt8135-apmixedsys.c b/drivers/clk/mediatek/clk-mt8135-apmixedsys.c
index bdadc35c64cbd8987061c4442b8ff2f5fe50cc32..19e4ee489ec3905e92674ed0813a9f60f9c28209 100644
--- a/drivers/clk/mediatek/clk-mt8135-apmixedsys.c
+++ b/drivers/clk/mediatek/clk-mt8135-apmixedsys.c
@@ -57,7 +57,8 @@ static int clk_mt8135_apmixed_probe(struct platform_device *pdev)
 	if (!clk_data)
 		return -ENOMEM;
 
-	ret = mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
+	ret = mtk_clk_register_plls(&pdev->dev, plls, ARRAY_SIZE(plls),
+				    clk_data);
 	if (ret)
 		goto free_clk_data;
 
diff --git a/drivers/clk/mediatek/clk-mt8167-apmixedsys.c b/drivers/clk/mediatek/clk-mt8167-apmixedsys.c
index adf576786696e0962dfd5147dfc8897bfaa48054..fb6c21bbeef81a383b56c8fada1799e0680676e5 100644
--- a/drivers/clk/mediatek/clk-mt8167-apmixedsys.c
+++ b/drivers/clk/mediatek/clk-mt8167-apmixedsys.c
@@ -105,7 +105,7 @@ static int clk_mt8167_apmixed_probe(struct platform_device *pdev)
 	if (!clk_data)
 		return -ENOMEM;
 
-	ret = mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
+	ret = mtk_clk_register_plls(dev, plls, ARRAY_SIZE(plls), clk_data);
 	if (ret)
 		return ret;
 
diff --git a/drivers/clk/mediatek/clk-mt8183-apmixedsys.c b/drivers/clk/mediatek/clk-mt8183-apmixedsys.c
index 551adbfd7ac9309bbc4f9beefe4f26230514f062..6242d4f5376e79346b2219b0a35cf0c5ad755e49 100644
--- a/drivers/clk/mediatek/clk-mt8183-apmixedsys.c
+++ b/drivers/clk/mediatek/clk-mt8183-apmixedsys.c
@@ -155,7 +155,7 @@ static int clk_mt8183_apmixed_probe(struct platform_device *pdev)
 	if (!clk_data)
 		return -ENOMEM;
 
-	ret = mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
+	ret = mtk_clk_register_plls(dev, plls, ARRAY_SIZE(plls), clk_data);
 	if (ret)
 		return ret;
 
diff --git a/drivers/clk/mediatek/clk-mt8188-apmixedsys.c b/drivers/clk/mediatek/clk-mt8188-apmixedsys.c
index 21d7a9a2ab1af64cca6962960418d44c81dc664a..a1de596bff9945ca938504391e3e33a4987d3a63 100644
--- a/drivers/clk/mediatek/clk-mt8188-apmixedsys.c
+++ b/drivers/clk/mediatek/clk-mt8188-apmixedsys.c
@@ -106,7 +106,7 @@ static int clk_mt8188_apmixed_probe(struct platform_device *pdev)
 	if (!clk_data)
 		return -ENOMEM;
 
-	r = mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
+	r = mtk_clk_register_plls(&pdev->dev, plls, ARRAY_SIZE(plls), clk_data);
 	if (r)
 		goto free_apmixed_data;
 
diff --git a/drivers/clk/mediatek/clk-mt8195-apusys_pll.c b/drivers/clk/mediatek/clk-mt8195-apusys_pll.c
index 8b45a3fad02f18df30e4c2ce2ba5b6338eae321f..a2d98ed58e34866b3d68bd0f85bde339c258d822 100644
--- a/drivers/clk/mediatek/clk-mt8195-apusys_pll.c
+++ b/drivers/clk/mediatek/clk-mt8195-apusys_pll.c
@@ -66,7 +66,8 @@ static int clk_mt8195_apusys_pll_probe(struct platform_device *pdev)
 	if (!clk_data)
 		return -ENOMEM;
 
-	r = mtk_clk_register_plls(node, apusys_plls, ARRAY_SIZE(apusys_plls), clk_data);
+	r = mtk_clk_register_plls(&pdev->dev, apusys_plls,
+				  ARRAY_SIZE(apusys_plls), clk_data);
 	if (r)
 		goto free_apusys_pll_data;
 
diff --git a/drivers/clk/mediatek/clk-mt8196-apmixedsys.c b/drivers/clk/mediatek/clk-mt8196-apmixedsys.c
index 617f5449b88b8bcaf282e8ed8593b52413a233a8..c4ebb0170b82b979fbe7f03925f205325247d55d 100644
--- a/drivers/clk/mediatek/clk-mt8196-apmixedsys.c
+++ b/drivers/clk/mediatek/clk-mt8196-apmixedsys.c
@@ -152,7 +152,8 @@ static int clk_mt8196_apmixed_probe(struct platform_device *pdev)
 	if (!clk_data)
 		return -ENOMEM;
 
-	r = mtk_clk_register_plls(node, mcd->clks, mcd->num_clks, clk_data);
+	r = mtk_clk_register_plls(&pdev->dev, mcd->clks, mcd->num_clks,
+				  clk_data);
 	if (r)
 		goto free_apmixed_data;
 
diff --git a/drivers/clk/mediatek/clk-mt8196-mcu.c b/drivers/clk/mediatek/clk-mt8196-mcu.c
index 5cbcc411ae734c82b97bf099a645cb6aaa31d9c3..13642fc673c267a66027d1fa7073c9cfed68c682 100644
--- a/drivers/clk/mediatek/clk-mt8196-mcu.c
+++ b/drivers/clk/mediatek/clk-mt8196-mcu.c
@@ -122,7 +122,7 @@ static int clk_mt8196_mcu_probe(struct platform_device *pdev)
 	if (!clk_data)
 		return -ENOMEM;
 
-	r = mtk_clk_register_plls(node, plls, num_plls, clk_data);
+	r = mtk_clk_register_plls(&pdev->dev, plls, num_plls, clk_data);
 	if (r)
 		goto free_clk_data;
 
diff --git a/drivers/clk/mediatek/clk-mt8196-mfg.c b/drivers/clk/mediatek/clk-mt8196-mfg.c
index ae1eb9de79ae2992b10a400c75e2e0324b100f66..8e09c0f7b7548f8e286671cea2dac64530b8ce47 100644
--- a/drivers/clk/mediatek/clk-mt8196-mfg.c
+++ b/drivers/clk/mediatek/clk-mt8196-mfg.c
@@ -105,7 +105,7 @@ static int clk_mt8196_mfg_probe(struct platform_device *pdev)
 	if (!clk_data)
 		return -ENOMEM;
 
-	r = mtk_clk_register_plls(node, plls, num_plls, clk_data);
+	r = mtk_clk_register_plls(&pdev->dev, plls, num_plls, clk_data);
 	if (r)
 		goto free_clk_data;
 
diff --git a/drivers/clk/mediatek/clk-mt8196-vlpckgen.c b/drivers/clk/mediatek/clk-mt8196-vlpckgen.c
index d59a8a9d98550e897d18031d9bb814aa96d3cf57..7dcc164627c578ca93377425c3b21b46da4b4c28 100644
--- a/drivers/clk/mediatek/clk-mt8196-vlpckgen.c
+++ b/drivers/clk/mediatek/clk-mt8196-vlpckgen.c
@@ -664,7 +664,7 @@ static int clk_mt8196_vlp_probe(struct platform_device *pdev)
 	if (r)
 		goto unregister_factors;
 
-	r = mtk_clk_register_plls(node, vlp_plls, ARRAY_SIZE(vlp_plls),
+	r = mtk_clk_register_plls(dev, vlp_plls, ARRAY_SIZE(vlp_plls),
 				  clk_data);
 	if (r)
 		goto unregister_muxes;
diff --git a/drivers/clk/mediatek/clk-mt8365-apmixedsys.c b/drivers/clk/mediatek/clk-mt8365-apmixedsys.c
index f41b991a0178af3067b19a693512ec922af48e07..e331aa28a4bd58baf48a4aae1601cc80fc5661ac 100644
--- a/drivers/clk/mediatek/clk-mt8365-apmixedsys.c
+++ b/drivers/clk/mediatek/clk-mt8365-apmixedsys.c
@@ -133,7 +133,7 @@ static int clk_mt8365_apmixed_probe(struct platform_device *pdev)
 		return PTR_ERR(hw);
 	clk_data->hws[CLK_APMIXED_USB20_EN] = hw;
 
-	ret = mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
+	ret = mtk_clk_register_plls(dev, plls, ARRAY_SIZE(plls), clk_data);
 	if (ret)
 		return ret;
 
diff --git a/drivers/clk/mediatek/clk-mt8516-apmixedsys.c b/drivers/clk/mediatek/clk-mt8516-apmixedsys.c
index edd9174d2f2ff97a0c1198caa2a0b9c1ca40ffd2..2a6206cae2f087ff06fe60a6cf96a0fa3143e567 100644
--- a/drivers/clk/mediatek/clk-mt8516-apmixedsys.c
+++ b/drivers/clk/mediatek/clk-mt8516-apmixedsys.c
@@ -87,7 +87,7 @@ static int clk_mt8516_apmixed_probe(struct platform_device *pdev)
 	if (!clk_data)
 		return -ENOMEM;
 
-	ret = mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
+	ret = mtk_clk_register_plls(dev, plls, ARRAY_SIZE(plls), clk_data);
 	if (ret)
 		return ret;
 
diff --git a/drivers/clk/mediatek/clk-pll.c b/drivers/clk/mediatek/clk-pll.c
index cd2b6ce551c6b0333cbe0a4f0d155ba2411f757a..5caf91ae9ddbe4f4d7052864adf0a5a70bda66bc 100644
--- a/drivers/clk/mediatek/clk-pll.c
+++ b/drivers/clk/mediatek/clk-pll.c
@@ -11,6 +11,7 @@
 #include <linux/io.h>
 #include <linux/module.h>
 #include <linux/of_address.h>
+#include <linux/platform_device.h>
 #include <linux/slab.h>
 
 #include "clk-pll.h"
@@ -404,7 +405,7 @@ void mtk_clk_unregister_pll(struct clk_hw *hw)
 	kfree(pll);
 }
 
-int mtk_clk_register_plls(struct device_node *node,
+int mtk_clk_register_plls(struct device *dev,
 			  const struct mtk_pll_data *plls, int num_plls,
 			  struct clk_hw_onecell_data *clk_data)
 {
@@ -412,7 +413,7 @@ int mtk_clk_register_plls(struct device_node *node,
 	int i;
 	struct clk_hw *hw;
 
-	base = of_iomap(node, 0);
+	base = of_iomap(dev->of_node, 0);
 	if (!base) {
 		pr_err("%s(): ioremap failed\n", __func__);
 		return -EINVAL;
@@ -423,7 +424,7 @@ int mtk_clk_register_plls(struct device_node *node,
 
 		if (!IS_ERR_OR_NULL(clk_data->hws[pll->id])) {
 			pr_warn("%pOF: Trying to register duplicate clock ID: %d\n",
-				node, pll->id);
+				dev->of_node, pll->id);
 			continue;
 		}
 
diff --git a/drivers/clk/mediatek/clk-pll.h b/drivers/clk/mediatek/clk-pll.h
index d71c150ce83e4bb2fe78290c2d5570a90084246d..0e2b94b9cd4b56adceee3b04e9ab24c2526471da 100644
--- a/drivers/clk/mediatek/clk-pll.h
+++ b/drivers/clk/mediatek/clk-pll.h
@@ -78,9 +78,9 @@ struct mtk_clk_pll {
 	const struct mtk_pll_data *data;
 };
 
-int mtk_clk_register_plls(struct device_node *node,
-			  const struct mtk_pll_data *plls, int num_plls,
-			  struct clk_hw_onecell_data *clk_data);
+int mtk_clk_register_plls(struct device *dev, const struct mtk_pll_data *plls,
+			  int num_plls, struct clk_hw_onecell_data *clk_data);
+
 void mtk_clk_unregister_plls(const struct mtk_pll_data *plls, int num_plls,
 			     struct clk_hw_onecell_data *clk_data);
 

-- 
2.51.0



^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [PATCH v2 3/5] clk: mediatek: Pass device to clk_hw_register for PLLs
  2025-10-08 16:05 [PATCH v2 0/5] MediaTek PLL Refactors and Fixes Nicolas Frattaroli
  2025-10-08 16:05 ` [PATCH v2 1/5] clk: Respect CLK_OPS_PARENT_ENABLE during recalc Nicolas Frattaroli
  2025-10-08 16:05 ` [PATCH v2 2/5] clk: mediatek: Refactor pll registration to pass device Nicolas Frattaroli
@ 2025-10-08 16:05 ` Nicolas Frattaroli
  2025-10-09  8:11   ` AngeloGioacchino Del Regno
  2025-10-09  8:32   ` Chen-Yu Tsai
  2025-10-08 16:05 ` [PATCH v2 4/5] clk: mediatek: Refactor pllfh registration to pass device Nicolas Frattaroli
  2025-10-08 16:05 ` [PATCH v2 5/5] clk: mediatek: Add mfg_eb as parent to mt8196 mfgpll clocks Nicolas Frattaroli
  4 siblings, 2 replies; 20+ messages in thread
From: Nicolas Frattaroli @ 2025-10-08 16:05 UTC (permalink / raw)
  To: AngeloGioacchino Del Regno, Michael Turquette, Stephen Boyd,
	Dong Aisheng, Matthias Brugger, Yassine Oudjana, Laura Nao,
	Nícolas F. R. A. Prado, Chia-I Wu, Chen-Yu Tsai
  Cc: kernel, linux-clk, linux-kernel, linux-arm-kernel, linux-mediatek,
	Stephen Boyd, Nicolas Frattaroli

Passing the struct device pointer to clk_hw_register allows for runtime
power management to work for the registered clock controllers. However,
the mediatek PLL clocks do not do this.

Change this by adding a struct device pointer argument to
mtk_clk_register_pll, and fix up the only other user of it. Also add a
new member to the struct mtk_clk_pll for the struct device pointer,
which is set by mtk_clk_register_pll and is used by
mtk_clk_register_pll_ops.

If mtk_clk_register_pll is called with a NULL struct device pointer,
then everything still works as expected; the clock core will simply
treat them as previously, i.e. without runtime power management.

Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
 drivers/clk/mediatek/clk-pll.c   | 9 ++++++---
 drivers/clk/mediatek/clk-pll.h   | 4 +++-
 drivers/clk/mediatek/clk-pllfh.c | 2 +-
 3 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/drivers/clk/mediatek/clk-pll.c b/drivers/clk/mediatek/clk-pll.c
index 5caf91ae9ddbe4f4d7052864adf0a5a70bda66bc..c4f9c06e5133dbc5902f261353c197fbde95e54d 100644
--- a/drivers/clk/mediatek/clk-pll.c
+++ b/drivers/clk/mediatek/clk-pll.c
@@ -366,7 +366,7 @@ struct clk_hw *mtk_clk_register_pll_ops(struct mtk_clk_pll *pll,
 		init.parent_names = &parent_name;
 	init.num_parents = 1;
 
-	ret = clk_hw_register(NULL, &pll->hw);
+	ret = clk_hw_register(pll->dev, &pll->hw);
 
 	if (ret)
 		return ERR_PTR(ret);
@@ -374,7 +374,8 @@ struct clk_hw *mtk_clk_register_pll_ops(struct mtk_clk_pll *pll,
 	return &pll->hw;
 }
 
-struct clk_hw *mtk_clk_register_pll(const struct mtk_pll_data *data,
+struct clk_hw *mtk_clk_register_pll(struct device *dev,
+				    const struct mtk_pll_data *data,
 				    void __iomem *base)
 {
 	struct mtk_clk_pll *pll;
@@ -385,6 +386,8 @@ struct clk_hw *mtk_clk_register_pll(const struct mtk_pll_data *data,
 	if (!pll)
 		return ERR_PTR(-ENOMEM);
 
+	pll->dev = dev;
+
 	hw = mtk_clk_register_pll_ops(pll, data, base, pll_ops);
 	if (IS_ERR(hw))
 		kfree(pll);
@@ -428,7 +431,7 @@ int mtk_clk_register_plls(struct device *dev,
 			continue;
 		}
 
-		hw = mtk_clk_register_pll(pll, base);
+		hw = mtk_clk_register_pll(dev, pll, base);
 
 		if (IS_ERR(hw)) {
 			pr_err("Failed to register clk %s: %pe\n", pll->name,
diff --git a/drivers/clk/mediatek/clk-pll.h b/drivers/clk/mediatek/clk-pll.h
index 0e2b94b9cd4b56adceee3b04e9ab24c2526471da..0f2a1d19eea78b7390b221af47016eb9897f3596 100644
--- a/drivers/clk/mediatek/clk-pll.h
+++ b/drivers/clk/mediatek/clk-pll.h
@@ -63,6 +63,7 @@ struct mtk_pll_data {
  */
 
 struct mtk_clk_pll {
+	struct device *dev;
 	struct clk_hw	hw;
 	void __iomem	*base_addr;
 	void __iomem	*pd_addr;
@@ -110,7 +111,8 @@ struct clk_hw *mtk_clk_register_pll_ops(struct mtk_clk_pll *pll,
 					const struct mtk_pll_data *data,
 					void __iomem *base,
 					const struct clk_ops *pll_ops);
-struct clk_hw *mtk_clk_register_pll(const struct mtk_pll_data *data,
+struct clk_hw *mtk_clk_register_pll(struct device *dev,
+				    const struct mtk_pll_data *data,
 				    void __iomem *base);
 void mtk_clk_unregister_pll(struct clk_hw *hw);
 
diff --git a/drivers/clk/mediatek/clk-pllfh.c b/drivers/clk/mediatek/clk-pllfh.c
index 83630ee07ee976bf980c8cf2dd35ea24c1b40821..62bfe4a480f14a0a742fb094aff0e6d1a79fe0c3 100644
--- a/drivers/clk/mediatek/clk-pllfh.c
+++ b/drivers/clk/mediatek/clk-pllfh.c
@@ -220,7 +220,7 @@ int mtk_clk_register_pllfhs(struct device_node *node,
 		if (use_fhctl)
 			hw = mtk_clk_register_pllfh(pll, pllfh, base);
 		else
-			hw = mtk_clk_register_pll(pll, base);
+			hw = mtk_clk_register_pll(NULL, pll, base);
 
 		if (IS_ERR(hw)) {
 			pr_err("Failed to register %s clk %s: %ld\n",

-- 
2.51.0



^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [PATCH v2 4/5] clk: mediatek: Refactor pllfh registration to pass device
  2025-10-08 16:05 [PATCH v2 0/5] MediaTek PLL Refactors and Fixes Nicolas Frattaroli
                   ` (2 preceding siblings ...)
  2025-10-08 16:05 ` [PATCH v2 3/5] clk: mediatek: Pass device to clk_hw_register for PLLs Nicolas Frattaroli
@ 2025-10-08 16:05 ` Nicolas Frattaroli
  2025-10-09  7:33   ` Chen-Yu Tsai
  2025-10-09  8:12   ` AngeloGioacchino Del Regno
  2025-10-08 16:05 ` [PATCH v2 5/5] clk: mediatek: Add mfg_eb as parent to mt8196 mfgpll clocks Nicolas Frattaroli
  4 siblings, 2 replies; 20+ messages in thread
From: Nicolas Frattaroli @ 2025-10-08 16:05 UTC (permalink / raw)
  To: AngeloGioacchino Del Regno, Michael Turquette, Stephen Boyd,
	Dong Aisheng, Matthias Brugger, Yassine Oudjana, Laura Nao,
	Nícolas F. R. A. Prado, Chia-I Wu, Chen-Yu Tsai
  Cc: kernel, linux-clk, linux-kernel, linux-arm-kernel, linux-mediatek,
	Stephen Boyd, Nicolas Frattaroli

After refactoring all of PLL to pass the device, it's now fairly easy to
refactor pllfh and its users, as pllfh registration wraps PLL
registration.

Do this refactor and move all of the pllfh users to pass the device as
well.

Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
 drivers/clk/mediatek/clk-mt6795-apmixedsys.c |  2 +-
 drivers/clk/mediatek/clk-mt8173-apmixedsys.c | 14 +++++++-------
 drivers/clk/mediatek/clk-mt8186-apmixedsys.c |  2 +-
 drivers/clk/mediatek/clk-mt8192-apmixedsys.c |  2 +-
 drivers/clk/mediatek/clk-mt8195-apmixedsys.c |  2 +-
 drivers/clk/mediatek/clk-pllfh.c             | 13 ++++++++-----
 drivers/clk/mediatek/clk-pllfh.h             |  2 +-
 7 files changed, 20 insertions(+), 17 deletions(-)

diff --git a/drivers/clk/mediatek/clk-mt6795-apmixedsys.c b/drivers/clk/mediatek/clk-mt6795-apmixedsys.c
index 91665d7f125efde4941cc4de881c5b503a935529..123d5d7fea8554676364dc56f5c023e43325d516 100644
--- a/drivers/clk/mediatek/clk-mt6795-apmixedsys.c
+++ b/drivers/clk/mediatek/clk-mt6795-apmixedsys.c
@@ -152,7 +152,7 @@ static int clk_mt6795_apmixed_probe(struct platform_device *pdev)
 		return -ENOMEM;
 
 	fhctl_parse_dt(fhctl_node, pllfhs, ARRAY_SIZE(pllfhs));
-	ret = mtk_clk_register_pllfhs(node, plls, ARRAY_SIZE(plls),
+	ret = mtk_clk_register_pllfhs(dev, plls, ARRAY_SIZE(plls),
 				      pllfhs, ARRAY_SIZE(pllfhs), clk_data);
 	if (ret)
 		goto free_clk_data;
diff --git a/drivers/clk/mediatek/clk-mt8173-apmixedsys.c b/drivers/clk/mediatek/clk-mt8173-apmixedsys.c
index 95385bb67d5511eda3a851f81986e67eaf81e5fb..d7d416172ab35bc027ae67c163c1dc20dee857b6 100644
--- a/drivers/clk/mediatek/clk-mt8173-apmixedsys.c
+++ b/drivers/clk/mediatek/clk-mt8173-apmixedsys.c
@@ -140,13 +140,13 @@ MODULE_DEVICE_TABLE(of, of_match_clk_mt8173_apmixed);
 static int clk_mt8173_apmixed_probe(struct platform_device *pdev)
 {
 	const u8 *fhctl_node = "mediatek,mt8173-fhctl";
-	struct device_node *node = pdev->dev.of_node;
 	struct clk_hw_onecell_data *clk_data;
+	struct device *dev = &pdev->dev;
 	void __iomem *base;
 	struct clk_hw *hw;
 	int r;
 
-	base = of_iomap(node, 0);
+	base = of_iomap(dev->of_node, 0);
 	if (!base)
 		return -ENOMEM;
 
@@ -157,25 +157,25 @@ static int clk_mt8173_apmixed_probe(struct platform_device *pdev)
 	}
 
 	fhctl_parse_dt(fhctl_node, pllfhs, ARRAY_SIZE(pllfhs));
-	r = mtk_clk_register_pllfhs(node, plls, ARRAY_SIZE(plls),
-				    pllfhs, ARRAY_SIZE(pllfhs), clk_data);
+	r = mtk_clk_register_pllfhs(dev, plls, ARRAY_SIZE(plls), pllfhs,
+				    ARRAY_SIZE(pllfhs), clk_data);
 	if (r)
 		goto free_clk_data;
 
 	hw = mtk_clk_register_ref2usb_tx("ref2usb_tx", "clk26m", base + REGOFF_REF2USB);
 	if (IS_ERR(hw)) {
 		r = PTR_ERR(hw);
-		dev_err(&pdev->dev, "Failed to register ref2usb_tx: %d\n", r);
+		dev_err(dev, "Failed to register ref2usb_tx: %d\n", r);
 		goto unregister_plls;
 	}
 	clk_data->hws[CLK_APMIXED_REF2USB_TX] = hw;
 
-	hw = devm_clk_hw_register_divider(&pdev->dev, "hdmi_ref", "tvdpll_594m", 0,
+	hw = devm_clk_hw_register_divider(dev, "hdmi_ref", "tvdpll_594m", 0,
 					  base + REGOFF_HDMI_REF, 16, 3,
 					  CLK_DIVIDER_POWER_OF_TWO, NULL);
 	clk_data->hws[CLK_APMIXED_HDMI_REF] = hw;
 
-	r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
+	r = of_clk_add_hw_provider(dev->of_node, of_clk_hw_onecell_get, clk_data);
 	if (r)
 		goto unregister_ref2usb;
 
diff --git a/drivers/clk/mediatek/clk-mt8186-apmixedsys.c b/drivers/clk/mediatek/clk-mt8186-apmixedsys.c
index 4b2b16578232d986f78deed4778c5fab7f460184..d35dd2632e43ab535b32b8b99f8d75de02d56fe2 100644
--- a/drivers/clk/mediatek/clk-mt8186-apmixedsys.c
+++ b/drivers/clk/mediatek/clk-mt8186-apmixedsys.c
@@ -151,7 +151,7 @@ static int clk_mt8186_apmixed_probe(struct platform_device *pdev)
 
 	fhctl_parse_dt(fhctl_node, pllfhs, ARRAY_SIZE(pllfhs));
 
-	r = mtk_clk_register_pllfhs(node, plls, ARRAY_SIZE(plls),
+	r = mtk_clk_register_pllfhs(&pdev->dev, plls, ARRAY_SIZE(plls),
 				    pllfhs, ARRAY_SIZE(pllfhs), clk_data);
 	if (r)
 		goto free_apmixed_data;
diff --git a/drivers/clk/mediatek/clk-mt8192-apmixedsys.c b/drivers/clk/mediatek/clk-mt8192-apmixedsys.c
index 0b66a27e4d5ac68f09dc6a4197fd84ef82342df9..b0563a285bd666d492a7fa940733aad1ab1a0bae 100644
--- a/drivers/clk/mediatek/clk-mt8192-apmixedsys.c
+++ b/drivers/clk/mediatek/clk-mt8192-apmixedsys.c
@@ -162,7 +162,7 @@ static int clk_mt8192_apmixed_probe(struct platform_device *pdev)
 
 	fhctl_parse_dt(fhctl_node, pllfhs, ARRAY_SIZE(pllfhs));
 
-	r = mtk_clk_register_pllfhs(node, plls, ARRAY_SIZE(plls),
+	r = mtk_clk_register_pllfhs(&pdev->dev, plls, ARRAY_SIZE(plls),
 				    pllfhs, ARRAY_SIZE(pllfhs), clk_data);
 	if (r)
 		goto free_clk_data;
diff --git a/drivers/clk/mediatek/clk-mt8195-apmixedsys.c b/drivers/clk/mediatek/clk-mt8195-apmixedsys.c
index 282a3137dc89419a6d0b574fd549cee941687900..44917ab034c56f01ef02d1957f17eb0655438d75 100644
--- a/drivers/clk/mediatek/clk-mt8195-apmixedsys.c
+++ b/drivers/clk/mediatek/clk-mt8195-apmixedsys.c
@@ -181,7 +181,7 @@ static int clk_mt8195_apmixed_probe(struct platform_device *pdev)
 
 	fhctl_parse_dt(fhctl_node, pllfhs, ARRAY_SIZE(pllfhs));
 
-	r = mtk_clk_register_pllfhs(node, plls, ARRAY_SIZE(plls),
+	r = mtk_clk_register_pllfhs(&pdev->dev, plls, ARRAY_SIZE(plls),
 				    pllfhs, ARRAY_SIZE(pllfhs), clk_data);
 	if (r)
 		goto free_apmixed_data;
diff --git a/drivers/clk/mediatek/clk-pllfh.c b/drivers/clk/mediatek/clk-pllfh.c
index 62bfe4a480f14a0a742fb094aff0e6d1a79fe0c3..8ad11023d91127e88900bc6bcabbaeafb1e00664 100644
--- a/drivers/clk/mediatek/clk-pllfh.c
+++ b/drivers/clk/mediatek/clk-pllfh.c
@@ -10,6 +10,7 @@
 #include <linux/slab.h>
 #include <linux/clkdev.h>
 #include <linux/delay.h>
+#include <linux/device.h>
 
 #include "clk-mtk.h"
 #include "clk-pllfh.h"
@@ -149,7 +150,7 @@ static bool fhctl_is_supported_and_enabled(const struct mtk_pllfh_data *pllfh)
 }
 
 static struct clk_hw *
-mtk_clk_register_pllfh(const struct mtk_pll_data *pll_data,
+mtk_clk_register_pllfh(struct device *dev, const struct mtk_pll_data *pll_data,
 		       struct mtk_pllfh_data *pllfh_data, void __iomem *base)
 {
 	struct clk_hw *hw;
@@ -166,6 +167,8 @@ mtk_clk_register_pllfh(const struct mtk_pll_data *pll_data,
 		goto out;
 	}
 
+	fh->clk_pll.dev = dev;
+
 	hw = mtk_clk_register_pll_ops(&fh->clk_pll, pll_data, base,
 				      &mtk_pllfh_ops);
 
@@ -194,7 +197,7 @@ static void mtk_clk_unregister_pllfh(struct clk_hw *hw)
 	kfree(fh);
 }
 
-int mtk_clk_register_pllfhs(struct device_node *node,
+int mtk_clk_register_pllfhs(struct device *dev,
 			    const struct mtk_pll_data *plls, int num_plls,
 			    struct mtk_pllfh_data *pllfhs, int num_fhs,
 			    struct clk_hw_onecell_data *clk_data)
@@ -203,7 +206,7 @@ int mtk_clk_register_pllfhs(struct device_node *node,
 	int i;
 	struct clk_hw *hw;
 
-	base = of_iomap(node, 0);
+	base = of_iomap(dev->of_node, 0);
 	if (!base) {
 		pr_err("%s(): ioremap failed\n", __func__);
 		return -EINVAL;
@@ -218,9 +221,9 @@ int mtk_clk_register_pllfhs(struct device_node *node,
 		use_fhctl = fhctl_is_supported_and_enabled(pllfh);
 
 		if (use_fhctl)
-			hw = mtk_clk_register_pllfh(pll, pllfh, base);
+			hw = mtk_clk_register_pllfh(dev, pll, pllfh, base);
 		else
-			hw = mtk_clk_register_pll(NULL, pll, base);
+			hw = mtk_clk_register_pll(dev, pll, base);
 
 		if (IS_ERR(hw)) {
 			pr_err("Failed to register %s clk %s: %ld\n",
diff --git a/drivers/clk/mediatek/clk-pllfh.h b/drivers/clk/mediatek/clk-pllfh.h
index 5f419c2ec01f988ede4e40289c6e5d5f8070ad14..a4f337acad71389f771187908882b09d0f801868 100644
--- a/drivers/clk/mediatek/clk-pllfh.h
+++ b/drivers/clk/mediatek/clk-pllfh.h
@@ -68,7 +68,7 @@ struct fh_operation {
 	int (*ssc_enable)(struct mtk_fh *fh, u32 rate);
 };
 
-int mtk_clk_register_pllfhs(struct device_node *node,
+int mtk_clk_register_pllfhs(struct device *dev,
 			    const struct mtk_pll_data *plls, int num_plls,
 			    struct mtk_pllfh_data *pllfhs, int num_pllfhs,
 			    struct clk_hw_onecell_data *clk_data);

-- 
2.51.0



^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [PATCH v2 5/5] clk: mediatek: Add mfg_eb as parent to mt8196 mfgpll clocks
  2025-10-08 16:05 [PATCH v2 0/5] MediaTek PLL Refactors and Fixes Nicolas Frattaroli
                   ` (3 preceding siblings ...)
  2025-10-08 16:05 ` [PATCH v2 4/5] clk: mediatek: Refactor pllfh registration to pass device Nicolas Frattaroli
@ 2025-10-08 16:05 ` Nicolas Frattaroli
  2025-10-09  8:22   ` AngeloGioacchino Del Regno
  4 siblings, 1 reply; 20+ messages in thread
From: Nicolas Frattaroli @ 2025-10-08 16:05 UTC (permalink / raw)
  To: AngeloGioacchino Del Regno, Michael Turquette, Stephen Boyd,
	Dong Aisheng, Matthias Brugger, Yassine Oudjana, Laura Nao,
	Nícolas F. R. A. Prado, Chia-I Wu, Chen-Yu Tsai
  Cc: kernel, linux-clk, linux-kernel, linux-arm-kernel, linux-mediatek,
	Stephen Boyd, Nicolas Frattaroli

All the MFGPLL require MFG_EB to be on for any operation on them, and
they only tick when MFG_EB is on as well, therefore making this a
parent-child relationship.

This dependency wasn't clear during the initial upstreaming of these
clock controllers, as it only made itself known when I could observe
the effects of the clock by bringing up a different piece of hardware.

Add a new PLL_PARENT_EN flag to mediatek's clk-pll.h, and check for it
when initialising the pll to then translate it into the actual
CLK_OPS_PARENT_ENABLE flag.

Then add the mfg_eb parent to the mfgpll clocks, and set the new
PLL_PARENT_EN flag.

Fixes: 03dc02f8c7dc ("clk: mediatek: Add MT8196 mfg clock support")
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
 drivers/clk/mediatek/clk-mt8196-mfg.c | 3 ++-
 drivers/clk/mediatek/clk-pll.c        | 3 +++
 drivers/clk/mediatek/clk-pll.h        | 1 +
 3 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/mediatek/clk-mt8196-mfg.c b/drivers/clk/mediatek/clk-mt8196-mfg.c
index 8e09c0f7b7548f8e286671cea2dac64530b8ce47..de6f426f148184e1bb95b5cfca590b1763fc0573 100644
--- a/drivers/clk/mediatek/clk-mt8196-mfg.c
+++ b/drivers/clk/mediatek/clk-mt8196-mfg.c
@@ -45,7 +45,7 @@
 		.en_reg = _en_reg,				\
 		.en_mask = _en_mask,				\
 		.pll_en_bit = _pll_en_bit,			\
-		.flags = _flags,				\
+		.flags = (_flags) | PLL_PARENT_EN,		\
 		.rst_bar_mask = _rst_bar_mask,			\
 		.fmax = MT8196_PLL_FMAX,			\
 		.fmin = MT8196_PLL_FMIN,			\
@@ -58,6 +58,7 @@
 		.pcw_shift = _pcw_shift,			\
 		.pcwbits = _pcwbits,				\
 		.pcwibits = MT8196_INTEGER_BITS,		\
+		.parent_name = "mfg_eb",			\
 	}
 
 static const struct mtk_pll_data mfg_ao_plls[] = {
diff --git a/drivers/clk/mediatek/clk-pll.c b/drivers/clk/mediatek/clk-pll.c
index c4f9c06e5133dbc5902f261353c197fbde95e54d..0f3759fcd9d0228c23f4916d041d17b731a6c838 100644
--- a/drivers/clk/mediatek/clk-pll.c
+++ b/drivers/clk/mediatek/clk-pll.c
@@ -359,6 +359,9 @@ struct clk_hw *mtk_clk_register_pll_ops(struct mtk_clk_pll *pll,
 
 	init.name = data->name;
 	init.flags = (data->flags & PLL_AO) ? CLK_IS_CRITICAL : 0;
+	if (data->flags & PLL_PARENT_EN)
+		init.flags |= CLK_OPS_PARENT_ENABLE;
+
 	init.ops = pll_ops;
 	if (data->parent_name)
 		init.parent_names = &data->parent_name;
diff --git a/drivers/clk/mediatek/clk-pll.h b/drivers/clk/mediatek/clk-pll.h
index 0f2a1d19eea78b7390b221af47016eb9897f3596..492cad8ff80ba31a78a96085285cb938e9b978e9 100644
--- a/drivers/clk/mediatek/clk-pll.h
+++ b/drivers/clk/mediatek/clk-pll.h
@@ -21,6 +21,7 @@ struct mtk_pll_div_table {
 
 #define HAVE_RST_BAR	BIT(0)
 #define PLL_AO		BIT(1)
+#define PLL_PARENT_EN	BIT(2)
 #define POSTDIV_MASK	GENMASK(2, 0)
 
 struct mtk_pll_data {

-- 
2.51.0



^ permalink raw reply related	[flat|nested] 20+ messages in thread

* Re: [PATCH v2 1/5] clk: Respect CLK_OPS_PARENT_ENABLE during recalc
  2025-10-08 16:05 ` [PATCH v2 1/5] clk: Respect CLK_OPS_PARENT_ENABLE during recalc Nicolas Frattaroli
@ 2025-10-09  7:07   ` Chen-Yu Tsai
  2025-10-09  8:01   ` AngeloGioacchino Del Regno
  1 sibling, 0 replies; 20+ messages in thread
From: Chen-Yu Tsai @ 2025-10-09  7:07 UTC (permalink / raw)
  To: Nicolas Frattaroli
  Cc: AngeloGioacchino Del Regno, Michael Turquette, Stephen Boyd,
	Dong Aisheng, Matthias Brugger, Yassine Oudjana, Laura Nao,
	Nícolas F. R. A. Prado, Chia-I Wu, kernel, linux-clk,
	linux-kernel, linux-arm-kernel, linux-mediatek, Stephen Boyd

On Thu, Oct 9, 2025 at 12:07 AM Nicolas Frattaroli
<nicolas.frattaroli@collabora.com> wrote:
>
> When CLK_OPS_PARENT_ENABLE was introduced, it guarded various clock
> operations, such as setting the rate or switching parents. However,
> another operation that can and often does touch actual hardware state is
> recalc_rate, which may also be affected by such a dependency.
>
> Add parent enables/disables where the recalc_rate op is called directly.
>
> Fixes: fc8726a2c021 ("clk: core: support clocks which requires parents enable (part 2)")
> Fixes: a4b3518d146f ("clk: core: support clocks which requires parents enable (part 1)")
> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>

Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>

> ---
>  drivers/clk/clk.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
>
> diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
> index 85d2f2481acf360f0618a4a382fb51250e9c2fc4..1b0f9d567f48e003497afc98df0c0d2ad244eb90 100644
> --- a/drivers/clk/clk.c
> +++ b/drivers/clk/clk.c
> @@ -1921,7 +1921,14 @@ static unsigned long clk_recalc(struct clk_core *core,
>         unsigned long rate = parent_rate;
>
>         if (core->ops->recalc_rate && !clk_pm_runtime_get(core)) {
> +               if (core->flags & CLK_OPS_PARENT_ENABLE)
> +                       clk_core_prepare_enable(core->parent);
> +
>                 rate = core->ops->recalc_rate(core->hw, parent_rate);
> +
> +               if (core->flags & CLK_OPS_PARENT_ENABLE)
> +                       clk_core_disable_unprepare(core->parent);
> +
>                 clk_pm_runtime_put(core);
>         }
>         return rate;
> @@ -4031,6 +4038,9 @@ static int __clk_core_init(struct clk_core *core)
>          */
>         clk_core_update_duty_cycle_nolock(core);
>
> +       if (core->flags & CLK_OPS_PARENT_ENABLE)
> +               clk_core_prepare_enable(core->parent);
> +
>         /*
>          * Set clk's rate.  The preferred method is to use .recalc_rate.  For
>          * simple clocks and lazy developers the default fallback is to use the
> @@ -4046,6 +4056,9 @@ static int __clk_core_init(struct clk_core *core)
>                 rate = 0;
>         core->rate = core->req_rate = rate;
>
> +       if (core->flags & CLK_OPS_PARENT_ENABLE)
> +               clk_core_disable_unprepare(core->parent);
> +
>         /*
>          * Enable CLK_IS_CRITICAL clocks so newly added critical clocks
>          * don't get accidentally disabled when walking the orphan tree and
>
> --
> 2.51.0
>
>


^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v2 2/5] clk: mediatek: Refactor pll registration to pass device
  2025-10-08 16:05 ` [PATCH v2 2/5] clk: mediatek: Refactor pll registration to pass device Nicolas Frattaroli
@ 2025-10-09  7:09   ` Chen-Yu Tsai
  2025-10-09  7:19   ` Chen-Yu Tsai
  2025-10-09  8:09   ` AngeloGioacchino Del Regno
  2 siblings, 0 replies; 20+ messages in thread
From: Chen-Yu Tsai @ 2025-10-09  7:09 UTC (permalink / raw)
  To: Nicolas Frattaroli
  Cc: AngeloGioacchino Del Regno, Michael Turquette, Stephen Boyd,
	Dong Aisheng, Matthias Brugger, Yassine Oudjana, Laura Nao,
	Nícolas F. R. A. Prado, Chia-I Wu, kernel, linux-clk,
	linux-kernel, linux-arm-kernel, linux-mediatek, Stephen Boyd

On Thu, Oct 9, 2025 at 12:06 AM Nicolas Frattaroli
<nicolas.frattaroli@collabora.com> wrote:
>
> As it stands, mtk_clk_register_plls takes a struct device_node pointer
> as its first argument. This is a tragic happenstance, as it's trivial to
> get the device_node from a struct device, but the opposite not so much.
> The struct device is a much more useful thing to have passed down.
>
> Refactor mtk_clk_register_plls to take a struct device pointer instead
> of a struct device_node pointer, and fix up all users of this function.
>
> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>

Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>

Thank you for taking up this task!


^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v2 2/5] clk: mediatek: Refactor pll registration to pass device
  2025-10-08 16:05 ` [PATCH v2 2/5] clk: mediatek: Refactor pll registration to pass device Nicolas Frattaroli
  2025-10-09  7:09   ` Chen-Yu Tsai
@ 2025-10-09  7:19   ` Chen-Yu Tsai
  2025-10-09  8:09   ` AngeloGioacchino Del Regno
  2 siblings, 0 replies; 20+ messages in thread
From: Chen-Yu Tsai @ 2025-10-09  7:19 UTC (permalink / raw)
  To: Nicolas Frattaroli
  Cc: AngeloGioacchino Del Regno, Michael Turquette, Stephen Boyd,
	Dong Aisheng, Matthias Brugger, Yassine Oudjana, Laura Nao,
	Nícolas F. R. A. Prado, Chia-I Wu, kernel, linux-clk,
	linux-kernel, linux-arm-kernel, linux-mediatek, Stephen Boyd

On Thu, Oct 9, 2025 at 12:06 AM Nicolas Frattaroli
<nicolas.frattaroli@collabora.com> wrote:
>
> As it stands, mtk_clk_register_plls takes a struct device_node pointer
> as its first argument. This is a tragic happenstance, as it's trivial to
> get the device_node from a struct device, but the opposite not so much.
> The struct device is a much more useful thing to have passed down.
>
> Refactor mtk_clk_register_plls to take a struct device pointer instead
> of a struct device_node pointer, and fix up all users of this function.
>
> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> ---

Actually,

> diff --git a/drivers/clk/mediatek/clk-pll.h b/drivers/clk/mediatek/clk-pll.h
> index d71c150ce83e4bb2fe78290c2d5570a90084246d..0e2b94b9cd4b56adceee3b04e9ab24c2526471da 100644
> --- a/drivers/clk/mediatek/clk-pll.h
> +++ b/drivers/clk/mediatek/clk-pll.h
> @@ -78,9 +78,9 @@ struct mtk_clk_pll {
>         const struct mtk_pll_data *data;
>  };

Please replace the |struct device_node| forward declaration at the top
of this file with one for |struct device|.

> -int mtk_clk_register_plls(struct device_node *node,
> -                         const struct mtk_pll_data *plls, int num_plls,
> -                         struct clk_hw_onecell_data *clk_data);
> +int mtk_clk_register_plls(struct device *dev, const struct mtk_pll_data *plls,
> +                         int num_plls, struct clk_hw_onecell_data *clk_data);
> +
>  void mtk_clk_unregister_plls(const struct mtk_pll_data *plls, int num_plls,
>                              struct clk_hw_onecell_data *clk_data);
>
>
> --
> 2.51.0
>


^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v2 4/5] clk: mediatek: Refactor pllfh registration to pass device
  2025-10-08 16:05 ` [PATCH v2 4/5] clk: mediatek: Refactor pllfh registration to pass device Nicolas Frattaroli
@ 2025-10-09  7:33   ` Chen-Yu Tsai
  2025-10-10 20:06     ` Nicolas Frattaroli
  2025-10-09  8:12   ` AngeloGioacchino Del Regno
  1 sibling, 1 reply; 20+ messages in thread
From: Chen-Yu Tsai @ 2025-10-09  7:33 UTC (permalink / raw)
  To: Nicolas Frattaroli
  Cc: AngeloGioacchino Del Regno, Michael Turquette, Stephen Boyd,
	Dong Aisheng, Matthias Brugger, Yassine Oudjana, Laura Nao,
	Nícolas F. R. A. Prado, Chia-I Wu, kernel, linux-clk,
	linux-kernel, linux-arm-kernel, linux-mediatek, Stephen Boyd

On Thu, Oct 9, 2025 at 12:06 AM Nicolas Frattaroli
<nicolas.frattaroli@collabora.com> wrote:
>
> After refactoring all of PLL to pass the device, it's now fairly easy to
> refactor pllfh and its users, as pllfh registration wraps PLL
> registration.
>
> Do this refactor and move all of the pllfh users to pass the device as
> well.
>
> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> ---
>  drivers/clk/mediatek/clk-mt6795-apmixedsys.c |  2 +-
>  drivers/clk/mediatek/clk-mt8173-apmixedsys.c | 14 +++++++-------
>  drivers/clk/mediatek/clk-mt8186-apmixedsys.c |  2 +-
>  drivers/clk/mediatek/clk-mt8192-apmixedsys.c |  2 +-
>  drivers/clk/mediatek/clk-mt8195-apmixedsys.c |  2 +-
>  drivers/clk/mediatek/clk-pllfh.c             | 13 ++++++++-----
>  drivers/clk/mediatek/clk-pllfh.h             |  2 +-
>  7 files changed, 20 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/clk/mediatek/clk-mt6795-apmixedsys.c b/drivers/clk/mediatek/clk-mt6795-apmixedsys.c
> index 91665d7f125efde4941cc4de881c5b503a935529..123d5d7fea8554676364dc56f5c023e43325d516 100644
> --- a/drivers/clk/mediatek/clk-mt6795-apmixedsys.c
> +++ b/drivers/clk/mediatek/clk-mt6795-apmixedsys.c
> @@ -152,7 +152,7 @@ static int clk_mt6795_apmixed_probe(struct platform_device *pdev)
>                 return -ENOMEM;
>
>         fhctl_parse_dt(fhctl_node, pllfhs, ARRAY_SIZE(pllfhs));
> -       ret = mtk_clk_register_pllfhs(node, plls, ARRAY_SIZE(plls),
> +       ret = mtk_clk_register_pllfhs(dev, plls, ARRAY_SIZE(plls),
>                                       pllfhs, ARRAY_SIZE(pllfhs), clk_data);
>         if (ret)
>                 goto free_clk_data;
> diff --git a/drivers/clk/mediatek/clk-mt8173-apmixedsys.c b/drivers/clk/mediatek/clk-mt8173-apmixedsys.c
> index 95385bb67d5511eda3a851f81986e67eaf81e5fb..d7d416172ab35bc027ae67c163c1dc20dee857b6 100644
> --- a/drivers/clk/mediatek/clk-mt8173-apmixedsys.c
> +++ b/drivers/clk/mediatek/clk-mt8173-apmixedsys.c
> @@ -140,13 +140,13 @@ MODULE_DEVICE_TABLE(of, of_match_clk_mt8173_apmixed);
>  static int clk_mt8173_apmixed_probe(struct platform_device *pdev)
>  {
>         const u8 *fhctl_node = "mediatek,mt8173-fhctl";
> -       struct device_node *node = pdev->dev.of_node;
>         struct clk_hw_onecell_data *clk_data;
> +       struct device *dev = &pdev->dev;
>         void __iomem *base;
>         struct clk_hw *hw;
>         int r;
>
> -       base = of_iomap(node, 0);
> +       base = of_iomap(dev->of_node, 0);
>         if (!base)
>                 return -ENOMEM;
>
> @@ -157,25 +157,25 @@ static int clk_mt8173_apmixed_probe(struct platform_device *pdev)
>         }
>
>         fhctl_parse_dt(fhctl_node, pllfhs, ARRAY_SIZE(pllfhs));
> -       r = mtk_clk_register_pllfhs(node, plls, ARRAY_SIZE(plls),
> -                                   pllfhs, ARRAY_SIZE(pllfhs), clk_data);
> +       r = mtk_clk_register_pllfhs(dev, plls, ARRAY_SIZE(plls), pllfhs,
> +                                   ARRAY_SIZE(pllfhs), clk_data);
>         if (r)
>                 goto free_clk_data;
>
>         hw = mtk_clk_register_ref2usb_tx("ref2usb_tx", "clk26m", base + REGOFF_REF2USB);
>         if (IS_ERR(hw)) {
>                 r = PTR_ERR(hw);
> -               dev_err(&pdev->dev, "Failed to register ref2usb_tx: %d\n", r);
> +               dev_err(dev, "Failed to register ref2usb_tx: %d\n", r);
>                 goto unregister_plls;
>         }
>         clk_data->hws[CLK_APMIXED_REF2USB_TX] = hw;
>
> -       hw = devm_clk_hw_register_divider(&pdev->dev, "hdmi_ref", "tvdpll_594m", 0,
> +       hw = devm_clk_hw_register_divider(dev, "hdmi_ref", "tvdpll_594m", 0,
>                                           base + REGOFF_HDMI_REF, 16, 3,
>                                           CLK_DIVIDER_POWER_OF_TWO, NULL);
>         clk_data->hws[CLK_APMIXED_HDMI_REF] = hw;
>
> -       r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
> +       r = of_clk_add_hw_provider(dev->of_node, of_clk_hw_onecell_get, clk_data);
>         if (r)
>                 goto unregister_ref2usb;
>
> diff --git a/drivers/clk/mediatek/clk-mt8186-apmixedsys.c b/drivers/clk/mediatek/clk-mt8186-apmixedsys.c
> index 4b2b16578232d986f78deed4778c5fab7f460184..d35dd2632e43ab535b32b8b99f8d75de02d56fe2 100644
> --- a/drivers/clk/mediatek/clk-mt8186-apmixedsys.c
> +++ b/drivers/clk/mediatek/clk-mt8186-apmixedsys.c
> @@ -151,7 +151,7 @@ static int clk_mt8186_apmixed_probe(struct platform_device *pdev)
>
>         fhctl_parse_dt(fhctl_node, pllfhs, ARRAY_SIZE(pllfhs));
>
> -       r = mtk_clk_register_pllfhs(node, plls, ARRAY_SIZE(plls),
> +       r = mtk_clk_register_pllfhs(&pdev->dev, plls, ARRAY_SIZE(plls),
>                                     pllfhs, ARRAY_SIZE(pllfhs), clk_data);
>         if (r)
>                 goto free_apmixed_data;
> diff --git a/drivers/clk/mediatek/clk-mt8192-apmixedsys.c b/drivers/clk/mediatek/clk-mt8192-apmixedsys.c
> index 0b66a27e4d5ac68f09dc6a4197fd84ef82342df9..b0563a285bd666d492a7fa940733aad1ab1a0bae 100644
> --- a/drivers/clk/mediatek/clk-mt8192-apmixedsys.c
> +++ b/drivers/clk/mediatek/clk-mt8192-apmixedsys.c
> @@ -162,7 +162,7 @@ static int clk_mt8192_apmixed_probe(struct platform_device *pdev)
>
>         fhctl_parse_dt(fhctl_node, pllfhs, ARRAY_SIZE(pllfhs));
>
> -       r = mtk_clk_register_pllfhs(node, plls, ARRAY_SIZE(plls),
> +       r = mtk_clk_register_pllfhs(&pdev->dev, plls, ARRAY_SIZE(plls),
>                                     pllfhs, ARRAY_SIZE(pllfhs), clk_data);
>         if (r)
>                 goto free_clk_data;
> diff --git a/drivers/clk/mediatek/clk-mt8195-apmixedsys.c b/drivers/clk/mediatek/clk-mt8195-apmixedsys.c
> index 282a3137dc89419a6d0b574fd549cee941687900..44917ab034c56f01ef02d1957f17eb0655438d75 100644
> --- a/drivers/clk/mediatek/clk-mt8195-apmixedsys.c
> +++ b/drivers/clk/mediatek/clk-mt8195-apmixedsys.c
> @@ -181,7 +181,7 @@ static int clk_mt8195_apmixed_probe(struct platform_device *pdev)
>
>         fhctl_parse_dt(fhctl_node, pllfhs, ARRAY_SIZE(pllfhs));
>
> -       r = mtk_clk_register_pllfhs(node, plls, ARRAY_SIZE(plls),
> +       r = mtk_clk_register_pllfhs(&pdev->dev, plls, ARRAY_SIZE(plls),
>                                     pllfhs, ARRAY_SIZE(pllfhs), clk_data);
>         if (r)
>                 goto free_apmixed_data;
> diff --git a/drivers/clk/mediatek/clk-pllfh.c b/drivers/clk/mediatek/clk-pllfh.c
> index 62bfe4a480f14a0a742fb094aff0e6d1a79fe0c3..8ad11023d91127e88900bc6bcabbaeafb1e00664 100644
> --- a/drivers/clk/mediatek/clk-pllfh.c
> +++ b/drivers/clk/mediatek/clk-pllfh.c
> @@ -10,6 +10,7 @@
>  #include <linux/slab.h>
>  #include <linux/clkdev.h>
>  #include <linux/delay.h>
> +#include <linux/device.h>

This shouldn't be needed, as you aren't using any of the APIs.

A forward declaration of |struct device| in the header should suffice.
It should be added anyway, since the header defines data structures that
have a |struct device *| field.


ChenYu


^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v2 1/5] clk: Respect CLK_OPS_PARENT_ENABLE during recalc
  2025-10-08 16:05 ` [PATCH v2 1/5] clk: Respect CLK_OPS_PARENT_ENABLE during recalc Nicolas Frattaroli
  2025-10-09  7:07   ` Chen-Yu Tsai
@ 2025-10-09  8:01   ` AngeloGioacchino Del Regno
  1 sibling, 0 replies; 20+ messages in thread
From: AngeloGioacchino Del Regno @ 2025-10-09  8:01 UTC (permalink / raw)
  To: Nicolas Frattaroli, Michael Turquette, Stephen Boyd, Dong Aisheng,
	Matthias Brugger, Yassine Oudjana, Laura Nao,
	Nícolas F. R. A. Prado, Chia-I Wu, Chen-Yu Tsai
  Cc: kernel, linux-clk, linux-kernel, linux-arm-kernel, linux-mediatek,
	Stephen Boyd

Il 08/10/25 18:05, Nicolas Frattaroli ha scritto:
> When CLK_OPS_PARENT_ENABLE was introduced, it guarded various clock
> operations, such as setting the rate or switching parents. However,
> another operation that can and often does touch actual hardware state is
> recalc_rate, which may also be affected by such a dependency.
> 
> Add parent enables/disables where the recalc_rate op is called directly.
> 
> Fixes: fc8726a2c021 ("clk: core: support clocks which requires parents enable (part 2)")
> Fixes: a4b3518d146f ("clk: core: support clocks which requires parents enable (part 1)")
> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>




^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v2 2/5] clk: mediatek: Refactor pll registration to pass device
  2025-10-08 16:05 ` [PATCH v2 2/5] clk: mediatek: Refactor pll registration to pass device Nicolas Frattaroli
  2025-10-09  7:09   ` Chen-Yu Tsai
  2025-10-09  7:19   ` Chen-Yu Tsai
@ 2025-10-09  8:09   ` AngeloGioacchino Del Regno
  2025-10-09  8:18     ` Chen-Yu Tsai
  2 siblings, 1 reply; 20+ messages in thread
From: AngeloGioacchino Del Regno @ 2025-10-09  8:09 UTC (permalink / raw)
  To: Nicolas Frattaroli, Michael Turquette, Stephen Boyd, Dong Aisheng,
	Matthias Brugger, Yassine Oudjana, Laura Nao,
	Nícolas F. R. A. Prado, Chia-I Wu, Chen-Yu Tsai
  Cc: kernel, linux-clk, linux-kernel, linux-arm-kernel, linux-mediatek,
	Stephen Boyd

Il 08/10/25 18:05, Nicolas Frattaroli ha scritto:
> As it stands, mtk_clk_register_plls takes a struct device_node pointer
> as its first argument. This is a tragic happenstance, as it's trivial to
> get the device_node from a struct device, but the opposite not so much.
> The struct device is a much more useful thing to have passed down.
> 
> Refactor mtk_clk_register_plls to take a struct device pointer instead
> of a struct device_node pointer, and fix up all users of this function.
> 
> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> ---
>   drivers/clk/mediatek/clk-mt2701.c            | 2 +-
>   drivers/clk/mediatek/clk-mt2712-apmixedsys.c | 2 +-
>   drivers/clk/mediatek/clk-mt6735-apmixedsys.c | 4 ++--
>   drivers/clk/mediatek/clk-mt6765.c            | 2 +-
>   drivers/clk/mediatek/clk-mt6779.c            | 2 +-
>   drivers/clk/mediatek/clk-mt6797.c            | 2 +-
>   drivers/clk/mediatek/clk-mt7622-apmixedsys.c | 2 +-
>   drivers/clk/mediatek/clk-mt7629.c            | 2 +-
>   drivers/clk/mediatek/clk-mt7981-apmixed.c    | 2 +-
>   drivers/clk/mediatek/clk-mt7986-apmixed.c    | 2 +-
>   drivers/clk/mediatek/clk-mt7988-apmixed.c    | 2 +-
>   drivers/clk/mediatek/clk-mt8135-apmixedsys.c | 3 ++-
>   drivers/clk/mediatek/clk-mt8167-apmixedsys.c | 2 +-
>   drivers/clk/mediatek/clk-mt8183-apmixedsys.c | 2 +-
>   drivers/clk/mediatek/clk-mt8188-apmixedsys.c | 2 +-
>   drivers/clk/mediatek/clk-mt8195-apusys_pll.c | 3 ++-
>   drivers/clk/mediatek/clk-mt8196-apmixedsys.c | 3 ++-
>   drivers/clk/mediatek/clk-mt8196-mcu.c        | 2 +-
>   drivers/clk/mediatek/clk-mt8196-mfg.c        | 2 +-
>   drivers/clk/mediatek/clk-mt8196-vlpckgen.c   | 2 +-
>   drivers/clk/mediatek/clk-mt8365-apmixedsys.c | 2 +-
>   drivers/clk/mediatek/clk-mt8516-apmixedsys.c | 2 +-
>   drivers/clk/mediatek/clk-pll.c               | 7 ++++---
>   drivers/clk/mediatek/clk-pll.h               | 6 +++---
>   24 files changed, 33 insertions(+), 29 deletions(-)
> 

..snip..

> diff --git a/drivers/clk/mediatek/clk-pll.h b/drivers/clk/mediatek/clk-pll.h
> index d71c150ce83e4bb2fe78290c2d5570a90084246d..0e2b94b9cd4b56adceee3b04e9ab24c2526471da 100644
> --- a/drivers/clk/mediatek/clk-pll.h
> +++ b/drivers/clk/mediatek/clk-pll.h
> @@ -78,9 +78,9 @@ struct mtk_clk_pll {
>   	const struct mtk_pll_data *data;
>   };
>   

There's a forward declaration of struct device_node in this header: with this
change, that becomes unused.

Please change that to a forward declaration of struct device instead.

While at it, I'd appreciate if you could either:
  A. Remove the forward declaration for `struct clk_hw_onecell_data` and for
     `struct clk_ops` (as both come from clk-provider.h - which this already
      includes);
    ...or...
  B. Remove the inclusion of clk-provider.h and keep the forward declarations.

After which:

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

> -int mtk_clk_register_plls(struct device_node *node,
> -			  const struct mtk_pll_data *plls, int num_plls,
> -			  struct clk_hw_onecell_data *clk_data);
> +int mtk_clk_register_plls(struct device *dev, const struct mtk_pll_data *plls,
> +			  int num_plls, struct clk_hw_onecell_data *clk_data);
> +
>   void mtk_clk_unregister_plls(const struct mtk_pll_data *plls, int num_plls,
>   			     struct clk_hw_onecell_data *clk_data);
>   
> 




^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v2 3/5] clk: mediatek: Pass device to clk_hw_register for PLLs
  2025-10-08 16:05 ` [PATCH v2 3/5] clk: mediatek: Pass device to clk_hw_register for PLLs Nicolas Frattaroli
@ 2025-10-09  8:11   ` AngeloGioacchino Del Regno
  2025-10-09  8:32   ` Chen-Yu Tsai
  1 sibling, 0 replies; 20+ messages in thread
From: AngeloGioacchino Del Regno @ 2025-10-09  8:11 UTC (permalink / raw)
  To: Nicolas Frattaroli, Michael Turquette, Stephen Boyd, Dong Aisheng,
	Matthias Brugger, Yassine Oudjana, Laura Nao,
	Nícolas F. R. A. Prado, Chia-I Wu, Chen-Yu Tsai
  Cc: kernel, linux-clk, linux-kernel, linux-arm-kernel, linux-mediatek,
	Stephen Boyd

Il 08/10/25 18:05, Nicolas Frattaroli ha scritto:
> Passing the struct device pointer to clk_hw_register allows for runtime
> power management to work for the registered clock controllers. However,
> the mediatek PLL clocks do not do this.
> 
> Change this by adding a struct device pointer argument to
> mtk_clk_register_pll, and fix up the only other user of it. Also add a
> new member to the struct mtk_clk_pll for the struct device pointer,
> which is set by mtk_clk_register_pll and is used by
> mtk_clk_register_pll_ops.
> 
> If mtk_clk_register_pll is called with a NULL struct device pointer,
> then everything still works as expected; the clock core will simply
> treat them as previously, i.e. without runtime power management.
> 
> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>




^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v2 4/5] clk: mediatek: Refactor pllfh registration to pass device
  2025-10-08 16:05 ` [PATCH v2 4/5] clk: mediatek: Refactor pllfh registration to pass device Nicolas Frattaroli
  2025-10-09  7:33   ` Chen-Yu Tsai
@ 2025-10-09  8:12   ` AngeloGioacchino Del Regno
  1 sibling, 0 replies; 20+ messages in thread
From: AngeloGioacchino Del Regno @ 2025-10-09  8:12 UTC (permalink / raw)
  To: Nicolas Frattaroli, Michael Turquette, Stephen Boyd, Dong Aisheng,
	Matthias Brugger, Yassine Oudjana, Laura Nao,
	Nícolas F. R. A. Prado, Chia-I Wu, Chen-Yu Tsai
  Cc: kernel, linux-clk, linux-kernel, linux-arm-kernel, linux-mediatek,
	Stephen Boyd

Il 08/10/25 18:05, Nicolas Frattaroli ha scritto:
> After refactoring all of PLL to pass the device, it's now fairly easy to
> refactor pllfh and its users, as pllfh registration wraps PLL
> registration.
> 
> Do this refactor and move all of the pllfh users to pass the device as
> well.
> 
> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>




^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v2 2/5] clk: mediatek: Refactor pll registration to pass device
  2025-10-09  8:09   ` AngeloGioacchino Del Regno
@ 2025-10-09  8:18     ` Chen-Yu Tsai
  2025-10-09  8:52       ` AngeloGioacchino Del Regno
  2025-10-10 20:11       ` Nicolas Frattaroli
  0 siblings, 2 replies; 20+ messages in thread
From: Chen-Yu Tsai @ 2025-10-09  8:18 UTC (permalink / raw)
  To: AngeloGioacchino Del Regno
  Cc: Nicolas Frattaroli, Michael Turquette, Stephen Boyd, Dong Aisheng,
	Matthias Brugger, Yassine Oudjana, Laura Nao,
	Nícolas F. R. A. Prado, Chia-I Wu, kernel, linux-clk,
	linux-kernel, linux-arm-kernel, linux-mediatek, Stephen Boyd

On Thu, Oct 9, 2025 at 4:09 PM AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com> wrote:
>
> Il 08/10/25 18:05, Nicolas Frattaroli ha scritto:
> > As it stands, mtk_clk_register_plls takes a struct device_node pointer
> > as its first argument. This is a tragic happenstance, as it's trivial to
> > get the device_node from a struct device, but the opposite not so much.
> > The struct device is a much more useful thing to have passed down.
> >
> > Refactor mtk_clk_register_plls to take a struct device pointer instead
> > of a struct device_node pointer, and fix up all users of this function.
> >
> > Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> > ---
> >   drivers/clk/mediatek/clk-mt2701.c            | 2 +-
> >   drivers/clk/mediatek/clk-mt2712-apmixedsys.c | 2 +-
> >   drivers/clk/mediatek/clk-mt6735-apmixedsys.c | 4 ++--
> >   drivers/clk/mediatek/clk-mt6765.c            | 2 +-
> >   drivers/clk/mediatek/clk-mt6779.c            | 2 +-
> >   drivers/clk/mediatek/clk-mt6797.c            | 2 +-
> >   drivers/clk/mediatek/clk-mt7622-apmixedsys.c | 2 +-
> >   drivers/clk/mediatek/clk-mt7629.c            | 2 +-
> >   drivers/clk/mediatek/clk-mt7981-apmixed.c    | 2 +-
> >   drivers/clk/mediatek/clk-mt7986-apmixed.c    | 2 +-
> >   drivers/clk/mediatek/clk-mt7988-apmixed.c    | 2 +-
> >   drivers/clk/mediatek/clk-mt8135-apmixedsys.c | 3 ++-
> >   drivers/clk/mediatek/clk-mt8167-apmixedsys.c | 2 +-
> >   drivers/clk/mediatek/clk-mt8183-apmixedsys.c | 2 +-
> >   drivers/clk/mediatek/clk-mt8188-apmixedsys.c | 2 +-
> >   drivers/clk/mediatek/clk-mt8195-apusys_pll.c | 3 ++-
> >   drivers/clk/mediatek/clk-mt8196-apmixedsys.c | 3 ++-
> >   drivers/clk/mediatek/clk-mt8196-mcu.c        | 2 +-
> >   drivers/clk/mediatek/clk-mt8196-mfg.c        | 2 +-
> >   drivers/clk/mediatek/clk-mt8196-vlpckgen.c   | 2 +-
> >   drivers/clk/mediatek/clk-mt8365-apmixedsys.c | 2 +-
> >   drivers/clk/mediatek/clk-mt8516-apmixedsys.c | 2 +-
> >   drivers/clk/mediatek/clk-pll.c               | 7 ++++---
> >   drivers/clk/mediatek/clk-pll.h               | 6 +++---
> >   24 files changed, 33 insertions(+), 29 deletions(-)
> >
>
> ..snip..
>
> > diff --git a/drivers/clk/mediatek/clk-pll.h b/drivers/clk/mediatek/clk-pll.h
> > index d71c150ce83e4bb2fe78290c2d5570a90084246d..0e2b94b9cd4b56adceee3b04e9ab24c2526471da 100644
> > --- a/drivers/clk/mediatek/clk-pll.h
> > +++ b/drivers/clk/mediatek/clk-pll.h
> > @@ -78,9 +78,9 @@ struct mtk_clk_pll {
> >       const struct mtk_pll_data *data;
> >   };
> >
>
> There's a forward declaration of struct device_node in this header: with this
> change, that becomes unused.
>
> Please change that to a forward declaration of struct device instead.
>
> While at it, I'd appreciate if you could either:
>   A. Remove the forward declaration for `struct clk_hw_onecell_data` and for
>      `struct clk_ops` (as both come from clk-provider.h - which this already
>       includes);
>     ...or...
>   B. Remove the inclusion of clk-provider.h and keep the forward declarations.

Prefer (B) since no APIs from clk-provider.h are referenced in the header.
It is up to the implementation to directly include any and all headers it
needs.

ChenYu

> After which:
>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
>
> > -int mtk_clk_register_plls(struct device_node *node,
> > -                       const struct mtk_pll_data *plls, int num_plls,
> > -                       struct clk_hw_onecell_data *clk_data);
> > +int mtk_clk_register_plls(struct device *dev, const struct mtk_pll_data *plls,
> > +                       int num_plls, struct clk_hw_onecell_data *clk_data);
> > +
> >   void mtk_clk_unregister_plls(const struct mtk_pll_data *plls, int num_plls,
> >                            struct clk_hw_onecell_data *clk_data);
> >
> >
>
>


^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v2 5/5] clk: mediatek: Add mfg_eb as parent to mt8196 mfgpll clocks
  2025-10-08 16:05 ` [PATCH v2 5/5] clk: mediatek: Add mfg_eb as parent to mt8196 mfgpll clocks Nicolas Frattaroli
@ 2025-10-09  8:22   ` AngeloGioacchino Del Regno
  0 siblings, 0 replies; 20+ messages in thread
From: AngeloGioacchino Del Regno @ 2025-10-09  8:22 UTC (permalink / raw)
  To: Nicolas Frattaroli, Michael Turquette, Stephen Boyd, Dong Aisheng,
	Matthias Brugger, Yassine Oudjana, Laura Nao,
	Nícolas F. R. A. Prado, Chia-I Wu, Chen-Yu Tsai
  Cc: kernel, linux-clk, linux-kernel, linux-arm-kernel, linux-mediatek,
	Stephen Boyd

Il 08/10/25 18:05, Nicolas Frattaroli ha scritto:
> All the MFGPLL require MFG_EB to be on for any operation on them, and
> they only tick when MFG_EB is on as well, therefore making this a
> parent-child relationship.
> 
> This dependency wasn't clear during the initial upstreaming of these
> clock controllers, as it only made itself known when I could observe
> the effects of the clock by bringing up a different piece of hardware.
> 
> Add a new PLL_PARENT_EN flag to mediatek's clk-pll.h, and check for it
> when initialising the pll to then translate it into the actual
> CLK_OPS_PARENT_ENABLE flag.
> 
> Then add the mfg_eb parent to the mfgpll clocks, and set the new
> PLL_PARENT_EN flag.
> 
> Fixes: 03dc02f8c7dc ("clk: mediatek: Add MT8196 mfg clock support")
> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> ---
>   drivers/clk/mediatek/clk-mt8196-mfg.c | 3 ++-
>   drivers/clk/mediatek/clk-pll.c        | 3 +++
>   drivers/clk/mediatek/clk-pll.h        | 1 +
>   3 files changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/mediatek/clk-mt8196-mfg.c b/drivers/clk/mediatek/clk-mt8196-mfg.c
> index 8e09c0f7b7548f8e286671cea2dac64530b8ce47..de6f426f148184e1bb95b5cfca590b1763fc0573 100644
> --- a/drivers/clk/mediatek/clk-mt8196-mfg.c
> +++ b/drivers/clk/mediatek/clk-mt8196-mfg.c
> @@ -45,7 +45,7 @@
>   		.en_reg = _en_reg,				\
>   		.en_mask = _en_mask,				\
>   		.pll_en_bit = _pll_en_bit,			\
> -		.flags = _flags,				\
> +		.flags = (_flags) | PLL_PARENT_EN,		\

In the event that we may want, one day, maybe commonize the PLL macro to all of the
PLL drivers, can you please add the PLL_PARENT_EN to the three clocks instead of
doing it in the macro itself?

static const struct mtk_pll_data mfg_ao_plls[] = {
	PLL(CLK_MFG_AO_MFGPLL, "mfgpll", MFGPLL_CON0, MFGPLL_CON0, 0, 0,
	    PLL_PARENT_EN, BIT(0), MFGPLL_CON1, 24, 0, 0, 0,
	    MFGPLL_CON1, 0, 22),
};

static const struct mtk_pll_data mfgsc0_ao_plls[] = {
	PLL(CLK_MFGSC0_AO_MFGPLL_SC0, "mfgpll-sc0", MFGPLL_SC0_CON0,
	    MFGPLL_SC0_CON0, 0, 0, PLL_PARENT_EN, BIT(0),
	    MFGPLL_SC0_CON1, 24, 0, 0, 0, MFGPLL_SC0_CON1, 0, 22),
};

static const struct mtk_pll_data mfgsc1_ao_plls[] = {
	PLL(CLK_MFGSC1_AO_MFGPLL_SC1, "mfgpll-sc1", MFGPLL_SC1_CON0,
	    MFGPLL_SC1_CON0, 0, 0, PLL_PARENT_EN, BIT(0),
	    MFGPLL_SC1_CON1, 24, 0, 0, 0, MFGPLL_SC1_CON1, 0, 22),
};


After which,

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

>   		.rst_bar_mask = _rst_bar_mask,			\
>   		.fmax = MT8196_PLL_FMAX,			\
>   		.fmin = MT8196_PLL_FMIN,			\
> @@ -58,6 +58,7 @@
>   		.pcw_shift = _pcw_shift,			\
>   		.pcwbits = _pcwbits,				\
>   		.pcwibits = MT8196_INTEGER_BITS,		\
> +		.parent_name = "mfg_eb",			\
>   	}
>   
>   static const struct mtk_pll_data mfg_ao_plls[] = {
> diff --git a/drivers/clk/mediatek/clk-pll.c b/drivers/clk/mediatek/clk-pll.c
> index c4f9c06e5133dbc5902f261353c197fbde95e54d..0f3759fcd9d0228c23f4916d041d17b731a6c838 100644
> --- a/drivers/clk/mediatek/clk-pll.c
> +++ b/drivers/clk/mediatek/clk-pll.c
> @@ -359,6 +359,9 @@ struct clk_hw *mtk_clk_register_pll_ops(struct mtk_clk_pll *pll,
>   
>   	init.name = data->name;
>   	init.flags = (data->flags & PLL_AO) ? CLK_IS_CRITICAL : 0;
> +	if (data->flags & PLL_PARENT_EN)
> +		init.flags |= CLK_OPS_PARENT_ENABLE;
> +
>   	init.ops = pll_ops;
>   	if (data->parent_name)
>   		init.parent_names = &data->parent_name;
> diff --git a/drivers/clk/mediatek/clk-pll.h b/drivers/clk/mediatek/clk-pll.h
> index 0f2a1d19eea78b7390b221af47016eb9897f3596..492cad8ff80ba31a78a96085285cb938e9b978e9 100644
> --- a/drivers/clk/mediatek/clk-pll.h
> +++ b/drivers/clk/mediatek/clk-pll.h
> @@ -21,6 +21,7 @@ struct mtk_pll_div_table {
>   
>   #define HAVE_RST_BAR	BIT(0)
>   #define PLL_AO		BIT(1)
> +#define PLL_PARENT_EN	BIT(2)
>   #define POSTDIV_MASK	GENMASK(2, 0)
>   
>   struct mtk_pll_data {
> 



^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v2 3/5] clk: mediatek: Pass device to clk_hw_register for PLLs
  2025-10-08 16:05 ` [PATCH v2 3/5] clk: mediatek: Pass device to clk_hw_register for PLLs Nicolas Frattaroli
  2025-10-09  8:11   ` AngeloGioacchino Del Regno
@ 2025-10-09  8:32   ` Chen-Yu Tsai
  1 sibling, 0 replies; 20+ messages in thread
From: Chen-Yu Tsai @ 2025-10-09  8:32 UTC (permalink / raw)
  To: Nicolas Frattaroli
  Cc: AngeloGioacchino Del Regno, Michael Turquette, Stephen Boyd,
	Dong Aisheng, Matthias Brugger, Yassine Oudjana, Laura Nao,
	Nícolas F. R. A. Prado, Chia-I Wu, kernel, linux-clk,
	linux-kernel, linux-arm-kernel, linux-mediatek, Stephen Boyd

On Thu, Oct 9, 2025 at 12:06 AM Nicolas Frattaroli
<nicolas.frattaroli@collabora.com> wrote:
>
> Passing the struct device pointer to clk_hw_register allows for runtime
> power management to work for the registered clock controllers. However,
> the mediatek PLL clocks do not do this.
>
> Change this by adding a struct device pointer argument to
> mtk_clk_register_pll, and fix up the only other user of it. Also add a
> new member to the struct mtk_clk_pll for the struct device pointer,
> which is set by mtk_clk_register_pll and is used by
> mtk_clk_register_pll_ops.
>
> If mtk_clk_register_pll is called with a NULL struct device pointer,
> then everything still works as expected; the clock core will simply
> treat them as previously, i.e. without runtime power management.
>
> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>

Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>


^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v2 2/5] clk: mediatek: Refactor pll registration to pass device
  2025-10-09  8:18     ` Chen-Yu Tsai
@ 2025-10-09  8:52       ` AngeloGioacchino Del Regno
  2025-10-10 20:11       ` Nicolas Frattaroli
  1 sibling, 0 replies; 20+ messages in thread
From: AngeloGioacchino Del Regno @ 2025-10-09  8:52 UTC (permalink / raw)
  To: Chen-Yu Tsai
  Cc: Nicolas Frattaroli, Michael Turquette, Stephen Boyd, Dong Aisheng,
	Matthias Brugger, Yassine Oudjana, Laura Nao,
	Nícolas F. R. A. Prado, Chia-I Wu, kernel, linux-clk,
	linux-kernel, linux-arm-kernel, linux-mediatek, Stephen Boyd

Il 09/10/25 10:18, Chen-Yu Tsai ha scritto:
> On Thu, Oct 9, 2025 at 4:09 PM AngeloGioacchino Del Regno
> <angelogioacchino.delregno@collabora.com> wrote:
>>
>> Il 08/10/25 18:05, Nicolas Frattaroli ha scritto:
>>> As it stands, mtk_clk_register_plls takes a struct device_node pointer
>>> as its first argument. This is a tragic happenstance, as it's trivial to
>>> get the device_node from a struct device, but the opposite not so much.
>>> The struct device is a much more useful thing to have passed down.
>>>
>>> Refactor mtk_clk_register_plls to take a struct device pointer instead
>>> of a struct device_node pointer, and fix up all users of this function.
>>>
>>> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
>>> ---
>>>    drivers/clk/mediatek/clk-mt2701.c            | 2 +-
>>>    drivers/clk/mediatek/clk-mt2712-apmixedsys.c | 2 +-
>>>    drivers/clk/mediatek/clk-mt6735-apmixedsys.c | 4 ++--
>>>    drivers/clk/mediatek/clk-mt6765.c            | 2 +-
>>>    drivers/clk/mediatek/clk-mt6779.c            | 2 +-
>>>    drivers/clk/mediatek/clk-mt6797.c            | 2 +-
>>>    drivers/clk/mediatek/clk-mt7622-apmixedsys.c | 2 +-
>>>    drivers/clk/mediatek/clk-mt7629.c            | 2 +-
>>>    drivers/clk/mediatek/clk-mt7981-apmixed.c    | 2 +-
>>>    drivers/clk/mediatek/clk-mt7986-apmixed.c    | 2 +-
>>>    drivers/clk/mediatek/clk-mt7988-apmixed.c    | 2 +-
>>>    drivers/clk/mediatek/clk-mt8135-apmixedsys.c | 3 ++-
>>>    drivers/clk/mediatek/clk-mt8167-apmixedsys.c | 2 +-
>>>    drivers/clk/mediatek/clk-mt8183-apmixedsys.c | 2 +-
>>>    drivers/clk/mediatek/clk-mt8188-apmixedsys.c | 2 +-
>>>    drivers/clk/mediatek/clk-mt8195-apusys_pll.c | 3 ++-
>>>    drivers/clk/mediatek/clk-mt8196-apmixedsys.c | 3 ++-
>>>    drivers/clk/mediatek/clk-mt8196-mcu.c        | 2 +-
>>>    drivers/clk/mediatek/clk-mt8196-mfg.c        | 2 +-
>>>    drivers/clk/mediatek/clk-mt8196-vlpckgen.c   | 2 +-
>>>    drivers/clk/mediatek/clk-mt8365-apmixedsys.c | 2 +-
>>>    drivers/clk/mediatek/clk-mt8516-apmixedsys.c | 2 +-
>>>    drivers/clk/mediatek/clk-pll.c               | 7 ++++---
>>>    drivers/clk/mediatek/clk-pll.h               | 6 +++---
>>>    24 files changed, 33 insertions(+), 29 deletions(-)
>>>
>>
>> ..snip..
>>
>>> diff --git a/drivers/clk/mediatek/clk-pll.h b/drivers/clk/mediatek/clk-pll.h
>>> index d71c150ce83e4bb2fe78290c2d5570a90084246d..0e2b94b9cd4b56adceee3b04e9ab24c2526471da 100644
>>> --- a/drivers/clk/mediatek/clk-pll.h
>>> +++ b/drivers/clk/mediatek/clk-pll.h
>>> @@ -78,9 +78,9 @@ struct mtk_clk_pll {
>>>        const struct mtk_pll_data *data;
>>>    };
>>>
>>
>> There's a forward declaration of struct device_node in this header: with this
>> change, that becomes unused.
>>
>> Please change that to a forward declaration of struct device instead.
>>
>> While at it, I'd appreciate if you could either:
>>    A. Remove the forward declaration for `struct clk_hw_onecell_data` and for
>>       `struct clk_ops` (as both come from clk-provider.h - which this already
>>        includes);
>>      ...or...
>>    B. Remove the inclusion of clk-provider.h and keep the forward declarations.
> 
> Prefer (B) since no APIs from clk-provider.h are referenced in the header.
> It is up to the implementation to directly include any and all headers it
> needs.
> 

Me too. Also because other drivers are doing that.
I didn't have strong opinions about this anyway, so I didn't want to influence the
decision too much - but at this point I just said it so I could've said it before
anyway :-P

Angelo

> ChenYu
> 
>> After which:
>>
>> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
>>
>>> -int mtk_clk_register_plls(struct device_node *node,
>>> -                       const struct mtk_pll_data *plls, int num_plls,
>>> -                       struct clk_hw_onecell_data *clk_data);
>>> +int mtk_clk_register_plls(struct device *dev, const struct mtk_pll_data *plls,
>>> +                       int num_plls, struct clk_hw_onecell_data *clk_data);
>>> +
>>>    void mtk_clk_unregister_plls(const struct mtk_pll_data *plls, int num_plls,
>>>                             struct clk_hw_onecell_data *clk_data);
>>>
>>>
>>
>>


-- 
AngeloGioacchino Del Regno
Senior Software Engineer

Collabora Ltd.
Platinum Building, St John's Innovation Park, Cambridge CB4 0DS, UK
Registered in England & Wales, no. 5513718


^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v2 4/5] clk: mediatek: Refactor pllfh registration to pass device
  2025-10-09  7:33   ` Chen-Yu Tsai
@ 2025-10-10 20:06     ` Nicolas Frattaroli
  0 siblings, 0 replies; 20+ messages in thread
From: Nicolas Frattaroli @ 2025-10-10 20:06 UTC (permalink / raw)
  To: Chen-Yu Tsai
  Cc: AngeloGioacchino Del Regno, Michael Turquette, Stephen Boyd,
	Dong Aisheng, Matthias Brugger, Yassine Oudjana, Laura Nao,
	Nícolas F. R. A. Prado, Chia-I Wu, kernel, linux-clk,
	linux-kernel, linux-arm-kernel, linux-mediatek

On Thursday, 9 October 2025 09:33:22 Central European Summer Time Chen-Yu Tsai wrote:
> On Thu, Oct 9, 2025 at 12:06 AM Nicolas Frattaroli
> <nicolas.frattaroli@collabora.com> wrote:
> >
> > After refactoring all of PLL to pass the device, it's now fairly easy to
> > refactor pllfh and its users, as pllfh registration wraps PLL
> > registration.
> >
> > Do this refactor and move all of the pllfh users to pass the device as
> > well.
> >
> > Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> > ---
> >  drivers/clk/mediatek/clk-mt6795-apmixedsys.c |  2 +-
> >  drivers/clk/mediatek/clk-mt8173-apmixedsys.c | 14 +++++++-------
> >  drivers/clk/mediatek/clk-mt8186-apmixedsys.c |  2 +-
> >  drivers/clk/mediatek/clk-mt8192-apmixedsys.c |  2 +-
> >  drivers/clk/mediatek/clk-mt8195-apmixedsys.c |  2 +-
> >  drivers/clk/mediatek/clk-pllfh.c             | 13 ++++++++-----
> >  drivers/clk/mediatek/clk-pllfh.h             |  2 +-
> >  7 files changed, 20 insertions(+), 17 deletions(-)
> >
> > diff --git a/drivers/clk/mediatek/clk-mt6795-apmixedsys.c b/drivers/clk/mediatek/clk-mt6795-apmixedsys.c
> > index 91665d7f125efde4941cc4de881c5b503a935529..123d5d7fea8554676364dc56f5c023e43325d516 100644
> > --- a/drivers/clk/mediatek/clk-mt6795-apmixedsys.c
> > +++ b/drivers/clk/mediatek/clk-mt6795-apmixedsys.c
> > @@ -152,7 +152,7 @@ static int clk_mt6795_apmixed_probe(struct platform_device *pdev)
> >                 return -ENOMEM;
> >
> >         fhctl_parse_dt(fhctl_node, pllfhs, ARRAY_SIZE(pllfhs));
> > -       ret = mtk_clk_register_pllfhs(node, plls, ARRAY_SIZE(plls),
> > +       ret = mtk_clk_register_pllfhs(dev, plls, ARRAY_SIZE(plls),
> >                                       pllfhs, ARRAY_SIZE(pllfhs), clk_data);
> >         if (ret)
> >                 goto free_clk_data;
> > diff --git a/drivers/clk/mediatek/clk-mt8173-apmixedsys.c b/drivers/clk/mediatek/clk-mt8173-apmixedsys.c
> > index 95385bb67d5511eda3a851f81986e67eaf81e5fb..d7d416172ab35bc027ae67c163c1dc20dee857b6 100644
> > --- a/drivers/clk/mediatek/clk-mt8173-apmixedsys.c
> > +++ b/drivers/clk/mediatek/clk-mt8173-apmixedsys.c
> > @@ -140,13 +140,13 @@ MODULE_DEVICE_TABLE(of, of_match_clk_mt8173_apmixed);
> >  static int clk_mt8173_apmixed_probe(struct platform_device *pdev)
> >  {
> >         const u8 *fhctl_node = "mediatek,mt8173-fhctl";
> > -       struct device_node *node = pdev->dev.of_node;
> >         struct clk_hw_onecell_data *clk_data;
> > +       struct device *dev = &pdev->dev;
> >         void __iomem *base;
> >         struct clk_hw *hw;
> >         int r;
> >
> > -       base = of_iomap(node, 0);
> > +       base = of_iomap(dev->of_node, 0);
> >         if (!base)
> >                 return -ENOMEM;
> >
> > @@ -157,25 +157,25 @@ static int clk_mt8173_apmixed_probe(struct platform_device *pdev)
> >         }
> >
> >         fhctl_parse_dt(fhctl_node, pllfhs, ARRAY_SIZE(pllfhs));
> > -       r = mtk_clk_register_pllfhs(node, plls, ARRAY_SIZE(plls),
> > -                                   pllfhs, ARRAY_SIZE(pllfhs), clk_data);
> > +       r = mtk_clk_register_pllfhs(dev, plls, ARRAY_SIZE(plls), pllfhs,
> > +                                   ARRAY_SIZE(pllfhs), clk_data);
> >         if (r)
> >                 goto free_clk_data;
> >
> >         hw = mtk_clk_register_ref2usb_tx("ref2usb_tx", "clk26m", base + REGOFF_REF2USB);
> >         if (IS_ERR(hw)) {
> >                 r = PTR_ERR(hw);
> > -               dev_err(&pdev->dev, "Failed to register ref2usb_tx: %d\n", r);
> > +               dev_err(dev, "Failed to register ref2usb_tx: %d\n", r);
> >                 goto unregister_plls;
> >         }
> >         clk_data->hws[CLK_APMIXED_REF2USB_TX] = hw;
> >
> > -       hw = devm_clk_hw_register_divider(&pdev->dev, "hdmi_ref", "tvdpll_594m", 0,
> > +       hw = devm_clk_hw_register_divider(dev, "hdmi_ref", "tvdpll_594m", 0,
> >                                           base + REGOFF_HDMI_REF, 16, 3,
> >                                           CLK_DIVIDER_POWER_OF_TWO, NULL);
> >         clk_data->hws[CLK_APMIXED_HDMI_REF] = hw;
> >
> > -       r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
> > +       r = of_clk_add_hw_provider(dev->of_node, of_clk_hw_onecell_get, clk_data);
> >         if (r)
> >                 goto unregister_ref2usb;
> >
> > diff --git a/drivers/clk/mediatek/clk-mt8186-apmixedsys.c b/drivers/clk/mediatek/clk-mt8186-apmixedsys.c
> > index 4b2b16578232d986f78deed4778c5fab7f460184..d35dd2632e43ab535b32b8b99f8d75de02d56fe2 100644
> > --- a/drivers/clk/mediatek/clk-mt8186-apmixedsys.c
> > +++ b/drivers/clk/mediatek/clk-mt8186-apmixedsys.c
> > @@ -151,7 +151,7 @@ static int clk_mt8186_apmixed_probe(struct platform_device *pdev)
> >
> >         fhctl_parse_dt(fhctl_node, pllfhs, ARRAY_SIZE(pllfhs));
> >
> > -       r = mtk_clk_register_pllfhs(node, plls, ARRAY_SIZE(plls),
> > +       r = mtk_clk_register_pllfhs(&pdev->dev, plls, ARRAY_SIZE(plls),
> >                                     pllfhs, ARRAY_SIZE(pllfhs), clk_data);
> >         if (r)
> >                 goto free_apmixed_data;
> > diff --git a/drivers/clk/mediatek/clk-mt8192-apmixedsys.c b/drivers/clk/mediatek/clk-mt8192-apmixedsys.c
> > index 0b66a27e4d5ac68f09dc6a4197fd84ef82342df9..b0563a285bd666d492a7fa940733aad1ab1a0bae 100644
> > --- a/drivers/clk/mediatek/clk-mt8192-apmixedsys.c
> > +++ b/drivers/clk/mediatek/clk-mt8192-apmixedsys.c
> > @@ -162,7 +162,7 @@ static int clk_mt8192_apmixed_probe(struct platform_device *pdev)
> >
> >         fhctl_parse_dt(fhctl_node, pllfhs, ARRAY_SIZE(pllfhs));
> >
> > -       r = mtk_clk_register_pllfhs(node, plls, ARRAY_SIZE(plls),
> > +       r = mtk_clk_register_pllfhs(&pdev->dev, plls, ARRAY_SIZE(plls),
> >                                     pllfhs, ARRAY_SIZE(pllfhs), clk_data);
> >         if (r)
> >                 goto free_clk_data;
> > diff --git a/drivers/clk/mediatek/clk-mt8195-apmixedsys.c b/drivers/clk/mediatek/clk-mt8195-apmixedsys.c
> > index 282a3137dc89419a6d0b574fd549cee941687900..44917ab034c56f01ef02d1957f17eb0655438d75 100644
> > --- a/drivers/clk/mediatek/clk-mt8195-apmixedsys.c
> > +++ b/drivers/clk/mediatek/clk-mt8195-apmixedsys.c
> > @@ -181,7 +181,7 @@ static int clk_mt8195_apmixed_probe(struct platform_device *pdev)
> >
> >         fhctl_parse_dt(fhctl_node, pllfhs, ARRAY_SIZE(pllfhs));
> >
> > -       r = mtk_clk_register_pllfhs(node, plls, ARRAY_SIZE(plls),
> > +       r = mtk_clk_register_pllfhs(&pdev->dev, plls, ARRAY_SIZE(plls),
> >                                     pllfhs, ARRAY_SIZE(pllfhs), clk_data);
> >         if (r)
> >                 goto free_apmixed_data;
> > diff --git a/drivers/clk/mediatek/clk-pllfh.c b/drivers/clk/mediatek/clk-pllfh.c
> > index 62bfe4a480f14a0a742fb094aff0e6d1a79fe0c3..8ad11023d91127e88900bc6bcabbaeafb1e00664 100644
> > --- a/drivers/clk/mediatek/clk-pllfh.c
> > +++ b/drivers/clk/mediatek/clk-pllfh.c
> > @@ -10,6 +10,7 @@
> >  #include <linux/slab.h>
> >  #include <linux/clkdev.h>
> >  #include <linux/delay.h>
> > +#include <linux/device.h>
> 
> This shouldn't be needed, as you aren't using any of the APIs.
> 
> A forward declaration of |struct device| in the header should suffice.
> It should be added anyway, since the header defines data structures that
> have a |struct device *| field.
> 
> 
> ChenYu
> 


  drivers/clk/mediatek/clk-pllfh.c:208:21: error: incomplete definition of type 'struct device'
    208 |         base = of_iomap(dev->of_node, 0);
        |                         ~~~^

Alas, it is needed, otherwise we can't get the of_node. dev_of_node
is also defined in device.h, so it works out to the same difference.

Kind regards,
Nicolas Frattaroli




^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v2 2/5] clk: mediatek: Refactor pll registration to pass device
  2025-10-09  8:18     ` Chen-Yu Tsai
  2025-10-09  8:52       ` AngeloGioacchino Del Regno
@ 2025-10-10 20:11       ` Nicolas Frattaroli
  1 sibling, 0 replies; 20+ messages in thread
From: Nicolas Frattaroli @ 2025-10-10 20:11 UTC (permalink / raw)
  To: AngeloGioacchino Del Regno, Chen-Yu Tsai
  Cc: Michael Turquette, Stephen Boyd, Dong Aisheng, Matthias Brugger,
	Yassine Oudjana, Laura Nao, Nícolas F. R. A. Prado,
	Chia-I Wu, kernel, linux-clk, linux-kernel, linux-arm-kernel,
	linux-mediatek

On Thursday, 9 October 2025 10:18:42 Central European Summer Time Chen-Yu Tsai wrote:
> On Thu, Oct 9, 2025 at 4:09 PM AngeloGioacchino Del Regno
> <angelogioacchino.delregno@collabora.com> wrote:
> >
> > Il 08/10/25 18:05, Nicolas Frattaroli ha scritto:
> > > As it stands, mtk_clk_register_plls takes a struct device_node pointer
> > > as its first argument. This is a tragic happenstance, as it's trivial to
> > > get the device_node from a struct device, but the opposite not so much.
> > > The struct device is a much more useful thing to have passed down.
> > >
> > > Refactor mtk_clk_register_plls to take a struct device pointer instead
> > > of a struct device_node pointer, and fix up all users of this function.
> > >
> > > Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> > > ---
> > >   drivers/clk/mediatek/clk-mt2701.c            | 2 +-
> > >   drivers/clk/mediatek/clk-mt2712-apmixedsys.c | 2 +-
> > >   drivers/clk/mediatek/clk-mt6735-apmixedsys.c | 4 ++--
> > >   drivers/clk/mediatek/clk-mt6765.c            | 2 +-
> > >   drivers/clk/mediatek/clk-mt6779.c            | 2 +-
> > >   drivers/clk/mediatek/clk-mt6797.c            | 2 +-
> > >   drivers/clk/mediatek/clk-mt7622-apmixedsys.c | 2 +-
> > >   drivers/clk/mediatek/clk-mt7629.c            | 2 +-
> > >   drivers/clk/mediatek/clk-mt7981-apmixed.c    | 2 +-
> > >   drivers/clk/mediatek/clk-mt7986-apmixed.c    | 2 +-
> > >   drivers/clk/mediatek/clk-mt7988-apmixed.c    | 2 +-
> > >   drivers/clk/mediatek/clk-mt8135-apmixedsys.c | 3 ++-
> > >   drivers/clk/mediatek/clk-mt8167-apmixedsys.c | 2 +-
> > >   drivers/clk/mediatek/clk-mt8183-apmixedsys.c | 2 +-
> > >   drivers/clk/mediatek/clk-mt8188-apmixedsys.c | 2 +-
> > >   drivers/clk/mediatek/clk-mt8195-apusys_pll.c | 3 ++-
> > >   drivers/clk/mediatek/clk-mt8196-apmixedsys.c | 3 ++-
> > >   drivers/clk/mediatek/clk-mt8196-mcu.c        | 2 +-
> > >   drivers/clk/mediatek/clk-mt8196-mfg.c        | 2 +-
> > >   drivers/clk/mediatek/clk-mt8196-vlpckgen.c   | 2 +-
> > >   drivers/clk/mediatek/clk-mt8365-apmixedsys.c | 2 +-
> > >   drivers/clk/mediatek/clk-mt8516-apmixedsys.c | 2 +-
> > >   drivers/clk/mediatek/clk-pll.c               | 7 ++++---
> > >   drivers/clk/mediatek/clk-pll.h               | 6 +++---
> > >   24 files changed, 33 insertions(+), 29 deletions(-)
> > >
> >
> > ..snip..
> >
> > > diff --git a/drivers/clk/mediatek/clk-pll.h b/drivers/clk/mediatek/clk-pll.h
> > > index d71c150ce83e4bb2fe78290c2d5570a90084246d..0e2b94b9cd4b56adceee3b04e9ab24c2526471da 100644
> > > --- a/drivers/clk/mediatek/clk-pll.h
> > > +++ b/drivers/clk/mediatek/clk-pll.h
> > > @@ -78,9 +78,9 @@ struct mtk_clk_pll {
> > >       const struct mtk_pll_data *data;
> > >   };
> > >
> >
> > There's a forward declaration of struct device_node in this header: with this
> > change, that becomes unused.
> >
> > Please change that to a forward declaration of struct device instead.
> >
> > While at it, I'd appreciate if you could either:
> >   A. Remove the forward declaration for `struct clk_hw_onecell_data` and for
> >      `struct clk_ops` (as both come from clk-provider.h - which this already
> >       includes);
> >     ...or...
> >   B. Remove the inclusion of clk-provider.h and keep the forward declarations.
> 
> Prefer (B) since no APIs from clk-provider.h are referenced in the header.
> It is up to the implementation to directly include any and all headers it
> needs.

  drivers/clk/mediatek/clk-pll.h:67:16: error: field has incomplete type 'struct clk_hw'
     67 |         struct clk_hw   hw;
        |                         ^
  drivers/clk/mediatek/clk-pll.h:67:9: note: forward declaration of 'struct clk_hw'
     67 |         struct clk_hw   hw;
        |                ^

The compiler needs to know the complete type here, as it's not a
pointer but a member proper, which is needed for the container_of
macro to work.

In other words, clk-provider.h is needed.

Kind regards,
Nicolas Frattaroli

> 
> ChenYu
> 
> > After which:
> >
> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> >
> > > -int mtk_clk_register_plls(struct device_node *node,
> > > -                       const struct mtk_pll_data *plls, int num_plls,
> > > -                       struct clk_hw_onecell_data *clk_data);
> > > +int mtk_clk_register_plls(struct device *dev, const struct mtk_pll_data *plls,
> > > +                       int num_plls, struct clk_hw_onecell_data *clk_data);
> > > +
> > >   void mtk_clk_unregister_plls(const struct mtk_pll_data *plls, int num_plls,
> > >                            struct clk_hw_onecell_data *clk_data);
> > >
> > >
> >
> >
> 






^ permalink raw reply	[flat|nested] 20+ messages in thread

end of thread, other threads:[~2025-10-10 20:11 UTC | newest]

Thread overview: 20+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-10-08 16:05 [PATCH v2 0/5] MediaTek PLL Refactors and Fixes Nicolas Frattaroli
2025-10-08 16:05 ` [PATCH v2 1/5] clk: Respect CLK_OPS_PARENT_ENABLE during recalc Nicolas Frattaroli
2025-10-09  7:07   ` Chen-Yu Tsai
2025-10-09  8:01   ` AngeloGioacchino Del Regno
2025-10-08 16:05 ` [PATCH v2 2/5] clk: mediatek: Refactor pll registration to pass device Nicolas Frattaroli
2025-10-09  7:09   ` Chen-Yu Tsai
2025-10-09  7:19   ` Chen-Yu Tsai
2025-10-09  8:09   ` AngeloGioacchino Del Regno
2025-10-09  8:18     ` Chen-Yu Tsai
2025-10-09  8:52       ` AngeloGioacchino Del Regno
2025-10-10 20:11       ` Nicolas Frattaroli
2025-10-08 16:05 ` [PATCH v2 3/5] clk: mediatek: Pass device to clk_hw_register for PLLs Nicolas Frattaroli
2025-10-09  8:11   ` AngeloGioacchino Del Regno
2025-10-09  8:32   ` Chen-Yu Tsai
2025-10-08 16:05 ` [PATCH v2 4/5] clk: mediatek: Refactor pllfh registration to pass device Nicolas Frattaroli
2025-10-09  7:33   ` Chen-Yu Tsai
2025-10-10 20:06     ` Nicolas Frattaroli
2025-10-09  8:12   ` AngeloGioacchino Del Regno
2025-10-08 16:05 ` [PATCH v2 5/5] clk: mediatek: Add mfg_eb as parent to mt8196 mfgpll clocks Nicolas Frattaroli
2025-10-09  8:22   ` AngeloGioacchino Del Regno

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