[PATCH 0/4] Add support for clocks in S5M8767

[PATCH 0/4] Add support for clocks in S5M8767

[Tushar Behera]

S5M8767 chip has 3 crystal oscillators which are operated in the same
as the crystal oscillators in S2MPS11. Extend s2mps11-clk driver to
support clocks in S5M8767.

The patches are based on next-20131030.

Tushar Behera (4):
  clk: clk-s2mps11: Refactor for including support for other MFD clocks
  clk: clk-s2mps11: Add support for clocks in S5M8767 MFD
  mfd: sec-core: Add cells for S5M8767-clocks
  ARM: dts: Add S5M8767 clock nodes on Arndale board

 arch/arm/boot/dts/exynos5250-arndale.dts |    7 +++++++
 drivers/clk/Kconfig                      |    6 ++++--
 drivers/clk/clk-s2mps11.c                |   25 +++++++++++++++++++++----
 drivers/mfd/sec-core.c                   |    4 +++-
 4 files changed, 35 insertions(+), 7 deletions(-)

-- 
1.7.9.5

[PATCH 1/4] clk: clk-s2mps11: Refactor for including support for other MFD clocks

[Tushar Behera]

The clocks in S2MPS11 and S5M8767 are managed in the same way, baring
a difference in the register offset. It would be better to update
existing S2MPS11 driver to support the clocks in S5M8767, rather than
creating an almost duplicate driver altogether.

Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
CC: Yadwinder Singh Brar <yadi.brar@samsung.com>
CC: Mike Turquette <mturquette@linaro.org>
---
 drivers/clk/clk-s2mps11.c |   20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/clk-s2mps11.c b/drivers/clk/clk-s2mps11.c
index 7be41e6..2262cb4 100644
--- a/drivers/clk/clk-s2mps11.c
+++ b/drivers/clk/clk-s2mps11.c
@@ -48,6 +48,7 @@ struct s2mps11_clk {
 	struct clk_lookup *lookup;
 	u32 mask;
 	bool enabled;
+	unsigned int reg;
 };
 
 static struct s2mps11_clk *to_s2mps11_clk(struct clk_hw *hw)
@@ -61,7 +62,7 @@ static int s2mps11_clk_prepare(struct clk_hw *hw)
 	int ret;
 
 	ret = regmap_update_bits(s2mps11->iodev->regmap,
-				S2MPS11_REG_RTC_CTRL,
+				 s2mps11->reg,
 				 s2mps11->mask, s2mps11->mask);
 	if (!ret)
 		s2mps11->enabled = true;
@@ -74,7 +75,7 @@ static void s2mps11_clk_unprepare(struct clk_hw *hw)
 	struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
 	int ret;
 
-	ret = regmap_update_bits(s2mps11->iodev->regmap, S2MPS11_REG_RTC_CTRL,
+	ret = regmap_update_bits(s2mps11->iodev->regmap, s2mps11->reg,
 			   s2mps11->mask, ~s2mps11->mask);
 
 	if (!ret)
@@ -155,6 +156,7 @@ static int s2mps11_clk_probe(struct platform_device *pdev)
 	struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
 	struct s2mps11_clk *s2mps11_clks, *s2mps11_clk;
 	struct device_node *clk_np = NULL;
+	unsigned int s2mps11_reg;
 	int i, ret = 0;
 	u32 val;
 
@@ -169,13 +171,23 @@ static int s2mps11_clk_probe(struct platform_device *pdev)
 	if (IS_ERR(clk_np))
 		return PTR_ERR(clk_np);
 
+	switch(platform_get_device_id(pdev)->driver_data) {
+	case S2MPS11X:
+		s2mps11_reg = S2MPS11_REG_RTC_CTRL;
+		break;
+	default:
+		dev_err(&pdev->dev, "Invalid device type\n");
+		return -EINVAL;
+	};
+
 	for (i = 0; i < S2MPS11_CLKS_NUM; i++, s2mps11_clk++) {
 		s2mps11_clk->iodev = iodev;
 		s2mps11_clk->hw.init = &s2mps11_clks_init[i];
 		s2mps11_clk->mask = 1 << i;
+		s2mps11_clk->reg = s2mps11_reg;
 
 		ret = regmap_read(s2mps11_clk->iodev->regmap,
-				  S2MPS11_REG_RTC_CTRL, &val);
+				  s2mps11_clk->reg, &val);
 		if (ret < 0)
 			goto err_reg;
 
@@ -241,7 +253,7 @@ static int s2mps11_clk_remove(struct platform_device *pdev)
 }
 
 static const struct platform_device_id s2mps11_clk_id[] = {
-	{ "s2mps11-clk", 0},
+	{ "s2mps11-clk", S2MPS11X},
 	{ },
 };
 MODULE_DEVICE_TABLE(platform, s2mps11_clk_id);
-- 
1.7.9.5

[PATCH 1/4] clk: clk-s2mps11: Refactor for including support for other MFD clocks

[Yadwinder Singh Brar]

On Thu, Oct 31, 2013 at 3:48 PM, Tushar Behera <tushar.behera@linaro.org> wrote:
> The clocks in S2MPS11 and S5M8767 are managed in the same way, baring
> a difference in the register offset. It would be better to update
> existing S2MPS11 driver to support the clocks in S5M8767, rather than
> creating an almost duplicate driver altogether.
>
> Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
> CC: Yadwinder Singh Brar <yadi.brar@samsung.com>
> CC: Mike Turquette <mturquette@linaro.org>
> ---

Reviewed-by: Yadwinder Singh Brar <yadi.brar@samsung.com>

Regards,
Yadwinder

>  drivers/clk/clk-s2mps11.c |   20 ++++++++++++++++----
>  1 file changed, 16 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/clk/clk-s2mps11.c b/drivers/clk/clk-s2mps11.c
> index 7be41e6..2262cb4 100644
> --- a/drivers/clk/clk-s2mps11.c
> +++ b/drivers/clk/clk-s2mps11.c
> @@ -48,6 +48,7 @@ struct s2mps11_clk {
>         struct clk_lookup *lookup;
>         u32 mask;
>         bool enabled;
> +       unsigned int reg;
>  };
>
>  static struct s2mps11_clk *to_s2mps11_clk(struct clk_hw *hw)
> @@ -61,7 +62,7 @@ static int s2mps11_clk_prepare(struct clk_hw *hw)
>         int ret;
>
>         ret = regmap_update_bits(s2mps11->iodev->regmap,
> -                               S2MPS11_REG_RTC_CTRL,
> +                                s2mps11->reg,
>                                  s2mps11->mask, s2mps11->mask);
>         if (!ret)
>                 s2mps11->enabled = true;
> @@ -74,7 +75,7 @@ static void s2mps11_clk_unprepare(struct clk_hw *hw)
>         struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
>         int ret;
>
> -       ret = regmap_update_bits(s2mps11->iodev->regmap, S2MPS11_REG_RTC_CTRL,
> +       ret = regmap_update_bits(s2mps11->iodev->regmap, s2mps11->reg,
>                            s2mps11->mask, ~s2mps11->mask);
>
>         if (!ret)
> @@ -155,6 +156,7 @@ static int s2mps11_clk_probe(struct platform_device *pdev)
>         struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
>         struct s2mps11_clk *s2mps11_clks, *s2mps11_clk;
>         struct device_node *clk_np = NULL;
> +       unsigned int s2mps11_reg;
>         int i, ret = 0;
>         u32 val;
>
> @@ -169,13 +171,23 @@ static int s2mps11_clk_probe(struct platform_device *pdev)
>         if (IS_ERR(clk_np))
>                 return PTR_ERR(clk_np);
>
> +       switch(platform_get_device_id(pdev)->driver_data) {
> +       case S2MPS11X:
> +               s2mps11_reg = S2MPS11_REG_RTC_CTRL;
> +               break;
> +       default:
> +               dev_err(&pdev->dev, "Invalid device type\n");
> +               return -EINVAL;
> +       };
> +
>         for (i = 0; i < S2MPS11_CLKS_NUM; i++, s2mps11_clk++) {
>                 s2mps11_clk->iodev = iodev;
>                 s2mps11_clk->hw.init = &s2mps11_clks_init[i];
>                 s2mps11_clk->mask = 1 << i;
> +               s2mps11_clk->reg = s2mps11_reg;
>
>                 ret = regmap_read(s2mps11_clk->iodev->regmap,
> -                                 S2MPS11_REG_RTC_CTRL, &val);
> +                                 s2mps11_clk->reg, &val);
>                 if (ret < 0)
>                         goto err_reg;
>
> @@ -241,7 +253,7 @@ static int s2mps11_clk_remove(struct platform_device *pdev)
>  }
>
>  static const struct platform_device_id s2mps11_clk_id[] = {
> -       { "s2mps11-clk", 0},
> +       { "s2mps11-clk", S2MPS11X},
>         { },
>  };
>  MODULE_DEVICE_TABLE(platform, s2mps11_clk_id);
> --
> 1.7.9.5
>
> --
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> the body of a message to majordomo at vger.kernel.org
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[PATCH 2/4] clk: clk-s2mps11: Add support for clocks in S5M8767 MFD

[Tushar Behera]

Since clock operation within S2MPS11 and S5M8767 are similar, we can
support both the devices within a single driver.

Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
CC: Yadwinder Singh Brar <yadi.brar@samsung.com>
CC: Mike Turquette <mturquette@linaro.org>
---
 drivers/clk/Kconfig       |    6 ++++--
 drivers/clk/clk-s2mps11.c |    5 +++++
 2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 5c51115..7f2aef2 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -65,10 +65,12 @@ config COMMON_CLK_SI5351
 	  generators.
 
 config COMMON_CLK_S2MPS11
-	tristate "Clock driver for S2MPS11 MFD"
+	tristate "Clock driver for S2MPS11/S5M8767 MFD"
 	depends on MFD_SEC_CORE
 	---help---
-	  This driver supports S2MPS11 crystal oscillator clock.
+	  This driver supports S2MPS11/S5M8767 crystal oscillator clock. These
+	  multi-function devices have 3 fixed-rate oscillators, clocked at
+	  32KHz each.
 
 config CLK_TWL6040
 	tristate "External McPDM functional clock from twl6040"
diff --git a/drivers/clk/clk-s2mps11.c b/drivers/clk/clk-s2mps11.c
index 2262cb4..19c075c 100644
--- a/drivers/clk/clk-s2mps11.c
+++ b/drivers/clk/clk-s2mps11.c
@@ -27,6 +27,7 @@
 #include <linux/clk-provider.h>
 #include <linux/platform_device.h>
 #include <linux/mfd/samsung/s2mps11.h>
+#include <linux/mfd/samsung/s5m8767.h>
 #include <linux/mfd/samsung/core.h>
 
 #define s2mps11_name(a) (a->hw.init->name)
@@ -175,6 +176,9 @@ static int s2mps11_clk_probe(struct platform_device *pdev)
 	case S2MPS11X:
 		s2mps11_reg = S2MPS11_REG_RTC_CTRL;
 		break;
+	case S5M8767X:
+		s2mps11_reg = S5M8767_REG_CTRL1;
+		break;
 	default:
 		dev_err(&pdev->dev, "Invalid device type\n");
 		return -EINVAL;
@@ -254,6 +258,7 @@ static int s2mps11_clk_remove(struct platform_device *pdev)
 
 static const struct platform_device_id s2mps11_clk_id[] = {
 	{ "s2mps11-clk", S2MPS11X},
+	{ "s5m8767-clk", S5M8767X},
 	{ },
 };
 MODULE_DEVICE_TABLE(platform, s2mps11_clk_id);
-- 
1.7.9.5

[PATCH 2/4] clk: clk-s2mps11: Add support for clocks in S5M8767 MFD

[Yadwinder Singh Brar]

On Thu, Oct 31, 2013 at 3:48 PM, Tushar Behera <tushar.behera@linaro.org> wrote:
> Since clock operation within S2MPS11 and S5M8767 are similar, we can
> support both the devices within a single driver.
>
> Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
> CC: Yadwinder Singh Brar <yadi.brar@samsung.com>
> CC: Mike Turquette <mturquette@linaro.org>
> ---

Reviewed-by: Yadwinder Singh Brar <yadi.brar@samsung.com>

Regards,
Yadwinder

>  drivers/clk/Kconfig       |    6 ++++--
>  drivers/clk/clk-s2mps11.c |    5 +++++
>  2 files changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
> index 5c51115..7f2aef2 100644
> --- a/drivers/clk/Kconfig
> +++ b/drivers/clk/Kconfig
> @@ -65,10 +65,12 @@ config COMMON_CLK_SI5351
>           generators.
>
>  config COMMON_CLK_S2MPS11
> -       tristate "Clock driver for S2MPS11 MFD"
> +       tristate "Clock driver for S2MPS11/S5M8767 MFD"
>         depends on MFD_SEC_CORE
>         ---help---
> -         This driver supports S2MPS11 crystal oscillator clock.
> +         This driver supports S2MPS11/S5M8767 crystal oscillator clock. These
> +         multi-function devices have 3 fixed-rate oscillators, clocked at
> +         32KHz each.
>
>  config CLK_TWL6040
>         tristate "External McPDM functional clock from twl6040"
> diff --git a/drivers/clk/clk-s2mps11.c b/drivers/clk/clk-s2mps11.c
> index 2262cb4..19c075c 100644
> --- a/drivers/clk/clk-s2mps11.c
> +++ b/drivers/clk/clk-s2mps11.c
> @@ -27,6 +27,7 @@
>  #include <linux/clk-provider.h>
>  #include <linux/platform_device.h>
>  #include <linux/mfd/samsung/s2mps11.h>
> +#include <linux/mfd/samsung/s5m8767.h>
>  #include <linux/mfd/samsung/core.h>
>
>  #define s2mps11_name(a) (a->hw.init->name)
> @@ -175,6 +176,9 @@ static int s2mps11_clk_probe(struct platform_device *pdev)
>         case S2MPS11X:
>                 s2mps11_reg = S2MPS11_REG_RTC_CTRL;
>                 break;
> +       case S5M8767X:
> +               s2mps11_reg = S5M8767_REG_CTRL1;
> +               break;
>         default:
>                 dev_err(&pdev->dev, "Invalid device type\n");
>                 return -EINVAL;
> @@ -254,6 +258,7 @@ static int s2mps11_clk_remove(struct platform_device *pdev)
>
>  static const struct platform_device_id s2mps11_clk_id[] = {
>         { "s2mps11-clk", S2MPS11X},
> +       { "s5m8767-clk", S5M8767X},
>         { },
>  };
>  MODULE_DEVICE_TABLE(platform, s2mps11_clk_id);
> --
> 1.7.9.5
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH 3/4] mfd: sec-core: Add cells for S5M8767-clocks

[Tushar Behera]

S5M8767 chip has 3 crystal oscillators running at 32KHz. These are
supported by s2mps11-clk driver.

Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
CC: Lee Jones <lee.jones@linaro.org>
---
 drivers/mfd/sec-core.c |    4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c
index 34c18fb..020b86b 100644
--- a/drivers/mfd/sec-core.c
+++ b/drivers/mfd/sec-core.c
@@ -56,7 +56,9 @@ static struct mfd_cell s5m8767_devs[] = {
 		.name = "s5m8767-pmic",
 	}, {
 		.name = "s5m-rtc",
-	},
+	}, {
+		.name = "s5m8767-clk",
+	}
 };
 
 static struct mfd_cell s2mps11_devs[] = {
-- 
1.7.9.5

[PATCH 3/4] mfd: sec-core: Add cells for S5M8767-clocks

[Lee Jones]

On Thu, 31 Oct 2013, Tushar Behera wrote:

> S5M8767 chip has 3 crystal oscillators running at 32KHz. These are
> supported by s2mps11-clk driver.
> 
> Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
> CC: Lee Jones <lee.jones@linaro.org>
> ---
>  drivers/mfd/sec-core.c |    4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c
> index 34c18fb..020b86b 100644
> --- a/drivers/mfd/sec-core.c
> +++ b/drivers/mfd/sec-core.c
> @@ -56,7 +56,9 @@ static struct mfd_cell s5m8767_devs[] = {
>  		.name = "s5m8767-pmic",
>  	}, {
>  		.name = "s5m-rtc",
> -	},
> +	}, {
> +		.name = "s5m8767-clk",
> +	}
>  };
>  
>  static struct mfd_cell s2mps11_devs[] = {

Acked-by: Lee Jones <lee.jones@linaro.org>

I'd prefer to take this patch in via the MFD tree once you have
support from the other maintainers for the set.

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

[PATCH 3/4] mfd: sec-core: Add cells for S5M8767-clocks

[Tushar Behera]

On 31 October 2013 21:46, Lee Jones <lee.jones@linaro.org> wrote:
> On Thu, 31 Oct 2013, Tushar Behera wrote:
>
>> S5M8767 chip has 3 crystal oscillators running at 32KHz. These are
>> supported by s2mps11-clk driver.
>>
>> Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
>> CC: Lee Jones <lee.jones@linaro.org>
>> ---
>>  drivers/mfd/sec-core.c |    4 +++-
>>  1 file changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c
>> index 34c18fb..020b86b 100644
>> --- a/drivers/mfd/sec-core.c
>> +++ b/drivers/mfd/sec-core.c
>> @@ -56,7 +56,9 @@ static struct mfd_cell s5m8767_devs[] = {
>>               .name = "s5m8767-pmic",
>>       }, {
>>               .name = "s5m-rtc",
>> -     },
>> +     }, {
>> +             .name = "s5m8767-clk",
>> +     }
>>  };
>>
>>  static struct mfd_cell s2mps11_devs[] = {
>
> Acked-by: Lee Jones <lee.jones@linaro.org>
>

Thanks.

> I'd prefer to take this patch in via the MFD tree once you have
> support from the other maintainers for the set.
>

Ok. I will let you know once I get the clock patches through.

-- 
Tushar Behera

[PATCH 3/4] mfd: sec-core: Add cells for S5M8767-clocks

[Kyungmin Park]

On Tue, Nov 5, 2013 at 3:29 PM, Tushar Behera <tushar.behera@linaro.org> wrote:
> On 31 October 2013 21:46, Lee Jones <lee.jones@linaro.org> wrote:
>> On Thu, 31 Oct 2013, Tushar Behera wrote:
>>
>>> S5M8767 chip has 3 crystal oscillators running at 32KHz. These are
>>> supported by s2mps11-clk driver.
>>>
>>> Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
>>> CC: Lee Jones <lee.jones@linaro.org>
>>> ---
>>>  drivers/mfd/sec-core.c |    4 +++-
>>>  1 file changed, 3 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c
>>> index 34c18fb..020b86b 100644
>>> --- a/drivers/mfd/sec-core.c
>>> +++ b/drivers/mfd/sec-core.c
>>> @@ -56,7 +56,9 @@ static struct mfd_cell s5m8767_devs[] = {
>>>               .name = "s5m8767-pmic",
>>>       }, {
>>>               .name = "s5m-rtc",
>>> -     },
>>> +     }, {
>>> +             .name = "s5m8767-clk",

Do you want to handle these as "clock"? previous time, it's
implemented at regulator. please see drivers/regulator/max* series.

Thank you,
Kyungmin Park
>>> +     }
>>>  };
>>>
>>>  static struct mfd_cell s2mps11_devs[] = {
>>
>> Acked-by: Lee Jones <lee.jones@linaro.org>
>>
>
> Thanks.
>
>> I'd prefer to take this patch in via the MFD tree once you have
>> support from the other maintainers for the set.
>>
>
> Ok. I will let you know once I get the clock patches through.
>
> --
> Tushar Behera
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH 3/4] mfd: sec-core: Add cells for S5M8767-clocks

[Tushar Behera]

On 5 November 2013 13:27, Kyungmin Park <kmpark@infradead.org> wrote:
> On Tue, Nov 5, 2013 at 3:29 PM, Tushar Behera <tushar.behera@linaro.org> wrote:
>> On 31 October 2013 21:46, Lee Jones <lee.jones@linaro.org> wrote:
>>> On Thu, 31 Oct 2013, Tushar Behera wrote:
>>>
>>>> S5M8767 chip has 3 crystal oscillators running at 32KHz. These are
>>>> supported by s2mps11-clk driver.
>>>>
>>>> Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
>>>> CC: Lee Jones <lee.jones@linaro.org>
>>>> ---
>>>>  drivers/mfd/sec-core.c |    4 +++-
>>>>  1 file changed, 3 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c
>>>> index 34c18fb..020b86b 100644
>>>> --- a/drivers/mfd/sec-core.c
>>>> +++ b/drivers/mfd/sec-core.c
>>>> @@ -56,7 +56,9 @@ static struct mfd_cell s5m8767_devs[] = {
>>>>               .name = "s5m8767-pmic",
>>>>       }, {
>>>>               .name = "s5m-rtc",
>>>> -     },
>>>> +     }, {
>>>> +             .name = "s5m8767-clk",
>
> Do you want to handle these as "clock"? previous time, it's
> implemented at regulator. please see drivers/regulator/max* series.
>
> Thank you,
> Kyungmin Park

There is already a clock-implementation available for this kind of
device (through clk-s2mps11). I would like to extend that support.
Also for MAX77686, it is implemented through clock subsystem.

-- 
Tushar Behera

[PATCH 3/4] mfd: sec-core: Add cells for S5M8767-clocks

[Kyungmin Park]

On Tue, Nov 5, 2013 at 5:04 PM, Tushar Behera <tushar.behera@linaro.org> wrote:
> On 5 November 2013 13:27, Kyungmin Park <kmpark@infradead.org> wrote:
>> On Tue, Nov 5, 2013 at 3:29 PM, Tushar Behera <tushar.behera@linaro.org> wrote:
>>> On 31 October 2013 21:46, Lee Jones <lee.jones@linaro.org> wrote:
>>>> On Thu, 31 Oct 2013, Tushar Behera wrote:
>>>>
>>>>> S5M8767 chip has 3 crystal oscillators running at 32KHz. These are
>>>>> supported by s2mps11-clk driver.
>>>>>
>>>>> Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
>>>>> CC: Lee Jones <lee.jones@linaro.org>
>>>>> ---
>>>>>  drivers/mfd/sec-core.c |    4 +++-
>>>>>  1 file changed, 3 insertions(+), 1 deletion(-)
>>>>>
>>>>> diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c
>>>>> index 34c18fb..020b86b 100644
>>>>> --- a/drivers/mfd/sec-core.c
>>>>> +++ b/drivers/mfd/sec-core.c
>>>>> @@ -56,7 +56,9 @@ static struct mfd_cell s5m8767_devs[] = {
>>>>>               .name = "s5m8767-pmic",
>>>>>       }, {
>>>>>               .name = "s5m-rtc",
>>>>> -     },
>>>>> +     }, {
>>>>> +             .name = "s5m8767-clk",
>>
>> Do you want to handle these as "clock"? previous time, it's
>> implemented at regulator. please see drivers/regulator/max* series.
>>
>> Thank you,
>> Kyungmin Park
>
> There is already a clock-implementation available for this kind of
> device (through clk-s2mps11). I would like to extend that support.
> Also for MAX77686, it is implemented through clock subsystem.
>

Yes it's possible, but losts of MAX chips are implemented already with
regulator.
but in case of maxim chip. it's voltage instead of clock. doesn't
better to use regulaor?

Ah I confused between 32KHz and Safeout. okay it's 32KHz clock. okay
it's better to use clock.

Ignore previous comments.

Thank you,
Kyungmin Park

[PATCH 4/4] ARM: dts: Add S5M8767 clock nodes on Arndale board

[Tushar Behera]

Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
CC: Kukjin Kim <kgene.kim@samsung.com>
---
 arch/arm/boot/dts/exynos5250-arndale.dts |    7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
index b77a37e..34b305d 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -70,6 +70,13 @@
 			s5m8767,pmic-buck-ds-gpios = <&gpx2 3 0>,
 							<&gpx2 4 0>,
 							<&gpx2 5 0>;
+
+			s5m8767_osc: clocks {
+				#clock-cells = <1>;
+				clock-output-names = "s5m8767_ap",
+						"s5m8767_cp", "s5m8767_bt";
+			};
+
 			regulators {
 				ldo1_reg: LDO1 {
 					regulator-name = "VDD_ALIVE_1.0V";
-- 
1.7.9.5

[PATCH 0/4] Add support for clocks in S5M8767

[Tomasz Figa]

Hi Tushar,

On Thursday 31 of October 2013 12:18:40 Tushar Behera wrote:
> S5M8767 chip has 3 crystal oscillators which are operated in the same
> as the crystal oscillators in S2MPS11. Extend s2mps11-clk driver to
> support clocks in S5M8767.
> 
> The patches are based on next-20131030.
> 
> Tushar Behera (4):
>   clk: clk-s2mps11: Refactor for including support for other MFD clocks
>   clk: clk-s2mps11: Add support for clocks in S5M8767 MFD
>   mfd: sec-core: Add cells for S5M8767-clocks
>   ARM: dts: Add S5M8767 clock nodes on Arndale board
> 
>  arch/arm/boot/dts/exynos5250-arndale.dts |    7 +++++++
>  drivers/clk/Kconfig                      |    6 ++++--
>  drivers/clk/clk-s2mps11.c                |   25
> +++++++++++++++++++++---- drivers/mfd/sec-core.c                   |   
> 4 +++-
>  4 files changed, 35 insertions(+), 7 deletions(-)

For the whole series:

Reviewed-by: Tomasz Figa <t.figa@samsung.com>

Best regards,
Tomasz

[PATCH 0/4] Add support for clocks in S5M8767

[Tushar Behera]

On 10 November 2013 18:04, Tomasz Figa <tomasz.figa@gmail.com> wrote:
> Hi Tushar,
>
> On Thursday 31 of October 2013 12:18:40 Tushar Behera wrote:
>> S5M8767 chip has 3 crystal oscillators which are operated in the same
>> as the crystal oscillators in S2MPS11. Extend s2mps11-clk driver to
>> support clocks in S5M8767.
>>
>> The patches are based on next-20131030.
>>
>> Tushar Behera (4):
>>   clk: clk-s2mps11: Refactor for including support for other MFD clocks
>>   clk: clk-s2mps11: Add support for clocks in S5M8767 MFD
>>   mfd: sec-core: Add cells for S5M8767-clocks
>>   ARM: dts: Add S5M8767 clock nodes on Arndale board
>>
>>  arch/arm/boot/dts/exynos5250-arndale.dts |    7 +++++++
>>  drivers/clk/Kconfig                      |    6 ++++--
>>  drivers/clk/clk-s2mps11.c                |   25
>> +++++++++++++++++++++---- drivers/mfd/sec-core.c                   |
>> 4 +++-
>>  4 files changed, 35 insertions(+), 7 deletions(-)
>
> For the whole series:
>
> Reviewed-by: Tomasz Figa <t.figa@samsung.com>
>
> Best regards,
> Tomasz
>

Thanks Tomasz.

Mike,

Would you please pick up patches 1 and 2? Lee would pick up patch 3
after these patches are merged.

-- 
Tushar Behera

[PATCH 0/4] Add support for clocks in S5M8767

[Tushar Behera]

On 11 November 2013 08:28, Tushar Behera <tushar.behera@linaro.org> wrote:
> On 10 November 2013 18:04, Tomasz Figa <tomasz.figa@gmail.com> wrote:
>> Hi Tushar,
>>
>> On Thursday 31 of October 2013 12:18:40 Tushar Behera wrote:
>>> S5M8767 chip has 3 crystal oscillators which are operated in the same
>>> as the crystal oscillators in S2MPS11. Extend s2mps11-clk driver to
>>> support clocks in S5M8767.
>>>
>>> The patches are based on next-20131030.
>>>
>>> Tushar Behera (4):
>>>   clk: clk-s2mps11: Refactor for including support for other MFD clocks
>>>   clk: clk-s2mps11: Add support for clocks in S5M8767 MFD
>>>   mfd: sec-core: Add cells for S5M8767-clocks
>>>   ARM: dts: Add S5M8767 clock nodes on Arndale board
>>>
>>>  arch/arm/boot/dts/exynos5250-arndale.dts |    7 +++++++
>>>  drivers/clk/Kconfig                      |    6 ++++--
>>>  drivers/clk/clk-s2mps11.c                |   25
>>> +++++++++++++++++++++---- drivers/mfd/sec-core.c                   |
>>> 4 +++-
>>>  4 files changed, 35 insertions(+), 7 deletions(-)
>>
>> For the whole series:
>>
>> Reviewed-by: Tomasz Figa <t.figa@samsung.com>
>>
>> Best regards,
>> Tomasz
>>
>
> Thanks Tomasz.
>
> Mike,
>
> Would you please pick up patches 1 and 2? Lee would pick up patch 3
> after these patches are merged.
>
> --
> Tushar Behera

Mike,

Would you please take patches 1 and 2 during this merge window?

-- 
Tushar Behera

[PATCH RESEND 0/4] Add support for clocks in S5M8767

[Tushar Behera]

S5M8767 chip has 3 crystal oscillators which are operated in the same
as the crystal oscillators in S2MPS11. Extend s2mps11-clk driver to
support clocks in S5M8767.

The earlier set of patches no longer apply cleanly on linux-next, hence
rebased them on top of next-20131224.

Tushar Behera (4):
  clk: clk-s2mps11: Refactor for including support for other MFD clocks
  clk: clk-s2mps11: Add support for clocks in S5M8767 MFD
  mfd: sec-core: Add cells for S5M8767-clocks
  ARM: dts: Add S5M8767 clock nodes on Arndale board

 arch/arm/boot/dts/exynos5250-arndale.dts |    7 +++++++
 drivers/clk/Kconfig                      |    6 ++++--
 drivers/clk/clk-s2mps11.c                |   25 +++++++++++++++++++++----
 drivers/mfd/sec-core.c                   |    4 +++-
 4 files changed, 35 insertions(+), 7 deletions(-)

-- 
1.7.9.5

[PATCH RESEND 1/4] clk: clk-s2mps11: Refactor for including support for other MFD clocks

[Tushar Behera]

The clocks in S2MPS11 and S5M8767 are managed in the same way, baring
a difference in the register offset. It would be better to update
existing S2MPS11 driver to support the clocks in S5M8767, rather than
creating an almost duplicate driver altogether.

Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
CC: Mike Turquette <mturquette@linaro.org>
---
 drivers/clk/clk-s2mps11.c |   20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/clk-s2mps11.c b/drivers/clk/clk-s2mps11.c
index 00a3abe..43e25bb 100644
--- a/drivers/clk/clk-s2mps11.c
+++ b/drivers/clk/clk-s2mps11.c
@@ -48,6 +48,7 @@ struct s2mps11_clk {
 	struct clk_lookup *lookup;
 	u32 mask;
 	bool enabled;
+	unsigned int reg;
 };
 
 static struct s2mps11_clk *to_s2mps11_clk(struct clk_hw *hw)
@@ -61,7 +62,7 @@ static int s2mps11_clk_prepare(struct clk_hw *hw)
 	int ret;
 
 	ret = regmap_update_bits(s2mps11->iodev->regmap_pmic,
-				S2MPS11_REG_RTC_CTRL,
+				 s2mps11->reg,
 				 s2mps11->mask, s2mps11->mask);
 	if (!ret)
 		s2mps11->enabled = true;
@@ -74,7 +75,7 @@ static void s2mps11_clk_unprepare(struct clk_hw *hw)
 	struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
 	int ret;
 
-	ret = regmap_update_bits(s2mps11->iodev->regmap_pmic, S2MPS11_REG_RTC_CTRL,
+	ret = regmap_update_bits(s2mps11->iodev->regmap_pmic, s2mps11->reg,
 			   s2mps11->mask, ~s2mps11->mask);
 
 	if (!ret)
@@ -155,6 +156,7 @@ static int s2mps11_clk_probe(struct platform_device *pdev)
 	struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
 	struct s2mps11_clk *s2mps11_clks, *s2mps11_clk;
 	struct device_node *clk_np = NULL;
+	unsigned int s2mps11_reg;
 	int i, ret = 0;
 	u32 val;
 
@@ -169,13 +171,23 @@ static int s2mps11_clk_probe(struct platform_device *pdev)
 	if (IS_ERR(clk_np))
 		return PTR_ERR(clk_np);
 
+	switch(platform_get_device_id(pdev)->driver_data) {
+	case S2MPS11X:
+		s2mps11_reg = S2MPS11_REG_RTC_CTRL;
+		break;
+	default:
+		dev_err(&pdev->dev, "Invalid device type\n");
+		return -EINVAL;
+	};
+
 	for (i = 0; i < S2MPS11_CLKS_NUM; i++, s2mps11_clk++) {
 		s2mps11_clk->iodev = iodev;
 		s2mps11_clk->hw.init = &s2mps11_clks_init[i];
 		s2mps11_clk->mask = 1 << i;
+		s2mps11_clk->reg = s2mps11_reg;
 
 		ret = regmap_read(s2mps11_clk->iodev->regmap_pmic,
-				  S2MPS11_REG_RTC_CTRL, &val);
+				  s2mps11_clk->reg, &val);
 		if (ret < 0)
 			goto err_reg;
 
@@ -241,7 +253,7 @@ static int s2mps11_clk_remove(struct platform_device *pdev)
 }
 
 static const struct platform_device_id s2mps11_clk_id[] = {
-	{ "s2mps11-clk", 0},
+	{ "s2mps11-clk", S2MPS11X},
 	{ },
 };
 MODULE_DEVICE_TABLE(platform, s2mps11_clk_id);
-- 
1.7.9.5

[PATCH RESEND 1/4] clk: clk-s2mps11: Refactor for including support for other MFD clocks

[Mike Turquette]

Quoting Tushar Behera (2013-12-26 02:18:58)
> The clocks in S2MPS11 and S5M8767 are managed in the same way, baring
> a difference in the register offset. It would be better to update
> existing S2MPS11 driver to support the clocks in S5M8767, rather than
> creating an almost duplicate driver altogether.

Can you rebase patches #1 & #2 onto clk-next? They do not apply cleanly
as-is.

Regards,
Mike

> 
> Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
> Reviewed-by: Tomasz Figa <t.figa@samsung.com>
> Reviewed-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
> CC: Mike Turquette <mturquette@linaro.org>
> ---
>  drivers/clk/clk-s2mps11.c |   20 ++++++++++++++++----
>  1 file changed, 16 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/clk/clk-s2mps11.c b/drivers/clk/clk-s2mps11.c
> index 00a3abe..43e25bb 100644
> --- a/drivers/clk/clk-s2mps11.c
> +++ b/drivers/clk/clk-s2mps11.c
> @@ -48,6 +48,7 @@ struct s2mps11_clk {
>         struct clk_lookup *lookup;
>         u32 mask;
>         bool enabled;
> +       unsigned int reg;
>  };
>  
>  static struct s2mps11_clk *to_s2mps11_clk(struct clk_hw *hw)
> @@ -61,7 +62,7 @@ static int s2mps11_clk_prepare(struct clk_hw *hw)
>         int ret;
>  
>         ret = regmap_update_bits(s2mps11->iodev->regmap_pmic,
> -                               S2MPS11_REG_RTC_CTRL,
> +                                s2mps11->reg,
>                                  s2mps11->mask, s2mps11->mask);
>         if (!ret)
>                 s2mps11->enabled = true;
> @@ -74,7 +75,7 @@ static void s2mps11_clk_unprepare(struct clk_hw *hw)
>         struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
>         int ret;
>  
> -       ret = regmap_update_bits(s2mps11->iodev->regmap_pmic, S2MPS11_REG_RTC_CTRL,
> +       ret = regmap_update_bits(s2mps11->iodev->regmap_pmic, s2mps11->reg,
>                            s2mps11->mask, ~s2mps11->mask);
>  
>         if (!ret)
> @@ -155,6 +156,7 @@ static int s2mps11_clk_probe(struct platform_device *pdev)
>         struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
>         struct s2mps11_clk *s2mps11_clks, *s2mps11_clk;
>         struct device_node *clk_np = NULL;
> +       unsigned int s2mps11_reg;
>         int i, ret = 0;
>         u32 val;
>  
> @@ -169,13 +171,23 @@ static int s2mps11_clk_probe(struct platform_device *pdev)
>         if (IS_ERR(clk_np))
>                 return PTR_ERR(clk_np);
>  
> +       switch(platform_get_device_id(pdev)->driver_data) {
> +       case S2MPS11X:
> +               s2mps11_reg = S2MPS11_REG_RTC_CTRL;
> +               break;
> +       default:
> +               dev_err(&pdev->dev, "Invalid device type\n");
> +               return -EINVAL;
> +       };
> +
>         for (i = 0; i < S2MPS11_CLKS_NUM; i++, s2mps11_clk++) {
>                 s2mps11_clk->iodev = iodev;
>                 s2mps11_clk->hw.init = &s2mps11_clks_init[i];
>                 s2mps11_clk->mask = 1 << i;
> +               s2mps11_clk->reg = s2mps11_reg;
>  
>                 ret = regmap_read(s2mps11_clk->iodev->regmap_pmic,
> -                                 S2MPS11_REG_RTC_CTRL, &val);
> +                                 s2mps11_clk->reg, &val);
>                 if (ret < 0)
>                         goto err_reg;
>  
> @@ -241,7 +253,7 @@ static int s2mps11_clk_remove(struct platform_device *pdev)
>  }
>  
>  static const struct platform_device_id s2mps11_clk_id[] = {
> -       { "s2mps11-clk", 0},
> +       { "s2mps11-clk", S2MPS11X},
>         { },
>  };
>  MODULE_DEVICE_TABLE(platform, s2mps11_clk_id);
> -- 
> 1.7.9.5
> 

[PATCH RESEND 1/4] clk: clk-s2mps11: Refactor for including support for other MFD clocks

[Tushar Behera]

On 30 December 2013 03:47, Mike Turquette <mturquette@linaro.org> wrote:
> Quoting Tushar Behera (2013-12-26 02:18:58)
>> The clocks in S2MPS11 and S5M8767 are managed in the same way, baring
>> a difference in the register offset. It would be better to update
>> existing S2MPS11 driver to support the clocks in S5M8767, rather than
>> creating an almost duplicate driver altogether.
>
> Can you rebase patches #1 & #2 onto clk-next? They do not apply cleanly
> as-is.
>
> Regards,
> Mike
>

Commit 1b1ccee1e821 "mfd: s2mps11: Fix build after regmap field rename
in sec-core.c" is also touching this file, which is in Mark's tree
right now. If I rebase
this patch on top clk-next, I am getting conflicts when I merge that
with linux-next.
Let me know how you want to handle this.

I am attaching the rebased patches for your reference.
If you want, I will send them again through git-send-email.

-- 
Tushar Behera
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[PATCH RESEND 1/4] clk: clk-s2mps11: Refactor for including support for other MFD clocks

[Mark Brown]

On Mon, Dec 30, 2013 at 09:33:50AM +0530, Tushar Behera wrote:

> Commit 1b1ccee1e821 "mfd: s2mps11: Fix build after regmap field rename
> in sec-core.c" is also touching this file, which is in Mark's tree
> right now. If I rebase

It's been in Linus' tree for a while now.
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[PATCH RESEND 1/4] clk: clk-s2mps11: Refactor for including support for other MFD clocks

[Mike Turquette]

Quoting Mark Brown (2013-12-31 08:09:16)
> On Mon, Dec 30, 2013 at 09:33:50AM +0530, Tushar Behera wrote:
> 
> > Commit 1b1ccee1e821 "mfd: s2mps11: Fix build after regmap field rename
> > in sec-core.c" is also touching this file, which is in Mark's tree
> > right now. If I rebase
> 
> It's been in Linus' tree for a while now.

OK, so I merged the two patches into clk-next, then merged clk-next into
next-20131224 and the merge is super trivial to resolve. So I propose
that we just let it get resolved in linux-next the usual way.

Any objections? If not I'll take these two patches into clk-next.

Regards,
Mike

[PATCH RESEND 2/4] clk: clk-s2mps11: Add support for clocks in S5M8767 MFD

[Tushar Behera]

Since clock operation within S2MPS11 and S5M8767 are similar, we can
support both the devices within a single driver.

Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
CC: Mike Turquette <mturquette@linaro.org>
---
 drivers/clk/Kconfig       |    6 ++++--
 drivers/clk/clk-s2mps11.c |    5 +++++
 2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 3089f05..87e6c56 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -75,10 +75,12 @@ config COMMON_CLK_SI570
 	  clock generators.
 
 config COMMON_CLK_S2MPS11
-	tristate "Clock driver for S2MPS11 MFD"
+	tristate "Clock driver for S2MPS11/S5M8767 MFD"
 	depends on MFD_SEC_CORE
 	---help---
-	  This driver supports S2MPS11 crystal oscillator clock.
+	  This driver supports S2MPS11/S5M8767 crystal oscillator clock. These
+	  multi-function devices have 3 fixed-rate oscillators, clocked at
+	  32KHz each.
 
 config CLK_TWL6040
 	tristate "External McPDM functional clock from twl6040"
diff --git a/drivers/clk/clk-s2mps11.c b/drivers/clk/clk-s2mps11.c
index 43e25bb..f4c1f08 100644
--- a/drivers/clk/clk-s2mps11.c
+++ b/drivers/clk/clk-s2mps11.c
@@ -27,6 +27,7 @@
 #include <linux/clk-provider.h>
 #include <linux/platform_device.h>
 #include <linux/mfd/samsung/s2mps11.h>
+#include <linux/mfd/samsung/s5m8767.h>
 #include <linux/mfd/samsung/core.h>
 
 #define s2mps11_name(a) (a->hw.init->name)
@@ -175,6 +176,9 @@ static int s2mps11_clk_probe(struct platform_device *pdev)
 	case S2MPS11X:
 		s2mps11_reg = S2MPS11_REG_RTC_CTRL;
 		break;
+	case S5M8767X:
+		s2mps11_reg = S5M8767_REG_CTRL1;
+		break;
 	default:
 		dev_err(&pdev->dev, "Invalid device type\n");
 		return -EINVAL;
@@ -254,6 +258,7 @@ static int s2mps11_clk_remove(struct platform_device *pdev)
 
 static const struct platform_device_id s2mps11_clk_id[] = {
 	{ "s2mps11-clk", S2MPS11X},
+	{ "s5m8767-clk", S5M8767X},
 	{ },
 };
 MODULE_DEVICE_TABLE(platform, s2mps11_clk_id);
-- 
1.7.9.5

[PATCH RESEND 3/4] mfd: sec-core: Add cells for S5M8767-clocks

[Tushar Behera]

S5M8767 chip has 3 crystal oscillators running at 32KHz. These are
supported by s2mps11-clk driver.

Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
CC: Lee Jones <lee.jones@linaro.org>
---
 drivers/mfd/sec-core.c |    4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c
index 66936b8..a139798 100644
--- a/drivers/mfd/sec-core.c
+++ b/drivers/mfd/sec-core.c
@@ -56,7 +56,9 @@ static const struct mfd_cell s5m8767_devs[] = {
 		.name = "s5m8767-pmic",
 	}, {
 		.name = "s5m-rtc",
-	},
+	}, {
+		.name = "s5m8767-clk",
+	}
 };
 
 static const struct mfd_cell s2mps11_devs[] = {
-- 
1.7.9.5

[PATCH RESEND 3/4] mfd: sec-core: Add cells for S5M8767-clocks

[Lee Jones]

On Thu, 26 Dec 2013, Tushar Behera wrote:

> S5M8767 chip has 3 crystal oscillators running at 32KHz. These are
> supported by s2mps11-clk driver.
> 
> Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
> Reviewed-by: Tomasz Figa <t.figa@samsung.com>
> CC: Lee Jones <lee.jones@linaro.org>
> ---
>  drivers/mfd/sec-core.c |    4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)

Applied, thanks.

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

[PATCH RESEND 4/4] ARM: dts: Add S5M8767 clock nodes on Arndale board

[Tushar Behera]

Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
---
 arch/arm/boot/dts/exynos5250-arndale.dts |    7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
index b42e658..3bb730d 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -71,6 +71,13 @@
 			s5m8767,pmic-buck-ds-gpios = <&gpx2 3 0>,
 							<&gpx2 4 0>,
 							<&gpx2 5 0>;
+
+			s5m8767_osc: clocks {
+				#clock-cells = <1>;
+				clock-output-names = "s5m8767_ap",
+						"s5m8767_cp", "s5m8767_bt";
+			};
+
 			regulators {
 				ldo1_reg: LDO1 {
 					regulator-name = "VDD_ALIVE_1.0V";
-- 
1.7.9.5