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From: andy.shevchenko@gmail.com (Andy Shevchenko)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v6 7/9] gpio: Add gpio driver for Actions OWL S900 SoC
Date: Sat, 31 Mar 2018 00:04:11 +0300	[thread overview]
Message-ID: <CAHp75VeGv04CA3f1pRDi35DsbRgrdj86TBUBZ3J+27T822cOqw@mail.gmail.com> (raw)
In-Reply-To: <20180328174703.19778-8-manivannan.sadhasivam@linaro.org>

On Wed, Mar 28, 2018 at 8:47 PM, Manivannan Sadhasivam
<manivannan.sadhasivam@linaro.org> wrote:
> Add gpio driver for Actions Semi OWL family S900 SoC. Set of registers
> controlling the gpio shares the same register range with pinctrl block.
>
> GPIO registers are organized as 6 banks and each bank controls the
> maximum of 32 gpios.
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>

> +static void owl_gpio_update_reg(void __iomem *base, unsigned int pin, int flag)
> +{
> +       u32 val;
> +
> +       val = readl_relaxed(base);
> +
> +       if (flag)
> +               val |= BIT(pin);
> +       else
> +               val &= ~BIT(pin);
> +
> +       writel_relaxed(val, base);
> +}

Hmm... Just realized that this driver misses locking.

Something like
owl_gpio_update_reg_locked()
{
 spin_lock();
 owl_gpio_update_reg();
 spin_unlock();
}

> +
> +static int owl_gpio_request(struct gpio_chip *chip, unsigned int offset)
> +{
> +       struct owl_gpio *gpio = gpiochip_get_data(chip);
> +
> +       /*
> +        * GPIOs have higher priority over other modules, so either setting
> +        * them as OUT or IN is sufficient
> +        */
> +       owl_gpio_update_reg(gpio->base + GPIO_OUTEN, offset, true);

...to use in such cases.

> +
> +       return 0;
> +}
> +
> +static void owl_gpio_free(struct gpio_chip *chip, unsigned int offset)
> +{
> +       struct owl_gpio *gpio = gpiochip_get_data(chip);
> +
> +       /* disable gpio output */
> +       owl_gpio_update_reg(gpio->base + GPIO_OUTEN, offset, false);
> +
> +       /* disable gpio input */
> +       owl_gpio_update_reg(gpio->base + GPIO_INEN, offset, false);

...or

spin_lock();
owl_gpio_update_reg();
owl_gpio_update_reg();
spin_unlock();

...in this and similar cases.

> +}


-- 
With Best Regards,
Andy Shevchenko

  reply	other threads:[~2018-03-30 21:04 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-28 17:46 [PATCH v6 0/9] Add Actions Semi S900 pinctrl and gpio support Manivannan Sadhasivam
2018-03-28 17:46 ` [PATCH v6 1/9] arm64: dts: actions: Add pinctrl node for S900 Manivannan Sadhasivam
2018-03-28 17:46 ` [PATCH v6 2/9] arm64: actions: Enable PINCTRL in platforms Kconfig Manivannan Sadhasivam
2018-03-28 17:46 ` [PATCH v6 3/9] pinctrl: actions: Add Actions S900 pinctrl driver Manivannan Sadhasivam
2018-03-30 21:16   ` Andy Shevchenko
2018-04-03 17:00     ` Manivannan Sadhasivam
2018-04-03 17:03       ` Andreas Färber
2018-04-03 17:14         ` Manivannan Sadhasivam
2018-04-06 14:01       ` Andy Shevchenko
2018-03-28 17:46 ` [PATCH v6 4/9] dt-bindings: gpio: Add gpio nodes for Actions S900 SoC Manivannan Sadhasivam
2018-04-12  8:54   ` Linus Walleij
2018-03-28 17:46 ` [PATCH v6 5/9] arm64: dts: actions: Add S900 gpio nodes Manivannan Sadhasivam
2018-03-28 17:47 ` [PATCH v6 6/9] arm64: dts: actions: Add gpio line names to Bubblegum-96 board Manivannan Sadhasivam
2018-03-28 17:47 ` [PATCH v6 7/9] gpio: Add gpio driver for Actions OWL S900 SoC Manivannan Sadhasivam
2018-03-30 21:04   ` Andy Shevchenko [this message]
2018-03-28 17:47 ` [PATCH v6 8/9] MAINTAINERS: Add reviewer for ACTIONS platforms Manivannan Sadhasivam
2018-03-28 17:47 ` [PATCH v6 9/9] MAINTAINERS: Add Actions Semi S900 pinctrl and gpio entries Manivannan Sadhasivam

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