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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Lukasz Luba <l.luba@partner.samsung.com>
Cc: "Mark Rutland" <mark.rutland@arm.com>,
	devicetree@vger.kernel.org,
	"linux-samsung-soc@vger.kernel.org"
	<linux-samsung-soc@vger.kernel.org>,
	"Bartłomiej Żołnierkiewicz" <b.zolnierkie@samsung.com>,
	linux-kernel@vger.kernel.org, "Rob Herring" <robh+dt@kernel.org>,
	myungjoo.ham@samsung.com, "Kukjin Kim" <kgene@kernel.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 6/8] DT: arm: exynos: add DMC device for exynos5422
Date: Tue, 29 Jan 2019 16:13:49 +0100	[thread overview]
Message-ID: <CAJKOXPfHzspKWxHcf=DGf73v0sdnG=oDAa-9QLv2eRCHoC9RwQ@mail.gmail.com> (raw)
In-Reply-To: <1548703299-15806-7-git-send-email-l.luba@partner.samsung.com>

On Mon, 28 Jan 2019 at 20:21, Lukasz Luba <l.luba@partner.samsung.com> wrote:
>
> Add description of Dynamic Memory Controller and PPMU counters.
> They are used by exynos5-dmc driver.
>
> CC: Rob Herring <robh+dt@kernel.org>
> CC: Mark Rutland <mark.rutland@arm.com>
> CC: Kukjin Kim <kgene@kernel.org>
> CC: Krzysztof Kozlowski <krzk@kernel.org>
> CC: devicetree@vger.kernel.org
> CC: linux-arm-kernel@lists.infradead.org
> CC: linux-samsung-soc@vger.kernel.org
> CC: linux-kernel@vger.kernel.org
> Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
> ---
>  arch/arm/boot/dts/exynos5420.dtsi             | 81 +++++++++++++++++++++++++++
>  arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 22 ++++++++
>  2 files changed, 103 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
> index aaff158..6880d13 100644
> --- a/arch/arm/boot/dts/exynos5420.dtsi
> +++ b/arch/arm/boot/dts/exynos5420.dtsi
> @@ -1337,6 +1337,87 @@
>                                 opp-hz = /bits/ 64 <400000000>;
>                         };
>                 };
> +
> +               ppmu_dmc0_0: ppmu_dmc0_0@10d00000 {
> +                       compatible = "samsung,exynos-ppmu";
> +                       reg = <0x10d00000 0x2000>;
> +                       clocks = <&clock CLK_PCLK_PPMU_DREX0_0>;
> +                       clock-names = "ppmu";
> +                       events {
> +                               ppmu_event_dmc0_0: ppmu-event3-dmc0_0 {
> +                                       event-name = "ppmu-event3-dmc0_0";
> +                               };
> +                       };
> +               };
> +
> +

No need for double line.

> +               ppmu_dmc0_1: ppmu_dmc0_1@10d10000 {
> +                       compatible = "samsung,exynos-ppmu";
> +                       reg = <0x10d10000 0x2000>;
> +                       clocks = <&clock CLK_PCLK_PPMU_DREX0_1>;
> +                       clock-names = "ppmu";
> +                       events {
> +                               ppmu_event_dmc0_1: ppmu-event3-dmc0_1 {
> +                                       event-name = "ppmu-event3-dmc0_1";
> +                               };
> +                       };
> +               };
> +
> +               ppmu_dmc1_0: ppmu_dmc1_0@10d10000 {
> +                       compatible = "samsung,exynos-ppmu";
> +                       reg = <0x10d60000 0x2000>;
> +                       clocks = <&clock CLK_PCLK_PPMU_DREX1_0>;
> +                       clock-names = "ppmu";
> +                       events {
> +                               ppmu_event_dmc1_0: ppmu-event3-dmc1_0 {
> +                                       event-name = "ppmu-event3-dmc1_0";
> +                               };
> +                       };
> +               };
> +
> +               ppmu_dmc1_1: ppmu_dmc1_1@10d70000 {

1. Generic node name, e.g. "ppmu".
2. Please put all ppmu nodes after nocp nodes to group everything logically.

> +                       compatible = "samsung,exynos-ppmu";
> +                       reg = <0x10d70000 0x2000>;
> +                       clocks = <&clock CLK_PCLK_PPMU_DREX1_1>;
> +                       clock-names = "ppmu";
> +                       events {
> +                               ppmu_event_dmc1_1: ppmu-event3-dmc1_1 {
> +                                       event-name = "ppmu-event3-dmc1_1";
> +                               };
> +                       };
> +               };
> +
> +               dmc: dmc@10c20000 {

1. Node name: memory-controller.
2. Put it before nocp nodes.

> +                       compatible = "samsung,exynos5422-dmc";
> +                       reg = <0x10c20000 0x10000>, <0x10c30000 0x10000>,
> +                               <0x10030000 0x1000>, <0x10000000 0x1000>;
> +                       clocks =        <&clock CLK_FOUT_SPLL>,

Weird indentation.

> +                                       <&clock CLK_MOUT_SCLK_SPLL>,
> +                                       <&clock CLK_FF_DOUT_SPLL2>,

Indent all continued lines with first entry (like in other places in this file).

> +                                       <&clock CLK_FOUT_BPLL>,
> +                                       <&clock CLK_MOUT_BPLL>,
> +                                       <&clock CLK_SCLK_BPLL>,
> +                                       <&clock CLK_MOUT_MX_MSPLL_CCORE>,
> +                                       <&clock CLK_MOUT_MX_MSPLL_CCORE_PHY>,
> +                                       <&clock CLK_MOUT_MCLK_CDREX>,
> +                                       <&clock CLK_DOUT_CLK2X_PHY0>,
> +                                       <&clock CLK_CLKM_PHY0>,
> +                                       <&clock CLK_CLKM_PHY1>
> +                                       ;

Join the trailing semicolon with previous lines.

> +                       clock-names =   "fout_spll",
> +                                       "mout_sclk_spll",

Indent all continued lines with first entry (like in other places in this file).

> +                                       "ff_dout_spll2",
> +                                       "fout_bpll",
> +                                       "mout_bpll",
> +                                       "sclk_bpll",
> +                                       "mout_mx_mspll_ccore",
> +                                       "mout_mx_mspll_ccore_phy",
> +                                       "mout_mclk_cdrex",
> +                                       "dout_clk2x_phy0",
> +                                       "clkm_phy0",
> +                                       "clkm_phy1"
> +                                       ;

Join the trailing semicolon with previous lines.
> +               };
>         };
>
>         thermal-zones {
> diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
> index bf09eab..54ee8b2 100644
> --- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
> +++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
> @@ -119,6 +119,28 @@
>         status = "okay";
>  };
>
> +&ppmu_dmc0_0 {
> +       status = "okay";
> +};
> +
> +&ppmu_dmc0_1 {
> +       status = "okay";
> +};
> +
> +&ppmu_dmc1_0 {
> +       status = "okay";
> +};
> +
> +&ppmu_dmc1_1 {
> +       status = "okay";
> +};

Put the new entries respecting alphabetical order (order of label name).

> +
> +&dmc {

The same.

Best regards,
Krzysztof

> +       devfreq-events = <&ppmu_dmc0_0>, <&ppmu_dmc0_1>,
> +                       <&ppmu_dmc1_0>, <&ppmu_dmc1_1>;
> +       status = "okay";
> +};
> +
>  &cpu0 {
>         cpu-supply = <&buck6_reg>;
>  };
> --
> 2.7.4
>

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  reply	other threads:[~2019-01-29 15:14 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1548703299-15806-1-git-send-email-l.luba@partner.samsung.com>
     [not found] ` <CGME20190128192151eucas1p1754d1286ff0f46e8e98796d7583d8e96@eucas1p1.samsung.com>
2019-01-28 19:21   ` [PATCH 1/8] clk: samsung: add needed IDs for DMC clocks in Exynos5420 Lukasz Luba
2019-01-29  0:54     ` Chanwoo Choi
2019-01-29 15:57       ` Lukasz Luba
     [not found] ` <CGME20190128192151eucas1p1d5ad3a851ffc8b56a7a62febdb6d5677@eucas1p1.samsung.com>
2019-01-28 19:21   ` [PATCH 2/8] clk: samsung: add new clocks for DMC for Exynos5422 SoC Lukasz Luba
     [not found] ` <CGME20190128192152eucas1p118c23cce7c1f6d9a961cba8ae8304318@eucas1p1.samsung.com>
2019-01-28 19:21   ` [PATCH 3/8] clk: samsung: add BPLL rate table for Exynos 5422 SoC Lukasz Luba
     [not found] ` <CGME20190128192153eucas1p2d7a796cb89e68c1789069562e91296be@eucas1p2.samsung.com>
2019-01-28 19:21   ` [PATCH 4/8] dt-bindings: devfreq: add DMC device description Lukasz Luba
2019-01-29 14:47     ` Krzysztof Kozlowski
2019-01-29 16:02       ` Lukasz Luba
2019-02-25 13:49         ` Rob Herring
     [not found] ` <CGME20190128192153eucas1p14ea8461ed8f9d94955f2ff4fb3c4c790@eucas1p1.samsung.com>
2019-01-28 19:21   ` [PATCH 5/8] drivers: devfreq: exynos5: add DMC driver Lukasz Luba
2019-01-29 15:03     ` Krzysztof Kozlowski
2019-01-29 16:24       ` Lukasz Luba
     [not found] ` <CGME20190128192154eucas1p2e696de47c5aab0cdb80cff32254daaf9@eucas1p2.samsung.com>
2019-01-28 19:21   ` [PATCH 6/8] DT: arm: exynos: add DMC device for exynos5422 Lukasz Luba
2019-01-29 15:13     ` Krzysztof Kozlowski [this message]
2019-01-29 17:06       ` Lukasz Luba
     [not found] ` <CGME20190128192154eucas1p2719b339d9dd0d11468fd8e8ab171e84e@eucas1p2.samsung.com>
2019-01-28 19:21   ` [PATCH 7/8] drivers: devfreq: events: add Exynos PPMU new events Lukasz Luba
     [not found] ` <CGME20190128192155eucas1p13fa8616c0da161cd2f041ba241dba3d5@eucas1p1.samsung.com>
2019-01-28 19:21   ` [PATCH 8/8] arm: config: exynos: enable DMC driver Lukasz Luba
2019-01-29 15:15     ` Krzysztof Kozlowski

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