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Wed, 06 Apr 2022 23:30:59 -0700 (PDT) MIME-Version: 1.0 References: <20220406233648.21644-1-brad@pensando.io> <20220406233648.21644-4-brad@pensando.io> In-Reply-To: <20220406233648.21644-4-brad@pensando.io> From: Arnd Bergmann Date: Thu, 7 Apr 2022 08:30:43 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 03/11] dt-bindings: mmc: Add Pensando Elba SoC binding To: Brad Larson Cc: Linux ARM , Arnd Bergmann , Linus Walleij , Bartosz Golaszewski , Mark Brown , Serge Semin , Adrian Hunter , Ulf Hansson , Olof Johansson , dac2@pensando.io, "open list:GPIO SUBSYSTEM" , linux-spi , linux-mmc , DTML , Linux Kernel Mailing List X-Provags-ID: V03:K1:q0Pun7zBUqurmAe2GZR3Yy57owvbpa4GvBMIm9LXq1U6y3f0X3c Jb2UIV8RAo2HP4CaPpy5jl/oz4IerMZ0+uBzJp/F0FsbWTdAuT45S89SJUQx8NDmniE6fSJ +45LnM1hP+lqOmalS7bwffDCO63uLq1MqEKIri8MAB4zRtWpN4OzwZeVntnlFQ5eo9enyxU pljQQpX2In0GPMjxy7YOw== X-UI-Out-Filterresults: notjunk:1;V03:K0:HoOesfwag4g=:TZHWiMwJWOagzjivGN9MHK BQKqLtorgjvXymxA1UpRfsSzgdQfIZZqW4sc9GxMVIcHw7oGQhDW7DE9bzv9pm/rJxcEm/FGT bVVyZdN71JCE6Gp/6HDB4YMSdcbvM294YDvuH6J3sRCxOUAOSgOHSu5YY/w1kVHeZqLOeTvQu i4dHNNzqkGKdeauzCcrVN3qdCLYL32yvGXWrqGtMNuWZ58qfiTm66yEImCVCYNmzxIJD+8U+q ulDaF5qFhbuO4cr2kk/oX8ShOXC2pacd1ZJZ6At7Jr2HoM/901D8FN38KcmCUdm7+JHZ04b1t UbjK861JutuvxcHyBbNTHxzTg6LjzHDP0f50Ey4IwGblVvYGXzN/ZZ9FTAEPGh/3HFd4S5cxn Z/ucG7nYZCYN72gad7BABc69Wvld5nUhTwL1mkkhoE400kfqDrILBflD2v4UYI3nt5Hs+gEzB +/Dry6hBdMKJSKJnIjprZIEGdA9FzMM20tCLqyDnaS3828skI4Ff80m8ECIrvcMuYDaixRHrA kV6Wh4o8IlSndyopASqWEGT6NyLwJzPe4A69C7cPaojzM/Vq2Pzqmp43YX9JUDqt4ihqtn/F+ GqHydoZ3EPhkEnkssOTWG4sIFiZ/+409cvqlbRJUL1ft+BU+gWga5I2Ewp3dlIYVbgMP9anBw g05wdnM5qICU+ZAOMfIrsKzFGhndQjeV+B5ZRgnEZKo+hYFyi8PWQSWHkHGhqmkws2e0= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220406_233102_897224_917803B2 X-CRM114-Status: GOOD ( 20.23 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Apr 7, 2022 at 1:36 AM Brad Larson wrote: > > Pensando Elba ARM 64-bit SoC is integrated with this IP and > explicitly controls byte-lane enables resulting in an additional > reg property resource. > > Signed-off-by: Brad Larson > --- > Change from V3: > - Change from elba-emmc to elba-sd4hc to match file convention > - Use minItems: 1 and maxItems: 2 to pass schema check > > Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml > index 4207fed62dfe..278a71b27488 100644 > --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml > +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml > @@ -19,10 +19,12 @@ properties: > - enum: > - microchip,mpfs-sd4hc > - socionext,uniphier-sd4hc > + - pensando,elba-sd4hc > - const: cdns,sd4hc > > reg: > - maxItems: 1 > + minItems: 1 > + maxItems: 2 > Shouldn't the binding describe what the register areas are? If there is only one of them, it is fairly clear, but when you have the choice between one and two, it gets ambiguous, and there is a risk that another SoC might have a different register area in the second entry, making it incompatible. Arnd _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel