From: sachin.kamat@linaro.org (Sachin Kamat)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] clk: exynos5250: fix sysmmu_mfc{l,r} gate clocks
Date: Wed, 18 Dec 2013 23:39:58 +0530 [thread overview]
Message-ID: <CAK9yfHzs+T0g0qy-EALFkrKFybdJDAQ3ZGAoYovZO8PDaWM4QA@mail.gmail.com> (raw)
In-Reply-To: <2996623.YXg5JqReYS@flatron>
Hi Tomasz,
On 10 November 2013 22:38, Tomasz Figa <tomasz.figa@gmail.com> wrote:
> Hi Sachin, Andrew,
>
> On Friday 08 of November 2013 15:44:07 Sachin Kamat wrote:
>> From: Andrew Bresticker <abrestic@chromium.org>
>>
>> The gate clocks for the MFC sysmmus appear to be flipped, i.e.
>> GATE_IP_MFC[2] gates sysmmu_mfcl and GATE_IP_MFC[1] gates sysmmu_mfcr.
>> Fix this so that the MFC will start up.
>
> Wow, this means that there is a mistake in the documentation. Not that
> I'm surprised, though.
>
> I guess you are sure about this, so:
>
> Reviewed-by: Tomasz Figa <t.figa@samsung.com>
I believe you are going to take this through your tree along with a
few others which you have already reviewed?
--
With warm regards,
Sachin
next prev parent reply other threads:[~2013-12-18 18:09 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-11-08 10:14 [PATCH 1/3] clk: exynos5250: save/restore EPLL0 configuration Sachin Kamat
2013-11-08 10:14 ` [PATCH 2/3] clk: exynos5250: fix sysmmu_mfc{l,r} gate clocks Sachin Kamat
2013-11-10 17:08 ` Tomasz Figa
2013-11-11 3:11 ` Sachin Kamat
2013-12-18 18:09 ` Sachin Kamat [this message]
2013-12-18 18:28 ` Tomasz Figa
2013-12-18 19:24 ` Mike Turquette
2013-12-19 0:36 ` Tomasz Figa
2013-12-19 14:10 ` Tomasz Figa
2013-12-19 15:35 ` Sachin Kamat
2013-11-08 10:14 ` [PATCH 3/3] clk: exynos5250: register APLL rate table Sachin Kamat
2013-11-10 17:14 ` Tomasz Figa
2013-12-19 3:44 ` Sachin Kamat
2013-12-31 3:16 ` Sachin Kamat
2014-01-02 15:22 ` Tomasz Figa
2013-11-08 10:21 ` [PATCH 1/3] clk: exynos5250: save/restore EPLL0 configuration Sachin Kamat
2013-11-10 17:01 ` Tomasz Figa
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