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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=5ZAiBJfMr1e3jv2AqbnrLwo9rY/3z0+Vb7cGGgBQokU=; b=IBMxg3YKkcntZcg+QQCloWTrvU5Al12tVraTQZp6+T+3vgxBtAfkKHcd0Llvpjx4SY V8FOtJ4RfVA4Yz9fLUBCVm3yQUrznuKJk7S7O0Le98qtU6jjKyXOtxw3F3r/uF7N5bq5 3zYioDG7mh+862uTouNG+3RLMq+H9I0WLwu7eq15CIa9oGq2VHLDTvaRyVWdnZeu+q18 41C872aEWTtgzqX7H2QLwwddwdKA3UdoqgodY+XDjOViD3ti+9DUAQNudAAXMna1EOhy blERzUVAiZ9ZbSBdNeCjkJlsQ+lxgUPW+jC7iV7094TzYvUiw1LOBrqtRkRKXVAo17Um FUhg== X-Gm-Message-State: AHQUAuZSsdFPsjjSsFUUTSBuPtwOwzy5T3gv4PO/0RrfqEyuxIrMnycp 09eZlpHy3zAoYm//DCuf4g/UGJm9R/WPzLyfQCcwEA== X-Google-Smtp-Source: AHgI3Iad9gAGS1j8FksLaQFkKwhxUTDyoEi8I45rGdjROB+c8nyqJVxhfvGFKF7ZlUcS8Q0R1pbOuvna3w5AZjyR+yo= X-Received: by 2002:a5e:d609:: with SMTP id w9mr15920226iom.170.1550582137794; Tue, 19 Feb 2019 05:15:37 -0800 (PST) MIME-Version: 1.0 References: <20190218170245.14915-1-steve.capper@arm.com> <20190219124825.GH8501@fuggles.cambridge.arm.com> <20190219130138.GI8501@fuggles.cambridge.arm.com> In-Reply-To: <20190219130138.GI8501@fuggles.cambridge.arm.com> From: Ard Biesheuvel Date: Tue, 19 Feb 2019 14:15:26 +0100 Message-ID: Subject: Re: [PATCH 0/9] 52-bit kernel + user VAs To: Will Deacon X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190219_051538_979498_ED6527BD X-CRM114-Status: GOOD ( 32.29 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marc Zyngier , Catalin Marinas , crecklin@redhat.com, linux-arm-kernel , Steve Capper Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 19 Feb 2019 at 14:01, Will Deacon wrote: > > On Tue, Feb 19, 2019 at 01:51:51PM +0100, Ard Biesheuvel wrote: > > On Tue, 19 Feb 2019 at 13:48, Will Deacon wrote: > > > > > > On Tue, Feb 19, 2019 at 01:13:32PM +0100, Ard Biesheuvel wrote: > > > > On Mon, 18 Feb 2019 at 18:05, Steve Capper wrote: > > > > > > > > > > This patch series adds support for 52-bit kernel VAs using some of the > > > > > machinery already introduced by the 52-bit userspace VA code in 5.0. > > > > > > > > > > As 52-bit virtual address support is an optional hardware feature, > > > > > software support for 52-bit kernel VAs needs to be deduced at early boot > > > > > time. If HW support is not available, the kernel falls back to 48-bit. > > > > > > > > > > A significant proportion of this series focuses on "de-constifying" > > > > > VA_BITS related constants. > > > > > > > > > > In order to allow for a KASAN shadow that changes size at boot time, one > > > > > must fix the KASAN_SHADOW_END for both 48 & 52-bit VAs and "grow" the > > > > > start address. Also, it is highly desirable to maintain the same > > > > > function addresses in the kernel .text between VA sizes. Both of these > > > > > requirements necessitate us to flip the kernel address space halves s.t. > > > > > the direct linear map occupies the lower addresses. > > > > > > > > > > One obvious omission is 52-bit kernel VA + 48-bit userspace VA which I > > > > > can add with some more #ifdef'ery if needed. > > > > > > > > > > > > > Hi Steve, > > > > > > > > Apologies if I am bringing up things that have been addressed > > > > internally already. We discussed the 52-bit kernel VA work at > > > > plumber's at some point, and IIUC, KASAN is the complicating factor > > > > when it comes to having compile time constants for VA_BITS_MIN, > > > > VA_BITS_MAX and PAGE_OFFSET, right? > > > > > > > > To clarify what I mean, please refer to the diagram below, which > > > > describes a hybrid 48/52 kernel VA arrangement that does not rely on > > > > runtime variable quantities. (VA_BITS_MIN == 48, VA_BITS_MAX == 52) > > > > > > > > +------------------- (~0) -------------------------+ > > > > | | > > > > | PCI IO / fixmap spaces | > > > > | | > > > > +------------------------------------------------+ > > > > | | > > > > | kernel/vmalloc space | > > > > | | > > > > +------------------------------------------------+ > > > > | | > > > > | module space | > > > > | | > > > > +------------------------------------------------+ > > > > | | > > > > | BPF space | > > > > | | > > > > +------------------------------------------------+ > > > > | | > > > > | | > > > > | vmemmap space (size based on VA_BITS_MAX) | > > > > | | > > > > | | > > > > +-- linear/vmalloc split based on VA_BITS_MIN -- + > > > > | | > > > > | linear mapping (48 bit addressable region) | > > > > | | > > > > +------------------------------------------------+ > > > > | | > > > > | linear mapping (52 bit addressable region) | > > > > | | > > > > +------ PAGE_OFFSET based on VA_BITS_MAX --------+ > > > > > > > > Since KASAN is what is preventing this, would it be acceptable for > > > > KASAN to only be supported when you use a true 48 bit or a true 52 bit > > > > configuration, and disable it for the 48/52 hybrid configuration? > > > > > > > > Just thinking out loud (and in ASCII art :-)) > > > > > > TBH, if we end up having support for 52-bit kernel VA, I'd be inclined to > > > drop the 48/52 configuration altogether. But Catalin's on holiday at the > > > moment, and may have a different opinion ;) > > > > > > > But that implies that you cannot have an image that supports 52-bit > > kernel VAs but can still boot on hardware that does not implement > > support for it. If that is acceptable, then none of this hoop jumping > > that Steve is doing in these patches is necessary to begin with, > > right? > > Sorry, I misunderstood what you meant by a "48/52 hybrid configuration". I > thought you were referring to the configuration where userspace is 52-bit > and the kernel is 48-bit, which is something I think we can drop if we gain > support for 52-bit kernel. > > Now that I understand what you mean, I think disabling KASAN would be fine > as long as it's a runtime thing and the kernel continues to work in every > other respect. > No, it would be a limitation of the 52-bit config which also supports 48-bit-VA-only-h/w that the address space is laid out in such a way that there is simply no room for the KASAN shadow region, since it would have to live in the 48-bit addressable area, but be big enough to cover 52 bits of VA, which is impossible. For the vmemmap space, we could live with sizing it statically to cover a 52-bit VA linear region, but the KASAN shadow region is simply too big. So if KASAN support in that configuration is a requirement, then I agree with Steve's approach, but it does imply that quite a number of formerly compile-time constants now get turned into runtime variables. Steve, do you have any idea what the impact of that is? _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel