[PATCH 0/2] PCI: brcmstb: Use "num-lanes" DT property if present

[PATCH 0/2] PCI: brcmstb: Use "num-lanes" DT property if present

[Jim Quinlan]

If present, grok the "num-lanes" DT property for Broadcom STB chips and
configure accordingly.

Jim Quinlan (2):
  dt-bindings: PCI: brcm,stb-pcie: Add num-lanes property
  PCI: brcmstb: Use "num-lanes" DT property if present

 .../bindings/pci/brcm,stb-pcie.yaml           |  2 ++
 drivers/pci/controller/pcie-brcmstb.c         | 26 ++++++++++++++++++-
 2 files changed, 27 insertions(+), 1 deletion(-)


base-commit: 01f95500a162fca88cefab9ed64ceded5afabc12
-- 
2.43.0

[PATCH 1/2] dt-bindings: PCI: brcm,stb-pcie: Add num-lanes property

[Jim Quinlan]

Add optional num-lanes property Broadcom STB PCIe host controllers.

Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
---
 Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
index 29f0e1eb5096..f31d654ac3a0 100644
--- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
@@ -107,6 +107,8 @@ properties:
       - const: bridge
       - const: swinit
 
+  num-lanes: true
+
 required:
   - compatible
   - reg
-- 
2.43.0

[PATCH 2/2] PCI: brcmstb: Use "num-lanes" DT property if present

[Jim Quinlan]

By default, we use automatic HW negotiation to ascertain the number of
lanes of the PCIe connection.  If the "num-lanes" DT property is present,
assume that the chip's built-in capability information is incorrect or
undesired, and use the specified value instead.

Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
---
 drivers/pci/controller/pcie-brcmstb.c | 26 +++++++++++++++++++++++++-
 1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
index e19628e13898..76fd4f515898 100644
--- a/drivers/pci/controller/pcie-brcmstb.c
+++ b/drivers/pci/controller/pcie-brcmstb.c
@@ -46,6 +46,7 @@
 #define  PCIE_RC_CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK	0xffffff
 
 #define PCIE_RC_CFG_PRIV1_LINK_CAPABILITY			0x04dc
+#define  PCIE_RC_CFG_PRIV1_LINK_CAPABILITY_MAX_LINK_WIDTH_MASK	0x1f0
 #define  PCIE_RC_CFG_PRIV1_LINK_CAPABILITY_ASPM_SUPPORT_MASK	0xc00
 
 #define PCIE_RC_CFG_PRIV1_ROOT_CAP			0x4f8
@@ -55,6 +56,9 @@
 #define PCIE_RC_DL_MDIO_WR_DATA				0x1104
 #define PCIE_RC_DL_MDIO_RD_DATA				0x1108
 
+#define PCIE_RC_PL_REG_PHY_CTL_1			0x1804
+#define  PCIE_RC_PL_REG_PHY_CTL_1_REG_P2_POWERDOWN_ENA_NOSYNC_MASK	0x8
+
 #define PCIE_RC_PL_PHY_CTL_15				0x184c
 #define  PCIE_RC_PL_PHY_CTL_15_DIS_PLL_PD_MASK		0x400000
 #define  PCIE_RC_PL_PHY_CTL_15_PM_CLK_PERIOD_MASK	0xff
@@ -1072,7 +1076,7 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie)
 	void __iomem *base = pcie->base;
 	struct pci_host_bridge *bridge;
 	struct resource_entry *entry;
-	u32 tmp, burst, aspm_support;
+	u32 tmp, burst, aspm_support, num_lanes, num_lanes_cap;
 	u8 num_out_wins = 0;
 	int num_inbound_wins = 0;
 	int memc, ret;
@@ -1180,6 +1184,26 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie)
 		PCIE_RC_CFG_PRIV1_LINK_CAPABILITY_ASPM_SUPPORT_MASK);
 	writel(tmp, base + PCIE_RC_CFG_PRIV1_LINK_CAPABILITY);
 
+	/* 'tmp' still holds the contents of PRIV1_LINK_CAPABILITY */
+	num_lanes_cap = u32_get_bits(tmp, PCIE_RC_CFG_PRIV1_LINK_CAPABILITY_MAX_LINK_WIDTH_MASK);
+	num_lanes = 0;
+	/*
+	 * Use automatic num-lanes HW negotiation by default.  If the
+	 * "num-lanes" DT property is present, assume that the chip's
+	 * built-in link width capability information is
+	 * incorrect/undesired and use the specified value instead.
+	 */
+	if (!of_property_read_u32(pcie->np, "num-lanes", &num_lanes) &&
+	    num_lanes && num_lanes_cap != num_lanes) {
+		u32p_replace_bits(&tmp, num_lanes,
+			PCIE_RC_CFG_PRIV1_LINK_CAPABILITY_MAX_LINK_WIDTH_MASK);
+		writel(tmp, base + PCIE_RC_CFG_PRIV1_LINK_CAPABILITY);
+		tmp = readl(base + PCIE_RC_PL_REG_PHY_CTL_1);
+		u32p_replace_bits(&tmp, 1,
+			PCIE_RC_PL_REG_PHY_CTL_1_REG_P2_POWERDOWN_ENA_NOSYNC_MASK);
+		writel(tmp, base + PCIE_RC_PL_REG_PHY_CTL_1);
+	}
+
 	/*
 	 * For config space accesses on the RC, show the right class for
 	 * a PCIe-PCIe bridge (the default setting is to be EP mode).
-- 
2.43.0

Re: [PATCH 1/2] dt-bindings: PCI: brcm,stb-pcie: Add num-lanes property

[Florian Fainelli]

On 5/10/2025 12:28 AM, Jim Quinlan wrote:
> Add optional num-lanes property Broadcom STB PCIe host controllers.
> 
> Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>

Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
-- 
Florian

Re: [PATCH 2/2] PCI: brcmstb: Use "num-lanes" DT property if present

[Florian Fainelli]

On 5/10/2025 12:28 AM, Jim Quinlan wrote:
> By default, we use automatic HW negotiation to ascertain the number of
> lanes of the PCIe connection.  If the "num-lanes" DT property is present,
> assume that the chip's built-in capability information is incorrect or
> undesired, and use the specified value instead.
> 
> Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>

Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
-- 
Florian

Re: [PATCH 1/2] dt-bindings: PCI: brcm,stb-pcie: Add num-lanes property

[Rob Herring]

On Fri, May 9, 2025 at 5:28 PM Jim Quinlan <james.quinlan@broadcom.com> wrote:
>
> Add optional num-lanes property Broadcom STB PCIe host controllers.
>
> Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
> ---
>  Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
> index 29f0e1eb5096..f31d654ac3a0 100644
> --- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
> @@ -107,6 +107,8 @@ properties:
>        - const: bridge
>        - const: swinit
>
> +  num-lanes: true

Why do you need this? It is already allowed by the referenced schemas.
Though maybe you don't support 16 lanes and need to limit this to
something less? I would also set 'default' if you do that.

Rob

Re: [PATCH 1/2] dt-bindings: PCI: brcm,stb-pcie: Add num-lanes property

[Jim Quinlan]

[-- Attachment #1: Type: text/plain, Size: 1391 bytes --]

On Mon, May 12, 2025 at 11:01 AM Rob Herring <robh@kernel.org> wrote:
>
> On Fri, May 9, 2025 at 5:28 PM Jim Quinlan <james.quinlan@broadcom.com> wrote:
> >
> > Add optional num-lanes property Broadcom STB PCIe host controllers.
> >
> > Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
> > ---
> >  Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml | 2 ++
> >  1 file changed, 2 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
> > index 29f0e1eb5096..f31d654ac3a0 100644
> > --- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
> > +++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
> > @@ -107,6 +107,8 @@ properties:
> >        - const: bridge
> >        - const: swinit
> >
> > +  num-lanes: true
>
> Why do you need this? It is already allowed by the referenced schemas.
> Though maybe you don't support 16 lanes and need to limit this to
> something less? I would also set 'default' if you do that.


I just thought that if our driver actually did something with
"num-lanes" -- most drivers do not --  then it should be mentioned  in
the YAML, even if "num-lanes" is pre-defined.

At any rate we cannot handle 16 lanes so I will add a "default" and "maximum".

Regards,
Jim Quinlan
Broadcom STB
>
>
> Rob

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[PATCH 1/2] dt-bindings: PCI: brcm,stb-pcie: Add num-lanes property

[Jim Quinlan]

Add optional num-lanes property Broadcom STB PCIe host controllers.

Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
---
 Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
index 29f0e1eb5096..cba227b19a5f 100644
--- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
@@ -107,6 +107,10 @@ properties:
       - const: bridge
       - const: swinit
 
+  num-lanes:
+    default: 1
+    maximum: 4
+
 required:
   - compatible
   - reg
-- 
2.43.0

Re: [PATCH 1/2] dt-bindings: PCI: brcm,stb-pcie: Add num-lanes property

[Florian Fainelli]

On 5/30/25 15:40, Jim Quinlan wrote:
> Add optional num-lanes property Broadcom STB PCIe host controllers.
> 
> Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>

Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
-- 
Florian

Re: [PATCH 1/2] dt-bindings: PCI: brcm,stb-pcie: Add num-lanes property

[Florian Fainelli]

On 5/30/25 16:32, Florian Fainelli wrote:
> On 5/30/25 15:40, Jim Quinlan wrote:
>> Add optional num-lanes property Broadcom STB PCIe host controllers.
>>
>> Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
> 
> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>

Sorry I take that back, I think this should be:

num-lanes:
   enum: [ 1, 2, 4 ]

We are basically documenting the allowed values, not specifying that we 
can repeat the num-lames property between 1 and 4 times.
-- 
Florian

Re: [PATCH 1/2] dt-bindings: PCI: brcm,stb-pcie: Add num-lanes property

[Jim Quinlan]

[-- Attachment #1: Type: text/plain, Size: 719 bytes --]

On Tue, Jun 3, 2025 at 12:24 PM Florian Fainelli
<florian.fainelli@broadcom.com> wrote:
>
> On 5/30/25 16:32, Florian Fainelli wrote:
> > On 5/30/25 15:40, Jim Quinlan wrote:
> >> Add optional num-lanes property Broadcom STB PCIe host controllers.
> >>
> >> Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
> >
> > Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
>
> Sorry I take that back, I think this should be:
>
> num-lanes:
>    enum: [ 1, 2, 4 ]
>
> We are basically documenting the allowed values, not specifying that we
> can repeat the num-lames property between 1 and 4 times.

num-lanes is already defined as

    enum: [ 1, 2, 4, 8, 16, 32 ]

> --
> Florian

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Re: [PATCH 1/2] dt-bindings: PCI: brcm,stb-pcie: Add num-lanes property

[Florian Fainelli]

On 6/3/25 10:16, Jim Quinlan wrote:
> On Tue, Jun 3, 2025 at 12:24 PM Florian Fainelli
> <florian.fainelli@broadcom.com> wrote:
>>
>> On 5/30/25 16:32, Florian Fainelli wrote:
>>> On 5/30/25 15:40, Jim Quinlan wrote:
>>>> Add optional num-lanes property Broadcom STB PCIe host controllers.
>>>>
>>>> Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
>>>
>>> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
>>
>> Sorry I take that back, I think this should be:
>>
>> num-lanes:
>>     enum: [ 1, 2, 4 ]
>>
>> We are basically documenting the allowed values, not specifying that we
>> can repeat the num-lames property between 1 and 4 times.
> 
> num-lanes is already defined as
> 
>      enum: [ 1, 2, 4, 8, 16, 32 ]

Right, but then we need to re-define it with our own specific 
constraints, still, don't we?
-- 
Florian

Re: [PATCH 1/2] dt-bindings: PCI: brcm,stb-pcie: Add num-lanes property

[Jim Quinlan]

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On Tue, Jun 3, 2025 at 1:17 PM Florian Fainelli
<florian.fainelli@broadcom.com> wrote:
>
> On 6/3/25 10:16, Jim Quinlan wrote:
> > On Tue, Jun 3, 2025 at 12:24 PM Florian Fainelli
> > <florian.fainelli@broadcom.com> wrote:
> >>
> >> On 5/30/25 16:32, Florian Fainelli wrote:
> >>> On 5/30/25 15:40, Jim Quinlan wrote:
> >>>> Add optional num-lanes property Broadcom STB PCIe host controllers.
> >>>>
> >>>> Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
> >>>
> >>> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
> >>
> >> Sorry I take that back, I think this should be:
> >>
> >> num-lanes:
> >>     enum: [ 1, 2, 4 ]
> >>
> >> We are basically documenting the allowed values, not specifying that we
> >> can repeat the num-lames property between 1 and 4 times.
> >
> > num-lanes is already defined as
> >
> >      enum: [ 1, 2, 4, 8, 16, 32 ]
>
> Right, but then we need to re-define it with our own specific
> constraints, still, don't we?
We do; there is the provided enum and we provide the maximum and minimum.
The AND-ing of all constraints yields [1, 2, 4].
Also, I'm not sure one can redefine an existing property or would want to.

> --
> Florian

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Re: [PATCH 1/2] dt-bindings: PCI: brcm,stb-pcie: Add num-lanes property

[Rob Herring]

On Tue, Jun 03, 2025 at 10:17:26AM -0700, Florian Fainelli wrote:
> On 6/3/25 10:16, Jim Quinlan wrote:
> > On Tue, Jun 3, 2025 at 12:24 PM Florian Fainelli
> > <florian.fainelli@broadcom.com> wrote:
> > > 
> > > On 5/30/25 16:32, Florian Fainelli wrote:
> > > > On 5/30/25 15:40, Jim Quinlan wrote:
> > > > > Add optional num-lanes property Broadcom STB PCIe host controllers.
> > > > > 
> > > > > Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
> > > > 
> > > > Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
> > > 
> > > Sorry I take that back, I think this should be:
> > > 
> > > num-lanes:
> > >     enum: [ 1, 2, 4 ]
> > > 
> > > We are basically documenting the allowed values, not specifying that we
> > > can repeat the num-lames property between 1 and 4 times.

Are you confused with maxItems?

> > 
> > num-lanes is already defined as
> > 
> >      enum: [ 1, 2, 4, 8, 16, 32 ]
> 
> Right, but then we need to re-define it with our own specific constraints,
> still, don't we?

It is correct as-is.

Rob

Re: [PATCH 1/2] dt-bindings: PCI: brcm,stb-pcie: Add num-lanes property

[Rob Herring (Arm)]

On Fri, 30 May 2025 18:40:32 -0400, Jim Quinlan wrote:
> Add optional num-lanes property Broadcom STB PCIe host controllers.
> 
> Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
> ---
>  Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml | 4 ++++
>  1 file changed, 4 insertions(+)
> 

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>

Re: [PATCH 1/2] dt-bindings: PCI: brcm,stb-pcie: Add num-lanes property

[Florian Fainelli]

On 6/5/25 15:36, Rob Herring wrote:
> On Tue, Jun 03, 2025 at 10:17:26AM -0700, Florian Fainelli wrote:
>> On 6/3/25 10:16, Jim Quinlan wrote:
>>> On Tue, Jun 3, 2025 at 12:24 PM Florian Fainelli
>>> <florian.fainelli@broadcom.com> wrote:
>>>>
>>>> On 5/30/25 16:32, Florian Fainelli wrote:
>>>>> On 5/30/25 15:40, Jim Quinlan wrote:
>>>>>> Add optional num-lanes property Broadcom STB PCIe host controllers.
>>>>>>
>>>>>> Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
>>>>>
>>>>> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
>>>>
>>>> Sorry I take that back, I think this should be:
>>>>
>>>> num-lanes:
>>>>      enum: [ 1, 2, 4 ]
>>>>
>>>> We are basically documenting the allowed values, not specifying that we
>>>> can repeat the num-lames property between 1 and 4 times.
> 
> Are you confused with maxItems?

Yes I am.

> 
>>>
>>> num-lanes is already defined as
>>>
>>>       enum: [ 1, 2, 4, 8, 16, 32 ]
>>
>> Right, but then we need to re-define it with our own specific constraints,
>> still, don't we?
> 
> It is correct as-is.

Thanks!
-- 
Florian