[PATCH v2 1/2] dt-bindings: gpu: Add Mali Utgard bindings

[PATCH v2 1/2] dt-bindings: gpu: Add Mali Utgard bindings

[Maxime Ripard]

The ARM Mali Utgard GPU family is embedded into a number of SoCs from
Allwinner, Amlogic, Mediatek or Rockchip.

Add a binding for the GPU of that family.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

---

Changes from v1:
  - Dropped the arm,mali-utgard compatible
  - Made the clocks mandatory
  - Added Linus Walleij Reviewed-by, and the ST compatible for the Mali
---
 Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt | 79 ++++++++-
 1 file changed, 79 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt

diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
new file mode 100644
index 000000000000..ba0edcdd1b00
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
@@ -0,0 +1,79 @@
+ARM Mali Utgard GPU
+===================
+
+Required properties:
+  - compatible
+    * Must be one of the following:
+      + "arm,mali-300"
+      + "arm,mali-400"
+      + "arm,mali-450"
+    * And, optionally, one of the vendor specific compatible:
+      + allwinner,sun4i-a10-mali
+      + allwinner,sun7i-a20-mali
+
+  - reg: Physical base address and length of the GPU registers
+
+  - interrupts: an entry for each entry in interrupt-names.
+    See ../interrupt-controller/interrupts.txt for details.
+
+  - interrupt-names:
+    * ppX: Pixel Processor X interrupt (X from 0 to 7)
+    * ppmmuX: Pixel Processor X MMU interrupt (X from 0 to 7)
+    * pp: Pixel Processor broadcast interrupt (mali-450 only)
+    * gp: Geometry Processor interrupt
+    * gpmmu: Geometry Processor MMU interrupt
+
+  - clocks: an entry for each entry in clock-names
+  - clock-names:
+    * bus: bus clock for the GPU
+    * core: clock driving the GPU itself
+
+Optional properties:
+  - interrupt-names and interrupts:
+    * pmu: Power Management Unit interrupt, if implemented in hardware
+
+Vendor-specific bindings
+------------------------
+
+The Mali GPU is integrated very differently from one SoC to
+another. In order to accomodate those differences, you have the option
+to specify one more vendor-specific compatible, among:
+
+  - allwinner,sun4i-a10-mali
+    Required properties:
+      * resets: phandle to the reset line for the GPU
+
+  - allwinner,sun7i-a20-mali
+    Required properties:
+      * resets: phandle to the reset line for the GPU
+
+  - stericsson,db8500-mali
+    Required properties:
+      * interrupt-names and interrupts:
+        + combined: combined interrupt of all of the above lines
+
+Example:
+
+mali: gpu at 01c40000 {
+	compatible = "allwinner,sun7i-a20-mali", "arm,mali-400";
+	reg = <0x01c40000 0x10000>;
+	interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+	interrupt-names = "gp",
+			  "gpmmu",
+			  "pp0",
+			  "ppmmu0",
+			  "pp1",
+			  "ppmmu1",
+			  "pmu";
+	clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
+	clock-names = "bus", "core";
+	resets = <&ccu RST_BUS_GPU>;
+};
+
+

base-commit: 49def1853334396f948dcb4cedb9347abb318df5
-- 
git-series 0.8.11

[PATCH v2 2/2] ARM: sun8i: dt: Add mali node

[Maxime Ripard]

The A23 and A33 have an ARM Mali 400 GPU. Now that we have a binding, add
it to our DT.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 arch/arm/boot/dts/sun8i-a23-a33.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index e4991a78ad73..982705719ef2 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -486,6 +486,32 @@
 			#size-cells = <0>;
 		};
 
+		mali: gpu at 01c40000 {
+			compatible = "allwinner,sun8i-a23-mali",
+				     "allwinner,sun7i-a20-mali", "arm,mali-400";
+			reg = <0x01c40000 0x10000>;
+			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "gp",
+					  "gpmmu",
+					  "pp0",
+					  "ppmmu0",
+					  "pp1",
+					  "ppmmu1",
+					  "pmu";
+			clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
+			clock-names = "bus", "core";
+			resets = <&ccu RST_BUS_GPU>;
+
+			assigned-clocks = <&ccu CLK_GPU>;
+			assigned-clock-rates = <408000000>;
+		};
+
 		gic: interrupt-controller at 01c81000 {
 			compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
 			reg = <0x01c81000 0x1000>,
-- 
git-series 0.8.11

[PATCH v2 2/2] ARM: sun8i: dt: Add mali node

[Rob Herring]

On Mon, Jan 23, 2017 at 03:00:46PM +0100, Maxime Ripard wrote:
> The A23 and A33 have an ARM Mali 400 GPU. Now that we have a binding, add
> it to our DT.
> 
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> ---
>  arch/arm/boot/dts/sun8i-a23-a33.dtsi | 26 ++++++++++++++++++++++++++
>  1 file changed, 26 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
> index e4991a78ad73..982705719ef2 100644
> --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
> +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
> @@ -486,6 +486,32 @@
>  			#size-cells = <0>;
>  		};
>  
> +		mali: gpu at 01c40000 {

Drop leading 0.

> +			compatible = "allwinner,sun8i-a23-mali",
> +				     "allwinner,sun7i-a20-mali", "arm,mali-400";
> +			reg = <0x01c40000 0x10000>;

Does this really use 64K or that's just the register spacing? Set it to 
what's used.

> +			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "gp",
> +					  "gpmmu",
> +					  "pp0",
> +					  "ppmmu0",
> +					  "pp1",
> +					  "ppmmu1",
> +					  "pmu";
> +			clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
> +			clock-names = "bus", "core";
> +			resets = <&ccu RST_BUS_GPU>;
> +
> +			assigned-clocks = <&ccu CLK_GPU>;
> +			assigned-clock-rates = <408000000>;
> +		};
> +
>  		gic: interrupt-controller at 01c81000 {
>  			compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
>  			reg = <0x01c81000 0x1000>,
> -- 
> git-series 0.8.11

[PATCH v2 2/2] ARM: sun8i: dt: Add mali node

[Maxime Ripard]

Hi Rob,

On Fri, Jan 27, 2017 at 02:21:19PM -0600, Rob Herring wrote:
> On Mon, Jan 23, 2017 at 03:00:46PM +0100, Maxime Ripard wrote:
> > The A23 and A33 have an ARM Mali 400 GPU. Now that we have a binding, add
> > it to our DT.
> > 
> > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > ---
> >  arch/arm/boot/dts/sun8i-a23-a33.dtsi | 26 ++++++++++++++++++++++++++
> >  1 file changed, 26 insertions(+), 0 deletions(-)
> > 
> > diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
> > index e4991a78ad73..982705719ef2 100644
> > --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
> > +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
> > @@ -486,6 +486,32 @@
> >  			#size-cells = <0>;
> >  		};
> >  
> > +		mali: gpu at 01c40000 {
> 
> Drop leading 0.
> 
> > +			compatible = "allwinner,sun8i-a23-mali",
> > +				     "allwinner,sun7i-a20-mali", "arm,mali-400";
> > +			reg = <0x01c40000 0x10000>;
> 
> Does this really use 64K or that's just the register spacing? Set it
> to what's used.

The memory maps in our datasheet allocates 64k for that block. I
always thought that we had to put the size of the whole memory block
allocated to that device.

For now, the driver only uses space up to 0xe000 (so we wouldn't
"waste" a lot of space anyway), but what if at some point the driver
needs more than what we put in the DT?

Thanks,
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 801 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20170130/3942d0d1/attachment.sig>

[PATCH v2 2/2] ARM: sun8i: dt: Add mali node

[Rob Herring]

On Mon, Jan 30, 2017 at 8:00 AM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> Hi Rob,
>
> On Fri, Jan 27, 2017 at 02:21:19PM -0600, Rob Herring wrote:
>> On Mon, Jan 23, 2017 at 03:00:46PM +0100, Maxime Ripard wrote:
>> > The A23 and A33 have an ARM Mali 400 GPU. Now that we have a binding, add
>> > it to our DT.
>> >
>> > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
>> > ---
>> >  arch/arm/boot/dts/sun8i-a23-a33.dtsi | 26 ++++++++++++++++++++++++++
>> >  1 file changed, 26 insertions(+), 0 deletions(-)
>> >
>> > diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
>> > index e4991a78ad73..982705719ef2 100644
>> > --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
>> > +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
>> > @@ -486,6 +486,32 @@
>> >                     #size-cells = <0>;
>> >             };
>> >
>> > +           mali: gpu at 01c40000 {
>>
>> Drop leading 0.
>>
>> > +                   compatible = "allwinner,sun8i-a23-mali",
>> > +                                "allwinner,sun7i-a20-mali", "arm,mali-400";
>> > +                   reg = <0x01c40000 0x10000>;
>>
>> Does this really use 64K or that's just the register spacing? Set it
>> to what's used.
>
> The memory maps in our datasheet allocates 64k for that block. I
> always thought that we had to put the size of the whole memory block
> allocated to that device.
>
> For now, the driver only uses space up to 0xe000 (so we wouldn't
> "waste" a lot of space anyway), but what if at some point the driver
> needs more than what we put in the DT?

Well, it should be what the h/w is, not what the driver needs.

I only asked because 64K spacing of peripherals is becoming common,
but that wastes a bit of virtual address space on 32-bit if really the
h/w registers are only <4KB. Given that it is 0xe000 in this case, it
doesn't really matter here.

Rob

[PATCH v2 1/2] dt-bindings: gpu: Add Mali Utgard bindings

[Rob Herring]

On Mon, Jan 23, 2017 at 03:00:45PM +0100, Maxime Ripard wrote:
> The ARM Mali Utgard GPU family is embedded into a number of SoCs from
> Allwinner, Amlogic, Mediatek or Rockchip.
> 
> Add a binding for the GPU of that family.
> 
> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> 
> ---
> 
> Changes from v1:
>   - Dropped the arm,mali-utgard compatible
>   - Made the clocks mandatory
>   - Added Linus Walleij Reviewed-by, and the ST compatible for the Mali
> ---
>  Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt | 79 ++++++++-
>  1 file changed, 79 insertions(+), 0 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
> 
> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
> new file mode 100644
> index 000000000000..ba0edcdd1b00
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
> @@ -0,0 +1,79 @@
> +ARM Mali Utgard GPU
> +===================
> +
> +Required properties:
> +  - compatible
> +    * Must be one of the following:
> +      + "arm,mali-300"
> +      + "arm,mali-400"
> +      + "arm,mali-450"
> +    * And, optionally, one of the vendor specific compatible:
> +      + allwinner,sun4i-a10-mali
> +      + allwinner,sun7i-a20-mali

And stericsson,db8500-mali?

> +
> +  - reg: Physical base address and length of the GPU registers
> +
> +  - interrupts: an entry for each entry in interrupt-names.
> +    See ../interrupt-controller/interrupts.txt for details.
> +
> +  - interrupt-names:
> +    * ppX: Pixel Processor X interrupt (X from 0 to 7)
> +    * ppmmuX: Pixel Processor X MMU interrupt (X from 0 to 7)
> +    * pp: Pixel Processor broadcast interrupt (mali-450 only)
> +    * gp: Geometry Processor interrupt
> +    * gpmmu: Geometry Processor MMU interrupt
> +
> +  - clocks: an entry for each entry in clock-names
> +  - clock-names:
> +    * bus: bus clock for the GPU
> +    * core: clock driving the GPU itself

assigned-clocks?

> +
> +Optional properties:
> +  - interrupt-names and interrupts:
> +    * pmu: Power Management Unit interrupt, if implemented in hardware
> +
> +Vendor-specific bindings
> +------------------------
> +
> +The Mali GPU is integrated very differently from one SoC to
> +another. In order to accomodate those differences, you have the option
> +to specify one more vendor-specific compatible, among:
> +
> +  - allwinner,sun4i-a10-mali
> +    Required properties:
> +      * resets: phandle to the reset line for the GPU
> +
> +  - allwinner,sun7i-a20-mali
> +    Required properties:
> +      * resets: phandle to the reset line for the GPU
> +
> +  - stericsson,db8500-mali
> +    Required properties:
> +      * interrupt-names and interrupts:
> +        + combined: combined interrupt of all of the above lines
> +
> +Example:
> +
> +mali: gpu at 01c40000 {

Drop the leading 0.

> +	compatible = "allwinner,sun7i-a20-mali", "arm,mali-400";
> +	reg = <0x01c40000 0x10000>;
> +	interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
> +		     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
> +		     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
> +		     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
> +		     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
> +		     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
> +		     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
> +	interrupt-names = "gp",
> +			  "gpmmu",
> +			  "pp0",
> +			  "ppmmu0",
> +			  "pp1",
> +			  "ppmmu1",
> +			  "pmu";
> +	clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
> +	clock-names = "bus", "core";
> +	resets = <&ccu RST_BUS_GPU>;
> +};
> +
> +
> 
> base-commit: 49def1853334396f948dcb4cedb9347abb318df5
> -- 
> git-series 0.8.11

[PATCH v2 1/2] dt-bindings: gpu: Add Mali Utgard bindings

[Maxime Ripard]

Hi Rob,

On Fri, Jan 27, 2017 at 02:19:13PM -0600, Rob Herring wrote:
> On Mon, Jan 23, 2017 at 03:00:45PM +0100, Maxime Ripard wrote:
> > The ARM Mali Utgard GPU family is embedded into a number of SoCs from
> > Allwinner, Amlogic, Mediatek or Rockchip.
> > 
> > Add a binding for the GPU of that family.
> > 
> > Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
> > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > 
> > ---
> > 
> > Changes from v1:
> >   - Dropped the arm,mali-utgard compatible
> >   - Made the clocks mandatory
> >   - Added Linus Walleij Reviewed-by, and the ST compatible for the Mali
> > ---
> >  Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt | 79 ++++++++-
> >  1 file changed, 79 insertions(+), 0 deletions(-)
> >  create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
> > new file mode 100644
> > index 000000000000..ba0edcdd1b00
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
> > @@ -0,0 +1,79 @@
> > +ARM Mali Utgard GPU
> > +===================
> > +
> > +Required properties:
> > +  - compatible
> > +    * Must be one of the following:
> > +      + "arm,mali-300"
> > +      + "arm,mali-400"
> > +      + "arm,mali-450"
> > +    * And, optionally, one of the vendor specific compatible:
> > +      + allwinner,sun4i-a10-mali
> > +      + allwinner,sun7i-a20-mali
> 
> And stericsson,db8500-mali?

Good catch, I'll add it.

> > +
> > +  - reg: Physical base address and length of the GPU registers
> > +
> > +  - interrupts: an entry for each entry in interrupt-names.
> > +    See ../interrupt-controller/interrupts.txt for details.
> > +
> > +  - interrupt-names:
> > +    * ppX: Pixel Processor X interrupt (X from 0 to 7)
> > +    * ppmmuX: Pixel Processor X MMU interrupt (X from 0 to 7)
> > +    * pp: Pixel Processor broadcast interrupt (mali-450 only)
> > +    * gp: Geometry Processor interrupt
> > +    * gpmmu: Geometry Processor MMU interrupt
> > +
> > +  - clocks: an entry for each entry in clock-names
> > +  - clock-names:
> > +    * bus: bus clock for the GPU
> > +    * core: clock driving the GPU itself
> 
> assigned-clocks?

I didn't put it in there because it's optional, and was looking
orthogonal to me, since it depends on the clock frequency out of reset
and out of the bootloader running (and it's documented already as part
of the generic clock bindings).

Thanks,
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 801 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20170130/86913948/attachment.sig>

[PATCH v2 1/2] dt-bindings: gpu: Add Mali Utgard bindings

[Neil Armstrong]

On 01/30/2017 02:48 PM, Maxime Ripard wrote:
> Hi Rob,
> 
> On Fri, Jan 27, 2017 at 02:19:13PM -0600, Rob Herring wrote:
>> On Mon, Jan 23, 2017 at 03:00:45PM +0100, Maxime Ripard wrote:
>>> The ARM Mali Utgard GPU family is embedded into a number of SoCs from
>>> Allwinner, Amlogic, Mediatek or Rockchip.
>>>
>>> Add a binding for the GPU of that family.
>>>
>>> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
>>> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
>>>
>>> ---
>>>
>>> Changes from v1:
>>>   - Dropped the arm,mali-utgard compatible
>>>   - Made the clocks mandatory
>>>   - Added Linus Walleij Reviewed-by, and the ST compatible for the Mali
>>> ---
>>>  Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt | 79 ++++++++-
>>>  1 file changed, 79 insertions(+), 0 deletions(-)
>>>  create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
>>>
>>> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
>>> new file mode 100644
>>> index 000000000000..ba0edcdd1b00
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
>>> @@ -0,0 +1,79 @@
>>> +ARM Mali Utgard GPU
>>> +===================
>>> +
>>> +Required properties:
>>> +  - compatible
>>> +    * Must be one of the following:
>>> +      + "arm,mali-300"
>>> +      + "arm,mali-400"
>>> +      + "arm,mali-450"
>>> +    * And, optionally, one of the vendor specific compatible:
>>> +      + allwinner,sun4i-a10-mali
>>> +      + allwinner,sun7i-a20-mali
>>
>> And stericsson,db8500-mali?
> 
> Good catch, I'll add it.

I think you can safely add the following :

amlogic,meson-gxbb-mali
amlogic,meson-gxl-mali

Neil


-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: OpenPGP digital signature
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20170130/7ef90662/attachment-0001.sig>

[PATCH v2 1/2] dt-bindings: gpu: Add Mali Utgard bindings

[Maxime Ripard]

On Mon, Jan 30, 2017 at 05:24:06PM +0100, Neil Armstrong wrote:
> >>> @@ -0,0 +1,79 @@
> >>> +ARM Mali Utgard GPU
> >>> +===================
> >>> +
> >>> +Required properties:
> >>> +  - compatible
> >>> +    * Must be one of the following:
> >>> +      + "arm,mali-300"
> >>> +      + "arm,mali-400"
> >>> +      + "arm,mali-450"
> >>> +    * And, optionally, one of the vendor specific compatible:
> >>> +      + allwinner,sun4i-a10-mali
> >>> +      + allwinner,sun7i-a20-mali
> >>
> >> And stericsson,db8500-mali?
> > 
> > Good catch, I'll add it.
> 
> I think you can safely add the following :
> 
> amlogic,meson-gxbb-mali
> amlogic,meson-gxl-mali

Ack. Do you need any extra properties?

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 801 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20170131/5555c9f5/attachment.sig>

[PATCH v2 1/2] dt-bindings: gpu: Add Mali Utgard bindings

[Neil Armstrong]

On 01/31/2017 10:56 AM, Maxime Ripard wrote:
> On Mon, Jan 30, 2017 at 05:24:06PM +0100, Neil Armstrong wrote:
>>>>> @@ -0,0 +1,79 @@
>>>>> +ARM Mali Utgard GPU
>>>>> +===================
>>>>> +
>>>>> +Required properties:
>>>>> +  - compatible
>>>>> +    * Must be one of the following:
>>>>> +      + "arm,mali-300"
>>>>> +      + "arm,mali-400"
>>>>> +      + "arm,mali-450"
>>>>> +    * And, optionally, one of the vendor specific compatible:
>>>>> +      + allwinner,sun4i-a10-mali
>>>>> +      + allwinner,sun7i-a20-mali
>>>>
>>>> And stericsson,db8500-mali?
>>>
>>> Good catch, I'll add it.
>>
>> I think you can safely add the following :
>>
>> amlogic,meson-gxbb-mali
>> amlogic,meson-gxl-mali
> 
> Ack. Do you need any extra properties?
> 
> Maxime
> 

Hi Maxime,

No, it's ok with the generic properties, there is not reset lines for mali on Meson GX SoCs.

Neil

-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: OpenPGP digital signature
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20170131/e19f7f86/attachment.sig>