From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Yu Chien Peter Lin <peterlin@andestech.com>
Cc: acme@kernel.org, adrian.hunter@intel.com,
ajones@ventanamicro.com, alexander.shishkin@linux.intel.com,
andre.przywara@arm.com, anup@brainfault.org,
aou@eecs.berkeley.edu, atishp@atishpatra.org,
conor+dt@kernel.org, conor.dooley@microchip.com,
conor@kernel.org, devicetree@vger.kernel.org,
dminus@andestech.com, evan@rivosinc.com, guoren@kernel.org,
heiko@sntech.de, irogers@google.com, jernej.skrabec@gmail.com,
jolsa@kernel.org, jszhang@kernel.org,
krzysztof.kozlowski+dt@linaro.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
linux-renesas-soc@vger.kernel.org,
linux-riscv@lists.infradead.org, linux-sunxi@lists.linux.dev,
locus84@andestech.com, magnus.damm@gmail.com,
mark.rutland@arm.com, mingo@redhat.com, n.shubin@yadro.com,
namhyung@kernel.org, palmer@dabbelt.com,
paul.walmsley@sifive.com, peterz@infradead.org,
prabhakar.mahadev-lad.rj@bp.renesas.com, rdunlap@infradead.org,
robh+dt@kernel.org, samuel@sholland.org,
sunilvl@ventanamicro.com, tglx@linutronix.de,
tim609@andestech.com, uwu@icenowy.me, wens@csie.org,
will@kernel.org, ycliang@andestech.com, inochiama@outlook.com
Subject: Re: [PATCH v4 05/13] riscv: dts: renesas: r9a07g043f: Update compatible string to use Andes INTC
Date: Wed, 22 Nov 2023 17:36:24 +0100 [thread overview]
Message-ID: <CAMuHMdVL9_VQ7e7-Cr7vcFWqpCTeptczZmgWN4seENcJKTi0eQ@mail.gmail.com> (raw)
In-Reply-To: <20231122121235.827122-6-peterlin@andestech.com>
On Wed, Nov 22, 2023 at 1:16 PM Yu Chien Peter Lin
<peterlin@andestech.com> wrote:
> The Andes hart-level interrupt controller (Andes INTC) allows AX45MP
> cores to handle custom local interrupts, such as the performance
> counter overflow interrupt.
>
> Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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next parent reply other threads:[~2023-11-22 17:47 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20231122121235.827122-1-peterlin@andestech.com>
[not found] ` <20231122121235.827122-6-peterlin@andestech.com>
2023-11-22 16:36 ` Geert Uytterhoeven [this message]
[not found] ` <20231122121235.827122-5-peterlin@andestech.com>
2023-11-23 14:38 ` [PATCH v4 04/13] dt-bindings: riscv: Add Andes interrupt controller compatible string Conor Dooley
[not found] ` <CA+V-a8t+vgrwDe9OxqMNHdcVX+qq76DuskF0ETCri4VeP-FAbg@mail.gmail.com>
2023-11-29 6:43 ` Yu-Chien Peter Lin
[not found] ` <20231122121235.827122-8-peterlin@andestech.com>
2023-11-22 21:16 ` [PATCH v4 07/13] RISC-V: Move T-Head PMU to CPU feature alternative framework Guo Ren
2023-11-23 14:45 ` Conor Dooley
[not found] ` <20231122121235.827122-10-peterlin@andestech.com>
2023-11-22 21:14 ` [PATCH v4 09/13] dt-bindings: riscv: Add T-Head PMU extension description Guo Ren
2023-11-29 8:48 ` Yu-Chien Peter Lin
[not found] ` <IA1PR20MB49537364BDF1ADE185CA8FE4BB82A@IA1PR20MB4953.namprd20.prod.outlook.com>
2023-11-30 9:21 ` Yu-Chien Peter Lin
[not found] ` <IA1PR20MB4953A05B9162AA2659DE78A5BB82A@IA1PR20MB4953.namprd20.prod.outlook.com>
2023-11-30 12:58 ` Conor Dooley
[not found] ` <IA1PR20MB495378652B09B37E92D8BB04BB82A@IA1PR20MB4953.namprd20.prod.outlook.com>
2023-12-01 0:40 ` Conor Dooley
[not found] ` <IA1PR20MB4953460FE5BF431DD32CD860BB81A@IA1PR20MB4953.namprd20.prod.outlook.com>
2023-12-06 3:14 ` Yu-Chien Peter Lin
2023-11-23 14:48 ` Conor Dooley
2023-11-29 8:47 ` Yu-Chien Peter Lin
2023-11-29 12:33 ` Conor Dooley
[not found] ` <20231122121235.827122-12-peterlin@andestech.com>
2023-11-22 21:12 ` [PATCH v4 11/13] riscv: dts: allwinner: Add T-Head PMU extension Guo Ren
2023-11-23 14:58 ` Conor Dooley
2023-11-29 9:34 ` Yu-Chien Peter Lin
[not found] ` <20231122121235.827122-3-peterlin@andestech.com>
[not found] ` <871qbwsn9h.ffs@tglx>
2023-12-12 10:17 ` [PATCH v4 02/13] irqchip/riscv-intc: Allow large non-standard interrupt number Yu-Chien Peter Lin
[not found] ` <20231122121235.827122-4-peterlin@andestech.com>
[not found] ` <87y1e4r8db.ffs@tglx>
2023-12-12 10:28 ` [PATCH v4 03/13] irqchip/riscv-intc: Introduce Andes hart-level interrupt controller Yu-Chien Peter Lin
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