* [PATCH 00/15] R-Car M3-N initial support
@ 2018-02-13 9:45 Jacopo Mondi
2018-02-13 9:45 ` [PATCH 02/15] clk: renesas: cpg-msr: Add support for R-Car M3-N Jacopo Mondi
` (14 more replies)
0 siblings, 15 replies; 47+ messages in thread
From: Jacopo Mondi @ 2018-02-13 9:45 UTC (permalink / raw)
To: linux-arm-kernel
Hello, this series adds support for Rensas R-Car M3-N (r8a77965) Soc and
M3-N based Salvator-x development board.
The series introduces a cpg-mssr clock/power gating module, a power/reset
controller for the SoC and initial PFC support.
Clock and power areas for M3-N are identical to M3-W, with the exception of
a missing PLL line used to power M3-W Cortex-A53 little cores, not present in
M3-N.
Few functionalities have currently been enabled in DTS and tested: serial
boot console, EtherAVB and gpios (tested as ethernet interface reset).
Thanks
j
Jacopo Mondi (15):
Documentation: devicetree: R-Car M3-N SoC DT bindings
clk: renesas: cpg-msr: Add support for R-Car M3-N
soc: renesas: Add R-Car M3-N support
pinctrl: sh-pfc: Initial R-Car M3-N support
ARM64: dts: Add R-Car Salvator-x M3-N support
Documentation: devicetree: dma: Add r8a77965 dmac
ARM64: dts: r8a77965: Add dmac device nods
Documentation: devicetree: renesas,sci: Add r8a77965
pinctrl: sh-pfc: r8a77965: Add SCIFs groups/functions
ARM64: dts: r8a77965: Add SCIF device nodes
gpio: rcar: Add R-Car M3-N compatible string
ARM64: dts: r8a77965: Add GPIO nodes
Documentation: devicetree: ravb: Add r8a77965
pinctrl: sh-pfc: r8a77965: Add EtherAVB groups/functions
ARM64: dts: r8a77965: Add EtherAVB device node
Documentation/devicetree/bindings/arm/shmobile.txt | 2 +
.../devicetree/bindings/clock/renesas,cpg-mssr.txt | 1 +
.../devicetree/bindings/dma/renesas,rcar-dmac.txt | 1 +
.../devicetree/bindings/gpio/renesas,gpio-rcar.txt | 1 +
.../devicetree/bindings/net/renesas,ravb.txt | 1 +
.../bindings/pinctrl/renesas,pfc-pinctrl.txt | 1 +
.../bindings/power/renesas,rcar-sysc.txt | 1 +
.../devicetree/bindings/reset/renesas,rst.txt | 1 +
.../bindings/serial/renesas,sci-serial.txt | 2 +
arch/arm64/Kconfig.platforms | 6 +
arch/arm64/boot/dts/renesas/Makefile | 1 +
.../arm64/boot/dts/renesas/r8a77965-salvator-x.dts | 30 +
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 787 +++++
drivers/clk/renesas/Kconfig | 5 +
drivers/clk/renesas/Makefile | 1 +
drivers/clk/renesas/r8a77965-cpg-mssr.c | 333 +++
drivers/clk/renesas/renesas-cpg-mssr.c | 6 +
drivers/clk/renesas/renesas-cpg-mssr.h | 1 +
drivers/gpio/gpio-rcar.c | 4 +
drivers/pinctrl/sh-pfc/Kconfig | 5 +
drivers/pinctrl/sh-pfc/Makefile | 1 +
drivers/pinctrl/sh-pfc/core.c | 6 +
drivers/pinctrl/sh-pfc/pfc-r8a77965.c | 3134 ++++++++++++++++++++
drivers/pinctrl/sh-pfc/sh_pfc.h | 1 +
drivers/soc/renesas/Kconfig | 9 +-
drivers/soc/renesas/Makefile | 1 +
drivers/soc/renesas/r8a77965-sysc.c | 37 +
drivers/soc/renesas/rcar-rst.c | 1 +
drivers/soc/renesas/rcar-sysc.c | 3 +
drivers/soc/renesas/rcar-sysc.h | 1 +
drivers/soc/renesas/renesas-soc.c | 8 +
include/dt-bindings/clock/r8a77965-cpg-mssr.h | 62 +
include/dt-bindings/power/r8a77965-sysc.h | 31 +
33 files changed, 4483 insertions(+), 2 deletions(-)
create mode 100644 arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a77965.dtsi
create mode 100644 drivers/clk/renesas/r8a77965-cpg-mssr.c
create mode 100644 drivers/pinctrl/sh-pfc/pfc-r8a77965.c
create mode 100644 drivers/soc/renesas/r8a77965-sysc.c
create mode 100644 include/dt-bindings/clock/r8a77965-cpg-mssr.h
create mode 100644 include/dt-bindings/power/r8a77965-sysc.h
--
2.7.4
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 02/15] clk: renesas: cpg-msr: Add support for R-Car M3-N
2018-02-13 9:45 [PATCH 00/15] R-Car M3-N initial support Jacopo Mondi
@ 2018-02-13 9:45 ` Jacopo Mondi
2018-02-13 11:48 ` Kieran Bingham
` (3 more replies)
2018-02-13 9:46 ` [PATCH 14/15] pinctrl: sh-pfc: r8a77965: Add EtherAVB groups/functions Jacopo Mondi
` (13 subsequent siblings)
14 siblings, 4 replies; 47+ messages in thread
From: Jacopo Mondi @ 2018-02-13 9:45 UTC (permalink / raw)
To: linux-arm-kernel
Initial support for R-Car M3-N (r8a77965), including core and module
clocks.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
.../devicetree/bindings/clock/renesas,cpg-mssr.txt | 1 +
drivers/clk/renesas/Kconfig | 5 +
drivers/clk/renesas/Makefile | 1 +
drivers/clk/renesas/r8a77965-cpg-mssr.c | 333 +++++++++++++++++++++
drivers/clk/renesas/renesas-cpg-mssr.c | 6 +
drivers/clk/renesas/renesas-cpg-mssr.h | 1 +
include/dt-bindings/clock/r8a77965-cpg-mssr.h | 62 ++++
7 files changed, 409 insertions(+)
create mode 100644 drivers/clk/renesas/r8a77965-cpg-mssr.c
create mode 100644 include/dt-bindings/clock/r8a77965-cpg-mssr.h
diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
index f1890d0..246ab63 100644
--- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
+++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
@@ -22,6 +22,7 @@ Required Properties:
- "renesas,r8a7794-cpg-mssr" for the r8a7794 SoC (R-Car E2)
- "renesas,r8a7795-cpg-mssr" for the r8a7795 SoC (R-Car H3)
- "renesas,r8a7796-cpg-mssr" for the r8a7796 SoC (R-Car M3-W)
+ - "renesas,r8a77965-cpg-mssr" for the r8a77965 SoC (R-Car M3-N)
- "renesas,r8a77970-cpg-mssr" for the r8a77970 SoC (R-Car V3M)
- "renesas,r8a77995-cpg-mssr" for the r8a77995 SoC (R-Car D3)
diff --git a/drivers/clk/renesas/Kconfig b/drivers/clk/renesas/Kconfig
index 84b40b9..047d6b5 100644
--- a/drivers/clk/renesas/Kconfig
+++ b/drivers/clk/renesas/Kconfig
@@ -15,6 +15,7 @@ config CLK_RENESAS
select CLK_R8A7794 if ARCH_R8A7794
select CLK_R8A7795 if ARCH_R8A7795
select CLK_R8A7796 if ARCH_R8A7796
+ select CLK_R8A77965 if ARCH_R8A77965
select CLK_R8A77970 if ARCH_R8A77970
select CLK_R8A77995 if ARCH_R8A77995
select CLK_SH73A0 if ARCH_SH73A0
@@ -97,6 +98,10 @@ config CLK_R8A7796
bool "R-Car M3-W clock support" if COMPILE_TEST
select CLK_RCAR_GEN3_CPG
+config CLK_R8A77965
+ bool "R-Car M3-N clock support" if COMPILE_TEST
+ select CLK_RCAR_GEN3_CPG
+
config CLK_R8A77970
bool "R-Car V3M clock support" if COMPILE_TEST
select CLK_RCAR_GEN3_CPG
diff --git a/drivers/clk/renesas/Makefile b/drivers/clk/renesas/Makefile
index 34c4e0b..2e0982f 100644
--- a/drivers/clk/renesas/Makefile
+++ b/drivers/clk/renesas/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_CLK_R8A7792) += r8a7792-cpg-mssr.o
obj-$(CONFIG_CLK_R8A7794) += r8a7794-cpg-mssr.o
obj-$(CONFIG_CLK_R8A7795) += r8a7795-cpg-mssr.o
obj-$(CONFIG_CLK_R8A7796) += r8a7796-cpg-mssr.o
+obj-$(CONFIG_CLK_R8A77965) += r8a77965-cpg-mssr.o
obj-$(CONFIG_CLK_R8A77970) += r8a77970-cpg-mssr.o
obj-$(CONFIG_CLK_R8A77995) += r8a77995-cpg-mssr.o
obj-$(CONFIG_CLK_SH73A0) += clk-sh73a0.o
diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c
new file mode 100644
index 0000000..f29d42c
--- /dev/null
+++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c
@@ -0,0 +1,333 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * r8a77965 Clock Pulse Generator / Module Standby and Software Reset
+ *
+ * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
+ *
+ * Based on r8a7795-cpg-mssr.c
+ *
+ * Copyright (C) 2015 Glider bvba
+ * Copyright (C) 2015 Renesas Electronics Corp.
+ */
+
+#include <linux/device.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/soc/renesas/rcar-rst.h>
+
+#include <dt-bindings/clock/r8a77965-cpg-mssr.h>
+
+#include "renesas-cpg-mssr.h"
+#include "rcar-gen3-cpg.h"
+
+enum clk_ids {
+ /* Core Clock Outputs exported to DT */
+ LAST_DT_CORE_CLK = R8A77965_CLK_OSC,
+
+ /* External Input Clocks */
+ CLK_EXTAL,
+ CLK_EXTALR,
+
+ /* Internal Core Clocks */
+ CLK_MAIN,
+ CLK_PLL0,
+ CLK_PLL1,
+ CLK_PLL3,
+ CLK_PLL4,
+ CLK_PLL1_DIV2,
+ CLK_PLL1_DIV4,
+ CLK_S0,
+ CLK_S1,
+ CLK_S2,
+ CLK_S3,
+ CLK_SDSRC,
+ CLK_SSPSRC,
+ CLK_RINT,
+
+ /* Module Clocks */
+ MOD_CLK_BASE
+};
+
+static const struct cpg_core_clk r8a77965_core_clks[] __initconst = {
+ /* External Clock Inputs */
+ DEF_INPUT("extal", CLK_EXTAL),
+ DEF_INPUT("extalr", CLK_EXTALR),
+
+ /* Internal Core Clocks */
+ DEF_BASE(".main", CLK_MAIN, CLK_TYPE_GEN3_MAIN, CLK_EXTAL),
+ DEF_BASE(".pll0", CLK_PLL0, CLK_TYPE_GEN3_PLL0, CLK_MAIN),
+ DEF_BASE(".pll1", CLK_PLL1, CLK_TYPE_GEN3_PLL1, CLK_MAIN),
+ DEF_BASE(".pll3", CLK_PLL3, CLK_TYPE_GEN3_PLL3, CLK_MAIN),
+ DEF_BASE(".pll4", CLK_PLL4, CLK_TYPE_GEN3_PLL4, CLK_MAIN),
+
+ DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
+ DEF_FIXED(".pll1_div4", CLK_PLL1_DIV4, CLK_PLL1_DIV2, 2, 1),
+ DEF_FIXED(".s0", CLK_S0, CLK_PLL1_DIV2, 2, 1),
+ DEF_FIXED(".s1", CLK_S1, CLK_PLL1_DIV2, 3, 1),
+ DEF_FIXED(".s2", CLK_S2, CLK_PLL1_DIV2, 4, 1),
+ DEF_FIXED(".s3", CLK_S3, CLK_PLL1_DIV2, 6, 1),
+ DEF_FIXED(".sdsrc", CLK_SDSRC, CLK_PLL1_DIV2, 2, 1),
+
+ /* Core Clock Outputs */
+ DEF_FIXED("ztr", R8A77965_CLK_ZTR, CLK_PLL1_DIV2, 6, 1),
+ DEF_FIXED("ztrd2", R8A77965_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
+ DEF_FIXED("zt", R8A77965_CLK_ZT, CLK_PLL1_DIV2, 4, 1),
+ DEF_FIXED("zx", R8A77965_CLK_ZX, CLK_PLL1_DIV2, 2, 1),
+ DEF_FIXED("s0d1", R8A77965_CLK_S0D1, CLK_S0, 1, 1),
+ DEF_FIXED("s0d2", R8A77965_CLK_S0D2, CLK_S0, 2, 1),
+ DEF_FIXED("s0d3", R8A77965_CLK_S0D3, CLK_S0, 3, 1),
+ DEF_FIXED("s0d4", R8A77965_CLK_S0D4, CLK_S0, 4, 1),
+ DEF_FIXED("s0d6", R8A77965_CLK_S0D6, CLK_S0, 6, 1),
+ DEF_FIXED("s0d8", R8A77965_CLK_S0D8, CLK_S0, 8, 1),
+ DEF_FIXED("s0d12", R8A77965_CLK_S0D12, CLK_S0, 12, 1),
+ DEF_FIXED("s1d1", R8A77965_CLK_S1D1, CLK_S1, 1, 1),
+ DEF_FIXED("s1d2", R8A77965_CLK_S1D2, CLK_S1, 2, 1),
+ DEF_FIXED("s1d4", R8A77965_CLK_S1D4, CLK_S1, 4, 1),
+ DEF_FIXED("s2d1", R8A77965_CLK_S2D1, CLK_S2, 1, 1),
+ DEF_FIXED("s2d2", R8A77965_CLK_S2D2, CLK_S2, 2, 1),
+ DEF_FIXED("s2d4", R8A77965_CLK_S2D4, CLK_S2, 4, 1),
+ DEF_FIXED("s3d1", R8A77965_CLK_S3D1, CLK_S3, 1, 1),
+ DEF_FIXED("s3d2", R8A77965_CLK_S3D2, CLK_S3, 2, 1),
+ DEF_FIXED("s3d4", R8A77965_CLK_S3D4, CLK_S3, 4, 1),
+
+ DEF_GEN3_SD("sd0", R8A77965_CLK_SD0, CLK_SDSRC, 0x074),
+ DEF_GEN3_SD("sd1", R8A77965_CLK_SD1, CLK_SDSRC, 0x078),
+ DEF_GEN3_SD("sd2", R8A77965_CLK_SD2, CLK_SDSRC, 0x268),
+ DEF_GEN3_SD("sd3", R8A77965_CLK_SD3, CLK_SDSRC, 0x26c),
+
+ DEF_FIXED("cl", R8A77965_CLK_CL, CLK_PLL1_DIV2, 48, 1),
+ DEF_FIXED("cp", R8A77965_CLK_CP, CLK_EXTAL, 2, 1),
+
+ DEF_DIV6P1("canfd", R8A77965_CLK_CANFD, CLK_PLL1_DIV4, 0x244),
+ DEF_DIV6P1("csi0", R8A77965_CLK_CSI0, CLK_PLL1_DIV4, 0x00c),
+ DEF_DIV6P1("mso", R8A77965_CLK_MSO, CLK_PLL1_DIV4, 0x014),
+ DEF_DIV6P1("hdmi", R8A77965_CLK_HDMI, CLK_PLL1_DIV4, 0x250),
+
+ DEF_DIV6_RO("osc", R8A77965_CLK_OSC, CLK_EXTAL, CPG_RCKCR, 8),
+ DEF_DIV6_RO("r_int", CLK_RINT, CLK_EXTAL, CPG_RCKCR, 32),
+
+ DEF_BASE("r", R8A77965_CLK_R, CLK_TYPE_GEN3_R, CLK_RINT),
+};
+
+static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
+ DEF_MOD("scif5", 202, R8A77965_CLK_S3D4),
+ DEF_MOD("scif4", 203, R8A77965_CLK_S3D4),
+ DEF_MOD("scif3", 204, R8A77965_CLK_S3D4),
+ DEF_MOD("scif1", 206, R8A77965_CLK_S3D4),
+ DEF_MOD("scif0", 207, R8A77965_CLK_S3D4),
+ DEF_MOD("sys-dmac2", 217, R8A77965_CLK_S0D3),
+ DEF_MOD("sys-dmac1", 218, R8A77965_CLK_S0D3),
+ DEF_MOD("sys-dmac0", 219, R8A77965_CLK_S0D3),
+
+ DEF_MOD("cmt3", 300, R8A77965_CLK_R),
+ DEF_MOD("cmt2", 301, R8A77965_CLK_R),
+ DEF_MOD("cmt1", 302, R8A77965_CLK_R),
+ DEF_MOD("cmt0", 303, R8A77965_CLK_R),
+ DEF_MOD("scif2", 310, R8A77965_CLK_S3D4),
+ DEF_MOD("sdif3", 311, R8A77965_CLK_SD3),
+ DEF_MOD("sdif2", 312, R8A77965_CLK_SD2),
+ DEF_MOD("sdif1", 313, R8A77965_CLK_SD1),
+ DEF_MOD("sdif0", 314, R8A77965_CLK_SD0),
+ DEF_MOD("pcie1", 318, R8A77965_CLK_S3D1),
+ DEF_MOD("pcie0", 319, R8A77965_CLK_S3D1),
+ DEF_MOD("usb3-if0", 328, R8A77965_CLK_S3D1),
+ DEF_MOD("usb-dmac0", 330, R8A77965_CLK_S3D1),
+ DEF_MOD("usb-dmac1", 331, R8A77965_CLK_S3D1),
+
+ DEF_MOD("rwdt", 402, R8A77965_CLK_R),
+ DEF_MOD("intc-ex", 407, R8A77965_CLK_CP),
+ DEF_MOD("intc-ap", 408, R8A77965_CLK_S3D1),
+
+ DEF_MOD("audmac1", 501, R8A77965_CLK_S0D3),
+ DEF_MOD("audmac0", 502, R8A77965_CLK_S0D3),
+ DEF_MOD("drif7", 508, R8A77965_CLK_S3D2),
+ DEF_MOD("drif6", 509, R8A77965_CLK_S3D2),
+ DEF_MOD("drif5", 510, R8A77965_CLK_S3D2),
+ DEF_MOD("drif4", 511, R8A77965_CLK_S3D2),
+ DEF_MOD("drif3", 512, R8A77965_CLK_S3D2),
+ DEF_MOD("drif2", 513, R8A77965_CLK_S3D2),
+ DEF_MOD("drif1", 514, R8A77965_CLK_S3D2),
+ DEF_MOD("drif0", 515, R8A77965_CLK_S3D2),
+ DEF_MOD("hscif4", 516, R8A77965_CLK_S3D1),
+ DEF_MOD("hscif3", 517, R8A77965_CLK_S3D1),
+ DEF_MOD("hscif2", 518, R8A77965_CLK_S3D1),
+ DEF_MOD("hscif1", 519, R8A77965_CLK_S3D1),
+ DEF_MOD("hscif0", 520, R8A77965_CLK_S3D1),
+ DEF_MOD("thermal", 522, R8A77965_CLK_CP),
+ DEF_MOD("pwm", 523, R8A77965_CLK_S0D12),
+
+ DEF_MOD("fcpvd1", 602, R8A77965_CLK_S0D2),
+ DEF_MOD("fcpvd0", 603, R8A77965_CLK_S0D2),
+ DEF_MOD("fcpvb0", 607, R8A77965_CLK_S0D1),
+ DEF_MOD("fcpvi0", 611, R8A77965_CLK_S0D1),
+ DEF_MOD("fcpf0", 615, R8A77965_CLK_S0D1),
+ DEF_MOD("fcpcs", 619, R8A77965_CLK_S0D2),
+ DEF_MOD("vspd1", 622, R8A77965_CLK_S0D2),
+ DEF_MOD("vspd0", 623, R8A77965_CLK_S0D2),
+ DEF_MOD("vspb", 626, R8A77965_CLK_S0D1),
+ DEF_MOD("vspi0", 631, R8A77965_CLK_S0D1),
+
+ DEF_MOD("ehci1", 702, R8A77965_CLK_S3D4),
+ DEF_MOD("ehci0", 703, R8A77965_CLK_S3D4),
+ DEF_MOD("hsusb", 704, R8A77965_CLK_S3D4),
+ DEF_MOD("csi20", 714, R8A77965_CLK_CSI0),
+ DEF_MOD("csi40", 716, R8A77965_CLK_CSI0),
+ DEF_MOD("du2", 722, R8A77965_CLK_S2D1),
+ DEF_MOD("du1", 723, R8A77965_CLK_S2D1),
+ DEF_MOD("du0", 724, R8A77965_CLK_S2D1),
+ DEF_MOD("lvds", 727, R8A77965_CLK_S2D1),
+ DEF_MOD("hdmi0", 729, R8A77965_CLK_HDMI),
+
+ DEF_MOD("vin7", 804, R8A77965_CLK_S0D2),
+ DEF_MOD("vin6", 805, R8A77965_CLK_S0D2),
+ DEF_MOD("vin5", 806, R8A77965_CLK_S0D2),
+ DEF_MOD("vin4", 807, R8A77965_CLK_S0D2),
+ DEF_MOD("vin3", 808, R8A77965_CLK_S0D2),
+ DEF_MOD("vin2", 809, R8A77965_CLK_S0D2),
+ DEF_MOD("vin1", 810, R8A77965_CLK_S0D2),
+ DEF_MOD("vin0", 811, R8A77965_CLK_S0D2),
+ DEF_MOD("etheravb", 812, R8A77965_CLK_S0D6),
+ DEF_MOD("imr1", 822, R8A77965_CLK_S0D2),
+ DEF_MOD("imr0", 823, R8A77965_CLK_S0D2),
+
+ DEF_MOD("gpio7", 905, R8A77965_CLK_S3D4),
+ DEF_MOD("gpio6", 906, R8A77965_CLK_S3D4),
+ DEF_MOD("gpio5", 907, R8A77965_CLK_S3D4),
+ DEF_MOD("gpio4", 908, R8A77965_CLK_S3D4),
+ DEF_MOD("gpio3", 909, R8A77965_CLK_S3D4),
+ DEF_MOD("gpio2", 910, R8A77965_CLK_S3D4),
+ DEF_MOD("gpio1", 911, R8A77965_CLK_S3D4),
+ DEF_MOD("gpio0", 912, R8A77965_CLK_S3D4),
+ DEF_MOD("can-fd", 914, R8A77965_CLK_S3D2),
+ DEF_MOD("can-if1", 915, R8A77965_CLK_S3D4),
+ DEF_MOD("can-if0", 916, R8A77965_CLK_S3D4),
+ DEF_MOD("i2c6", 918, R8A77965_CLK_S0D6),
+ DEF_MOD("i2c5", 919, R8A77965_CLK_S0D6),
+ DEF_MOD("i2c-dvfs", 926, R8A77965_CLK_CP),
+ DEF_MOD("i2c4", 927, R8A77965_CLK_S0D6),
+ DEF_MOD("i2c3", 928, R8A77965_CLK_S0D6),
+ DEF_MOD("i2c2", 929, R8A77965_CLK_S3D2),
+ DEF_MOD("i2c1", 930, R8A77965_CLK_S3D2),
+ DEF_MOD("i2c0", 931, R8A77965_CLK_S3D2),
+
+ DEF_MOD("ssi-all", 1005, R8A77965_CLK_S3D4),
+ DEF_MOD("ssi9", 1006, MOD_CLK_ID(1005)),
+ DEF_MOD("ssi8", 1007, MOD_CLK_ID(1005)),
+ DEF_MOD("ssi7", 1008, MOD_CLK_ID(1005)),
+ DEF_MOD("ssi6", 1009, MOD_CLK_ID(1005)),
+ DEF_MOD("ssi5", 1010, MOD_CLK_ID(1005)),
+ DEF_MOD("ssi4", 1011, MOD_CLK_ID(1005)),
+ DEF_MOD("ssi3", 1012, MOD_CLK_ID(1005)),
+ DEF_MOD("ssi2", 1013, MOD_CLK_ID(1005)),
+ DEF_MOD("ssi1", 1014, MOD_CLK_ID(1005)),
+ DEF_MOD("ssi0", 1015, MOD_CLK_ID(1005)),
+ DEF_MOD("scu-all", 1017, R8A77965_CLK_S3D4),
+ DEF_MOD("scu-dvc1", 1018, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-dvc0", 1019, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-ctu1-mix1", 1020, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-ctu0-mix0", 1021, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src9", 1022, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src8", 1023, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src7", 1024, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src6", 1025, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src5", 1026, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src4", 1027, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src3", 1028, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src2", 1029, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src1", 1030, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src0", 1031, MOD_CLK_ID(1017)),
+};
+
+static const unsigned int r8a77965_crit_mod_clks[] __initconst = {
+ MOD_CLK_ID(408), /* INTC-AP (GIC) */
+};
+
+/*
+ * CPG Clock Data
+ */
+
+/*
+ * MD EXTAL PLL0 PLL1 PLL3 PLL4
+ * 14 13 19 17 (MHz)
+ *-----------------------------------------------------------
+ * 0 0 0 0 16.66 x 1 x180 x192 x192 x144
+ * 0 0 0 1 16.66 x 1 x180 x192 x128 x144
+ * 0 0 1 0 Prohibited setting
+ * 0 0 1 1 16.66 x 1 x180 x192 x192 x144
+ * 0 1 0 0 20 x 1 x150 x160 x160 x120
+ * 0 1 0 1 20 x 1 x150 x160 x106 x120
+ * 0 1 1 0 Prohibited setting
+ * 0 1 1 1 20 x 1 x150 x160 x160 x120
+ * 1 0 0 0 25 x 1 x120 x128 x128 x96
+ * 1 0 0 1 25 x 1 x120 x128 x84 x96
+ * 1 0 1 0 Prohibited setting
+ * 1 0 1 1 25 x 1 x120 x128 x128 x96
+ * 1 1 0 0 33.33 / 2 x180 x192 x192 x144
+ * 1 1 0 1 33.33 / 2 x180 x192 x128 x144
+ * 1 1 1 0 Prohibited setting
+ * 1 1 1 1 33.33 / 2 x180 x192 x192 x144
+ */
+#define CPG_PLL_CONFIG_INDEX(md) ((((md) & BIT(14)) >> 11) | \
+ (((md) & BIT(13)) >> 11) | \
+ (((md) & BIT(19)) >> 18) | \
+ (((md) & BIT(17)) >> 17))
+
+static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[16] __initconst = {
+ /* EXTAL div PLL1 mult/div PLL3 mult/div */
+ { 1, 192, 1, 192, 1, },
+ { 1, 192, 1, 128, 1, },
+ { 0, /* Prohibited setting */ },
+ { 1, 192, 1, 192, 1, },
+ { 1, 160, 1, 160, 1, },
+ { 1, 160, 1, 106, 1, },
+ { 0, /* Prohibited setting */ },
+ { 1, 160, 1, 160, 1, },
+ { 1, 128, 1, 128, 1, },
+ { 1, 128, 1, 84, 1, },
+ { 0, /* Prohibited setting */ },
+ { 1, 128, 1, 128, 1, },
+ { 2, 192, 1, 192, 1, },
+ { 2, 192, 1, 128, 1, },
+ { 0, /* Prohibited setting */ },
+ { 2, 192, 1, 192, 1, },
+};
+
+static int __init r8a77965_cpg_mssr_init(struct device *dev)
+{
+ const struct rcar_gen3_cpg_pll_config *cpg_pll_config;
+ u32 cpg_mode;
+ int error;
+
+ error = rcar_rst_read_mode_pins(&cpg_mode);
+ if (error)
+ return error;
+
+ cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)];
+ if (!cpg_pll_config->extal_div) {
+ dev_err(dev, "Prohibited setting (cpg_mode=0x%x)\n", cpg_mode);
+ return -EINVAL;
+ }
+
+ return rcar_gen3_cpg_init(cpg_pll_config, CLK_EXTALR, cpg_mode);
+};
+
+const struct cpg_mssr_info r8a77965_cpg_mssr_info __initconst = {
+ /* Core Clocks */
+ .core_clks = r8a77965_core_clks,
+ .num_core_clks = ARRAY_SIZE(r8a77965_core_clks),
+ .last_dt_core_clk = LAST_DT_CORE_CLK,
+ .num_total_core_clks = MOD_CLK_BASE,
+
+ /* Module Clocks */
+ .mod_clks = r8a77965_mod_clks,
+ .num_mod_clks = ARRAY_SIZE(r8a77965_mod_clks),
+ .num_hw_mod_clks = 12 * 32,
+
+ /* Critical Module Clocks */
+ .crit_mod_clks = r8a77965_crit_mod_clks,
+ .num_crit_mod_clks = ARRAY_SIZE(r8a77965_crit_mod_clks),
+
+ /* Callbacks */
+ .init = r8a77965_cpg_mssr_init,
+ .cpg_clk_register = rcar_gen3_cpg_clk_register,
+};
diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c
index e3cc72c..b4b7d36 100644
--- a/drivers/clk/renesas/renesas-cpg-mssr.c
+++ b/drivers/clk/renesas/renesas-cpg-mssr.c
@@ -693,6 +693,12 @@ static const struct of_device_id cpg_mssr_match[] = {
.data = &r8a7796_cpg_mssr_info,
},
#endif
+#ifdef CONFIG_CLK_R8A77965
+ {
+ .compatible = "renesas,r8a77965-cpg-mssr",
+ .data = &r8a77965_cpg_mssr_info,
+ },
+#endif
#ifdef CONFIG_CLK_R8A77970
{
.compatible = "renesas,r8a77970-cpg-mssr",
diff --git a/drivers/clk/renesas/renesas-cpg-mssr.h b/drivers/clk/renesas/renesas-cpg-mssr.h
index 0745b09..44397d3 100644
--- a/drivers/clk/renesas/renesas-cpg-mssr.h
+++ b/drivers/clk/renesas/renesas-cpg-mssr.h
@@ -139,6 +139,7 @@ extern const struct cpg_mssr_info r8a7792_cpg_mssr_info;
extern const struct cpg_mssr_info r8a7794_cpg_mssr_info;
extern const struct cpg_mssr_info r8a7795_cpg_mssr_info;
extern const struct cpg_mssr_info r8a7796_cpg_mssr_info;
+extern const struct cpg_mssr_info r8a77965_cpg_mssr_info;
extern const struct cpg_mssr_info r8a77970_cpg_mssr_info;
extern const struct cpg_mssr_info r8a77995_cpg_mssr_info;
diff --git a/include/dt-bindings/clock/r8a77965-cpg-mssr.h b/include/dt-bindings/clock/r8a77965-cpg-mssr.h
new file mode 100644
index 0000000..6d3b5a9
--- /dev/null
+++ b/include/dt-bindings/clock/r8a77965-cpg-mssr.h
@@ -0,0 +1,62 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
+ */
+#ifndef __DT_BINDINGS_CLOCK_R8A77965_CPG_MSSR_H__
+#define __DT_BINDINGS_CLOCK_R8A77965_CPG_MSSR_H__
+
+#include <dt-bindings/clock/renesas-cpg-mssr.h>
+
+/* r8a77965 CPG Core Clocks */
+#define R8A77965_CLK_Z 0
+#define R8A77965_CLK_ZR 1
+#define R8A77965_CLK_ZG 2
+#define R8A77965_CLK_ZTR 3
+#define R8A77965_CLK_ZTRD2 4
+#define R8A77965_CLK_ZT 5
+#define R8A77965_CLK_ZX 6
+#define R8A77965_CLK_S0D1 7
+#define R8A77965_CLK_S0D2 8
+#define R8A77965_CLK_S0D3 9
+#define R8A77965_CLK_S0D4 10
+#define R8A77965_CLK_S0D6 11
+#define R8A77965_CLK_S0D8 12
+#define R8A77965_CLK_S0D12 13
+#define R8A77965_CLK_S1D1 14
+#define R8A77965_CLK_S1D2 15
+#define R8A77965_CLK_S1D4 16
+#define R8A77965_CLK_S2D1 17
+#define R8A77965_CLK_S2D2 18
+#define R8A77965_CLK_S2D4 19
+#define R8A77965_CLK_S3D1 20
+#define R8A77965_CLK_S3D2 21
+#define R8A77965_CLK_S3D4 22
+#define R8A77965_CLK_LB 23
+#define R8A77965_CLK_CL 24
+#define R8A77965_CLK_ZB3 25
+#define R8A77965_CLK_ZB3D2 26
+#define R8A77965_CLK_CR 27
+#define R8A77965_CLK_CRD2 28
+#define R8A77965_CLK_SD0H 29
+#define R8A77965_CLK_SD0 30
+#define R8A77965_CLK_SD1H 31
+#define R8A77965_CLK_SD1 32
+#define R8A77965_CLK_SD2H 33
+#define R8A77965_CLK_SD2 34
+#define R8A77965_CLK_SD3H 35
+#define R8A77965_CLK_SD3 36
+#define R8A77965_CLK_SSP2 37
+#define R8A77965_CLK_SSP1 38
+#define R8A77965_CLK_SSPRS 39
+#define R8A77965_CLK_RPC 40
+#define R8A77965_CLK_RPCD2 41
+#define R8A77965_CLK_MSO 42
+#define R8A77965_CLK_CANFD 43
+#define R8A77965_CLK_HDMI 44
+#define R8A77965_CLK_CSI0 45
+#define R8A77965_CLK_CP 46
+#define R8A77965_CLK_CPEX 47
+#define R8A77965_CLK_R 48
+#define R8A77965_CLK_OSC 49
+
+#endif /* __DT_BINDINGS_CLOCK_R8A77965_CPG_MSSR_H__ */
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [PATCH 14/15] pinctrl: sh-pfc: r8a77965: Add EtherAVB groups/functions
2018-02-13 9:45 [PATCH 00/15] R-Car M3-N initial support Jacopo Mondi
2018-02-13 9:45 ` [PATCH 02/15] clk: renesas: cpg-msr: Add support for R-Car M3-N Jacopo Mondi
@ 2018-02-13 9:46 ` Jacopo Mondi
2018-02-14 14:47 ` Geert Uytterhoeven
2018-02-13 9:46 ` [PATCH 15/15] ARM64: dts: r8a77965: Add EtherAVB device node Jacopo Mondi
` (12 subsequent siblings)
14 siblings, 1 reply; 47+ messages in thread
From: Jacopo Mondi @ 2018-02-13 9:46 UTC (permalink / raw)
To: linux-arm-kernel
Add EtherAVB groups and functions definitions for R-Car M3-N.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
drivers/pinctrl/sh-pfc/pfc-r8a77965.c | 110 ++++++++++++++++++++++++++++++++++
1 file changed, 110 insertions(+)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77965.c b/drivers/pinctrl/sh-pfc/pfc-r8a77965.c
index 6989db2..ac260d4 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a77965.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a77965.c
@@ -1577,6 +1577,92 @@ static const struct sh_pfc_pin pinmux_pins[] = {
SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 30, ASEBRK, CFG_FLAGS),
};
+/* - EtherAVB --------------------------------------------------------------- */
+static const unsigned int avb_link_pins[] = {
+ /* AVB_LINK */
+ RCAR_GP_PIN(2, 12),
+};
+static const unsigned int avb_link_mux[] = {
+ AVB_LINK_MARK,
+};
+static const unsigned int avb_magic_pins[] = {
+ /* AVB_MAGIC_ */
+ RCAR_GP_PIN(2, 10),
+};
+static const unsigned int avb_magic_mux[] = {
+ AVB_MAGIC_MARK,
+};
+static const unsigned int avb_phy_int_pins[] = {
+ /* AVB_PHY_INT */
+ RCAR_GP_PIN(2, 11),
+};
+static const unsigned int avb_phy_int_mux[] = {
+ AVB_PHY_INT_MARK,
+};
+static const unsigned int avb_mdc_pins[] = {
+ /* AVB_MDC, AVB_MDIO */
+ RCAR_GP_PIN(2, 9), PIN_NUMBER('A', 9),
+};
+static const unsigned int avb_mdc_mux[] = {
+ AVB_MDC_MARK, AVB_MDIO_MARK,
+};
+static const unsigned int avb_mii_pins[] = {
+ /*
+ * AVB_TX_CTL, AVB_TXC, AVB_TD0,
+ * AVB_TD1, AVB_TD2, AVB_TD3,
+ * AVB_RX_CTL, AVB_RXC, AVB_RD0,
+ * AVB_RD1, AVB_RD2, AVB_RD3,
+ * AVB_TXCREFCLK
+ */
+ PIN_NUMBER('A', 8), PIN_NUMBER('A', 19), PIN_NUMBER('A', 18),
+ PIN_NUMBER('B', 18), PIN_NUMBER('A', 17), PIN_NUMBER('B', 17),
+ PIN_NUMBER('A', 16), PIN_NUMBER('B', 19), PIN_NUMBER('A', 13),
+ PIN_NUMBER('B', 13), PIN_NUMBER('A', 14), PIN_NUMBER('B', 14),
+ PIN_NUMBER('A', 12),
+
+};
+static const unsigned int avb_mii_mux[] = {
+ AVB_TX_CTL_MARK, AVB_TXC_MARK, AVB_TD0_MARK,
+ AVB_TD1_MARK, AVB_TD2_MARK, AVB_TD3_MARK,
+ AVB_RX_CTL_MARK, AVB_RXC_MARK, AVB_RD0_MARK,
+ AVB_RD1_MARK, AVB_RD2_MARK, AVB_RD3_MARK,
+ AVB_TXCREFCLK_MARK,
+};
+static const unsigned int avb_avtp_pps_pins[] = {
+ /* AVB_AVTP_PPS */
+ RCAR_GP_PIN(2, 6),
+};
+static const unsigned int avb_avtp_pps_mux[] = {
+ AVB_AVTP_PPS_MARK,
+};
+static const unsigned int avb_avtp_match_a_pins[] = {
+ /* AVB_AVTP_MATCH_A */
+ RCAR_GP_PIN(2, 13),
+};
+static const unsigned int avb_avtp_match_a_mux[] = {
+ AVB_AVTP_MATCH_A_MARK,
+};
+static const unsigned int avb_avtp_capture_a_pins[] = {
+ /* AVB_AVTP_CAPTURE_A */
+ RCAR_GP_PIN(2, 14),
+};
+static const unsigned int avb_avtp_capture_a_mux[] = {
+ AVB_AVTP_CAPTURE_A_MARK,
+};
+static const unsigned int avb_avtp_match_b_pins[] = {
+ /* AVB_AVTP_MATCH_B */
+ RCAR_GP_PIN(1, 8),
+};
+static const unsigned int avb_avtp_match_b_mux[] = {
+ AVB_AVTP_MATCH_B_MARK,
+};
+static const unsigned int avb_avtp_capture_b_pins[] = {
+ /* AVB_AVTP_CAPTURE_B */
+ RCAR_GP_PIN(1, 11),
+};
+static const unsigned int avb_avtp_capture_b_mux[] = {
+ AVB_AVTP_CAPTURE_B_MARK,
+};
/* - SCIF0 ------------------------------------------------------------------ */
static const unsigned int scif0_data_pins[] = {
/* RX, TX */
@@ -1789,6 +1875,16 @@ static const unsigned int scif_clk_b_mux[] = {
};
static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(avb_link),
+ SH_PFC_PIN_GROUP(avb_magic),
+ SH_PFC_PIN_GROUP(avb_phy_int),
+ SH_PFC_PIN_GROUP(avb_mdc),
+ SH_PFC_PIN_GROUP(avb_mii),
+ SH_PFC_PIN_GROUP(avb_avtp_pps),
+ SH_PFC_PIN_GROUP(avb_avtp_match_a),
+ SH_PFC_PIN_GROUP(avb_avtp_capture_a),
+ SH_PFC_PIN_GROUP(avb_avtp_match_b),
+ SH_PFC_PIN_GROUP(avb_avtp_capture_b),
SH_PFC_PIN_GROUP(scif0_data),
SH_PFC_PIN_GROUP(scif0_clk),
SH_PFC_PIN_GROUP(scif0_ctrl),
@@ -1820,6 +1916,19 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(scif_clk_b),
};
+static const char * const avb_groups[] = {
+ "avb_link",
+ "avb_magic",
+ "avb_phy_int",
+ "avb_mdc",
+ "avb_mii",
+ "avb_avtp_pps",
+ "avb_avtp_match_a",
+ "avb_avtp_capture_a",
+ "avb_avtp_match_b",
+ "avb_avtp_capture_b",
+};
+
static const char * const scif0_groups[] = {
"scif0_data",
"scif0_clk",
@@ -1870,6 +1979,7 @@ static const char * const scif_clk_groups[] = {
};
static const struct sh_pfc_function pinmux_functions[] = {
+ SH_PFC_FUNCTION(avb),
SH_PFC_FUNCTION(scif0),
SH_PFC_FUNCTION(scif1),
SH_PFC_FUNCTION(scif2),
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [PATCH 15/15] ARM64: dts: r8a77965: Add EtherAVB device node
2018-02-13 9:45 [PATCH 00/15] R-Car M3-N initial support Jacopo Mondi
2018-02-13 9:45 ` [PATCH 02/15] clk: renesas: cpg-msr: Add support for R-Car M3-N Jacopo Mondi
2018-02-13 9:46 ` [PATCH 14/15] pinctrl: sh-pfc: r8a77965: Add EtherAVB groups/functions Jacopo Mondi
@ 2018-02-13 9:46 ` Jacopo Mondi
2018-02-14 14:48 ` Geert Uytterhoeven
[not found] ` <1518515162-23663-2-git-send-email-jacopo+renesas@jmondi.org>
` (11 subsequent siblings)
14 siblings, 1 reply; 47+ messages in thread
From: Jacopo Mondi @ 2018-02-13 9:46 UTC (permalink / raw)
To: linux-arm-kernel
Populate the ethernet at e6800000 device node to enable Ethernet interface
for R-Car M3-N (r8a77965) SoC.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 43 ++++++++++++++++++++++++++++++-
1 file changed, 42 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 71f20c3..08095f8 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -525,7 +525,48 @@
};
avb: ethernet at e6800000 {
- /* placeholder */
+ compatible = "renesas,etheravb-r8a77965",
+ "renesas,etheravb-rcar-gen3";
+ reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15",
+ "ch16", "ch17", "ch18", "ch19",
+ "ch20", "ch21", "ch22", "ch23",
+ "ch24";
+ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 812>;
+ phy-mode = "rgmii-txid";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
};
csi20: csi2 at fea80000 {
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [PATCH 02/15] clk: renesas: cpg-msr: Add support for R-Car M3-N
2018-02-13 9:45 ` [PATCH 02/15] clk: renesas: cpg-msr: Add support for R-Car M3-N Jacopo Mondi
@ 2018-02-13 11:48 ` Kieran Bingham
2018-02-14 11:03 ` Geert Uytterhoeven
` (2 subsequent siblings)
3 siblings, 0 replies; 47+ messages in thread
From: Kieran Bingham @ 2018-02-13 11:48 UTC (permalink / raw)
To: linux-arm-kernel
Hi Jacopo,
Thanks for the patch.
I haven't really looked at the rest of the patch yet - but the title stands out:
[PATCH 02/15] clk: renesas: cpg-msr: Add support for R-Car M3-N
Should this be s/cpg-msr/cpg-mssr/ ?
--
Regards
Kieran
On 13/02/18 09:45, Jacopo Mondi wrote:
> Initial support for R-Car M3-N (r8a77965), including core and module
> clocks.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> ---
> .../devicetree/bindings/clock/renesas,cpg-mssr.txt | 1 +
> drivers/clk/renesas/Kconfig | 5 +
> drivers/clk/renesas/Makefile | 1 +
> drivers/clk/renesas/r8a77965-cpg-mssr.c | 333 +++++++++++++++++++++
> drivers/clk/renesas/renesas-cpg-mssr.c | 6 +
> drivers/clk/renesas/renesas-cpg-mssr.h | 1 +
> include/dt-bindings/clock/r8a77965-cpg-mssr.h | 62 ++++
> 7 files changed, 409 insertions(+)
> create mode 100644 drivers/clk/renesas/r8a77965-cpg-mssr.c
> create mode 100644 include/dt-bindings/clock/r8a77965-cpg-mssr.h
>
> diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
> index f1890d0..246ab63 100644
> --- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
> +++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
> @@ -22,6 +22,7 @@ Required Properties:
> - "renesas,r8a7794-cpg-mssr" for the r8a7794 SoC (R-Car E2)
> - "renesas,r8a7795-cpg-mssr" for the r8a7795 SoC (R-Car H3)
> - "renesas,r8a7796-cpg-mssr" for the r8a7796 SoC (R-Car M3-W)
> + - "renesas,r8a77965-cpg-mssr" for the r8a77965 SoC (R-Car M3-N)
> - "renesas,r8a77970-cpg-mssr" for the r8a77970 SoC (R-Car V3M)
> - "renesas,r8a77995-cpg-mssr" for the r8a77995 SoC (R-Car D3)
>
> diff --git a/drivers/clk/renesas/Kconfig b/drivers/clk/renesas/Kconfig
> index 84b40b9..047d6b5 100644
> --- a/drivers/clk/renesas/Kconfig
> +++ b/drivers/clk/renesas/Kconfig
> @@ -15,6 +15,7 @@ config CLK_RENESAS
> select CLK_R8A7794 if ARCH_R8A7794
> select CLK_R8A7795 if ARCH_R8A7795
> select CLK_R8A7796 if ARCH_R8A7796
> + select CLK_R8A77965 if ARCH_R8A77965
> select CLK_R8A77970 if ARCH_R8A77970
> select CLK_R8A77995 if ARCH_R8A77995
> select CLK_SH73A0 if ARCH_SH73A0
> @@ -97,6 +98,10 @@ config CLK_R8A7796
> bool "R-Car M3-W clock support" if COMPILE_TEST
> select CLK_RCAR_GEN3_CPG
>
> +config CLK_R8A77965
> + bool "R-Car M3-N clock support" if COMPILE_TEST
> + select CLK_RCAR_GEN3_CPG
> +
> config CLK_R8A77970
> bool "R-Car V3M clock support" if COMPILE_TEST
> select CLK_RCAR_GEN3_CPG
> diff --git a/drivers/clk/renesas/Makefile b/drivers/clk/renesas/Makefile
> index 34c4e0b..2e0982f 100644
> --- a/drivers/clk/renesas/Makefile
> +++ b/drivers/clk/renesas/Makefile
> @@ -14,6 +14,7 @@ obj-$(CONFIG_CLK_R8A7792) += r8a7792-cpg-mssr.o
> obj-$(CONFIG_CLK_R8A7794) += r8a7794-cpg-mssr.o
> obj-$(CONFIG_CLK_R8A7795) += r8a7795-cpg-mssr.o
> obj-$(CONFIG_CLK_R8A7796) += r8a7796-cpg-mssr.o
> +obj-$(CONFIG_CLK_R8A77965) += r8a77965-cpg-mssr.o
> obj-$(CONFIG_CLK_R8A77970) += r8a77970-cpg-mssr.o
> obj-$(CONFIG_CLK_R8A77995) += r8a77995-cpg-mssr.o
> obj-$(CONFIG_CLK_SH73A0) += clk-sh73a0.o
> diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c
> new file mode 100644
> index 0000000..f29d42c
> --- /dev/null
> +++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c
> @@ -0,0 +1,333 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * r8a77965 Clock Pulse Generator / Module Standby and Software Reset
> + *
> + * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
> + *
> + * Based on r8a7795-cpg-mssr.c
> + *
> + * Copyright (C) 2015 Glider bvba
> + * Copyright (C) 2015 Renesas Electronics Corp.
> + */
> +
> +#include <linux/device.h>
> +#include <linux/init.h>
> +#include <linux/kernel.h>
> +#include <linux/soc/renesas/rcar-rst.h>
> +
> +#include <dt-bindings/clock/r8a77965-cpg-mssr.h>
> +
> +#include "renesas-cpg-mssr.h"
> +#include "rcar-gen3-cpg.h"
> +
> +enum clk_ids {
> + /* Core Clock Outputs exported to DT */
> + LAST_DT_CORE_CLK = R8A77965_CLK_OSC,
> +
> + /* External Input Clocks */
> + CLK_EXTAL,
> + CLK_EXTALR,
> +
> + /* Internal Core Clocks */
> + CLK_MAIN,
> + CLK_PLL0,
> + CLK_PLL1,
> + CLK_PLL3,
> + CLK_PLL4,
> + CLK_PLL1_DIV2,
> + CLK_PLL1_DIV4,
> + CLK_S0,
> + CLK_S1,
> + CLK_S2,
> + CLK_S3,
> + CLK_SDSRC,
> + CLK_SSPSRC,
> + CLK_RINT,
> +
> + /* Module Clocks */
> + MOD_CLK_BASE
> +};
> +
> +static const struct cpg_core_clk r8a77965_core_clks[] __initconst = {
> + /* External Clock Inputs */
> + DEF_INPUT("extal", CLK_EXTAL),
> + DEF_INPUT("extalr", CLK_EXTALR),
> +
> + /* Internal Core Clocks */
> + DEF_BASE(".main", CLK_MAIN, CLK_TYPE_GEN3_MAIN, CLK_EXTAL),
> + DEF_BASE(".pll0", CLK_PLL0, CLK_TYPE_GEN3_PLL0, CLK_MAIN),
> + DEF_BASE(".pll1", CLK_PLL1, CLK_TYPE_GEN3_PLL1, CLK_MAIN),
> + DEF_BASE(".pll3", CLK_PLL3, CLK_TYPE_GEN3_PLL3, CLK_MAIN),
> + DEF_BASE(".pll4", CLK_PLL4, CLK_TYPE_GEN3_PLL4, CLK_MAIN),
> +
> + DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
> + DEF_FIXED(".pll1_div4", CLK_PLL1_DIV4, CLK_PLL1_DIV2, 2, 1),
> + DEF_FIXED(".s0", CLK_S0, CLK_PLL1_DIV2, 2, 1),
> + DEF_FIXED(".s1", CLK_S1, CLK_PLL1_DIV2, 3, 1),
> + DEF_FIXED(".s2", CLK_S2, CLK_PLL1_DIV2, 4, 1),
> + DEF_FIXED(".s3", CLK_S3, CLK_PLL1_DIV2, 6, 1),
> + DEF_FIXED(".sdsrc", CLK_SDSRC, CLK_PLL1_DIV2, 2, 1),
> +
> + /* Core Clock Outputs */
> + DEF_FIXED("ztr", R8A77965_CLK_ZTR, CLK_PLL1_DIV2, 6, 1),
> + DEF_FIXED("ztrd2", R8A77965_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
> + DEF_FIXED("zt", R8A77965_CLK_ZT, CLK_PLL1_DIV2, 4, 1),
> + DEF_FIXED("zx", R8A77965_CLK_ZX, CLK_PLL1_DIV2, 2, 1),
> + DEF_FIXED("s0d1", R8A77965_CLK_S0D1, CLK_S0, 1, 1),
> + DEF_FIXED("s0d2", R8A77965_CLK_S0D2, CLK_S0, 2, 1),
> + DEF_FIXED("s0d3", R8A77965_CLK_S0D3, CLK_S0, 3, 1),
> + DEF_FIXED("s0d4", R8A77965_CLK_S0D4, CLK_S0, 4, 1),
> + DEF_FIXED("s0d6", R8A77965_CLK_S0D6, CLK_S0, 6, 1),
> + DEF_FIXED("s0d8", R8A77965_CLK_S0D8, CLK_S0, 8, 1),
> + DEF_FIXED("s0d12", R8A77965_CLK_S0D12, CLK_S0, 12, 1),
> + DEF_FIXED("s1d1", R8A77965_CLK_S1D1, CLK_S1, 1, 1),
> + DEF_FIXED("s1d2", R8A77965_CLK_S1D2, CLK_S1, 2, 1),
> + DEF_FIXED("s1d4", R8A77965_CLK_S1D4, CLK_S1, 4, 1),
> + DEF_FIXED("s2d1", R8A77965_CLK_S2D1, CLK_S2, 1, 1),
> + DEF_FIXED("s2d2", R8A77965_CLK_S2D2, CLK_S2, 2, 1),
> + DEF_FIXED("s2d4", R8A77965_CLK_S2D4, CLK_S2, 4, 1),
> + DEF_FIXED("s3d1", R8A77965_CLK_S3D1, CLK_S3, 1, 1),
> + DEF_FIXED("s3d2", R8A77965_CLK_S3D2, CLK_S3, 2, 1),
> + DEF_FIXED("s3d4", R8A77965_CLK_S3D4, CLK_S3, 4, 1),
> +
> + DEF_GEN3_SD("sd0", R8A77965_CLK_SD0, CLK_SDSRC, 0x074),
> + DEF_GEN3_SD("sd1", R8A77965_CLK_SD1, CLK_SDSRC, 0x078),
> + DEF_GEN3_SD("sd2", R8A77965_CLK_SD2, CLK_SDSRC, 0x268),
> + DEF_GEN3_SD("sd3", R8A77965_CLK_SD3, CLK_SDSRC, 0x26c),
> +
> + DEF_FIXED("cl", R8A77965_CLK_CL, CLK_PLL1_DIV2, 48, 1),
> + DEF_FIXED("cp", R8A77965_CLK_CP, CLK_EXTAL, 2, 1),
> +
> + DEF_DIV6P1("canfd", R8A77965_CLK_CANFD, CLK_PLL1_DIV4, 0x244),
> + DEF_DIV6P1("csi0", R8A77965_CLK_CSI0, CLK_PLL1_DIV4, 0x00c),
> + DEF_DIV6P1("mso", R8A77965_CLK_MSO, CLK_PLL1_DIV4, 0x014),
> + DEF_DIV6P1("hdmi", R8A77965_CLK_HDMI, CLK_PLL1_DIV4, 0x250),
> +
> + DEF_DIV6_RO("osc", R8A77965_CLK_OSC, CLK_EXTAL, CPG_RCKCR, 8),
> + DEF_DIV6_RO("r_int", CLK_RINT, CLK_EXTAL, CPG_RCKCR, 32),
> +
> + DEF_BASE("r", R8A77965_CLK_R, CLK_TYPE_GEN3_R, CLK_RINT),
> +};
> +
> +static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
> + DEF_MOD("scif5", 202, R8A77965_CLK_S3D4),
> + DEF_MOD("scif4", 203, R8A77965_CLK_S3D4),
> + DEF_MOD("scif3", 204, R8A77965_CLK_S3D4),
> + DEF_MOD("scif1", 206, R8A77965_CLK_S3D4),
> + DEF_MOD("scif0", 207, R8A77965_CLK_S3D4),
> + DEF_MOD("sys-dmac2", 217, R8A77965_CLK_S0D3),
> + DEF_MOD("sys-dmac1", 218, R8A77965_CLK_S0D3),
> + DEF_MOD("sys-dmac0", 219, R8A77965_CLK_S0D3),
> +
> + DEF_MOD("cmt3", 300, R8A77965_CLK_R),
> + DEF_MOD("cmt2", 301, R8A77965_CLK_R),
> + DEF_MOD("cmt1", 302, R8A77965_CLK_R),
> + DEF_MOD("cmt0", 303, R8A77965_CLK_R),
> + DEF_MOD("scif2", 310, R8A77965_CLK_S3D4),
> + DEF_MOD("sdif3", 311, R8A77965_CLK_SD3),
> + DEF_MOD("sdif2", 312, R8A77965_CLK_SD2),
> + DEF_MOD("sdif1", 313, R8A77965_CLK_SD1),
> + DEF_MOD("sdif0", 314, R8A77965_CLK_SD0),
> + DEF_MOD("pcie1", 318, R8A77965_CLK_S3D1),
> + DEF_MOD("pcie0", 319, R8A77965_CLK_S3D1),
> + DEF_MOD("usb3-if0", 328, R8A77965_CLK_S3D1),
> + DEF_MOD("usb-dmac0", 330, R8A77965_CLK_S3D1),
> + DEF_MOD("usb-dmac1", 331, R8A77965_CLK_S3D1),
> +
> + DEF_MOD("rwdt", 402, R8A77965_CLK_R),
> + DEF_MOD("intc-ex", 407, R8A77965_CLK_CP),
> + DEF_MOD("intc-ap", 408, R8A77965_CLK_S3D1),
> +
> + DEF_MOD("audmac1", 501, R8A77965_CLK_S0D3),
> + DEF_MOD("audmac0", 502, R8A77965_CLK_S0D3),
> + DEF_MOD("drif7", 508, R8A77965_CLK_S3D2),
> + DEF_MOD("drif6", 509, R8A77965_CLK_S3D2),
> + DEF_MOD("drif5", 510, R8A77965_CLK_S3D2),
> + DEF_MOD("drif4", 511, R8A77965_CLK_S3D2),
> + DEF_MOD("drif3", 512, R8A77965_CLK_S3D2),
> + DEF_MOD("drif2", 513, R8A77965_CLK_S3D2),
> + DEF_MOD("drif1", 514, R8A77965_CLK_S3D2),
> + DEF_MOD("drif0", 515, R8A77965_CLK_S3D2),
> + DEF_MOD("hscif4", 516, R8A77965_CLK_S3D1),
> + DEF_MOD("hscif3", 517, R8A77965_CLK_S3D1),
> + DEF_MOD("hscif2", 518, R8A77965_CLK_S3D1),
> + DEF_MOD("hscif1", 519, R8A77965_CLK_S3D1),
> + DEF_MOD("hscif0", 520, R8A77965_CLK_S3D1),
> + DEF_MOD("thermal", 522, R8A77965_CLK_CP),
> + DEF_MOD("pwm", 523, R8A77965_CLK_S0D12),
> +
> + DEF_MOD("fcpvd1", 602, R8A77965_CLK_S0D2),
> + DEF_MOD("fcpvd0", 603, R8A77965_CLK_S0D2),
> + DEF_MOD("fcpvb0", 607, R8A77965_CLK_S0D1),
> + DEF_MOD("fcpvi0", 611, R8A77965_CLK_S0D1),
> + DEF_MOD("fcpf0", 615, R8A77965_CLK_S0D1),
> + DEF_MOD("fcpcs", 619, R8A77965_CLK_S0D2),
> + DEF_MOD("vspd1", 622, R8A77965_CLK_S0D2),
> + DEF_MOD("vspd0", 623, R8A77965_CLK_S0D2),
> + DEF_MOD("vspb", 626, R8A77965_CLK_S0D1),
> + DEF_MOD("vspi0", 631, R8A77965_CLK_S0D1),
> +
> + DEF_MOD("ehci1", 702, R8A77965_CLK_S3D4),
> + DEF_MOD("ehci0", 703, R8A77965_CLK_S3D4),
> + DEF_MOD("hsusb", 704, R8A77965_CLK_S3D4),
> + DEF_MOD("csi20", 714, R8A77965_CLK_CSI0),
> + DEF_MOD("csi40", 716, R8A77965_CLK_CSI0),
> + DEF_MOD("du2", 722, R8A77965_CLK_S2D1),
> + DEF_MOD("du1", 723, R8A77965_CLK_S2D1),
> + DEF_MOD("du0", 724, R8A77965_CLK_S2D1),
> + DEF_MOD("lvds", 727, R8A77965_CLK_S2D1),
> + DEF_MOD("hdmi0", 729, R8A77965_CLK_HDMI),
> +
> + DEF_MOD("vin7", 804, R8A77965_CLK_S0D2),
> + DEF_MOD("vin6", 805, R8A77965_CLK_S0D2),
> + DEF_MOD("vin5", 806, R8A77965_CLK_S0D2),
> + DEF_MOD("vin4", 807, R8A77965_CLK_S0D2),
> + DEF_MOD("vin3", 808, R8A77965_CLK_S0D2),
> + DEF_MOD("vin2", 809, R8A77965_CLK_S0D2),
> + DEF_MOD("vin1", 810, R8A77965_CLK_S0D2),
> + DEF_MOD("vin0", 811, R8A77965_CLK_S0D2),
> + DEF_MOD("etheravb", 812, R8A77965_CLK_S0D6),
> + DEF_MOD("imr1", 822, R8A77965_CLK_S0D2),
> + DEF_MOD("imr0", 823, R8A77965_CLK_S0D2),
> +
> + DEF_MOD("gpio7", 905, R8A77965_CLK_S3D4),
> + DEF_MOD("gpio6", 906, R8A77965_CLK_S3D4),
> + DEF_MOD("gpio5", 907, R8A77965_CLK_S3D4),
> + DEF_MOD("gpio4", 908, R8A77965_CLK_S3D4),
> + DEF_MOD("gpio3", 909, R8A77965_CLK_S3D4),
> + DEF_MOD("gpio2", 910, R8A77965_CLK_S3D4),
> + DEF_MOD("gpio1", 911, R8A77965_CLK_S3D4),
> + DEF_MOD("gpio0", 912, R8A77965_CLK_S3D4),
> + DEF_MOD("can-fd", 914, R8A77965_CLK_S3D2),
> + DEF_MOD("can-if1", 915, R8A77965_CLK_S3D4),
> + DEF_MOD("can-if0", 916, R8A77965_CLK_S3D4),
> + DEF_MOD("i2c6", 918, R8A77965_CLK_S0D6),
> + DEF_MOD("i2c5", 919, R8A77965_CLK_S0D6),
> + DEF_MOD("i2c-dvfs", 926, R8A77965_CLK_CP),
> + DEF_MOD("i2c4", 927, R8A77965_CLK_S0D6),
> + DEF_MOD("i2c3", 928, R8A77965_CLK_S0D6),
> + DEF_MOD("i2c2", 929, R8A77965_CLK_S3D2),
> + DEF_MOD("i2c1", 930, R8A77965_CLK_S3D2),
> + DEF_MOD("i2c0", 931, R8A77965_CLK_S3D2),
> +
> + DEF_MOD("ssi-all", 1005, R8A77965_CLK_S3D4),
> + DEF_MOD("ssi9", 1006, MOD_CLK_ID(1005)),
> + DEF_MOD("ssi8", 1007, MOD_CLK_ID(1005)),
> + DEF_MOD("ssi7", 1008, MOD_CLK_ID(1005)),
> + DEF_MOD("ssi6", 1009, MOD_CLK_ID(1005)),
> + DEF_MOD("ssi5", 1010, MOD_CLK_ID(1005)),
> + DEF_MOD("ssi4", 1011, MOD_CLK_ID(1005)),
> + DEF_MOD("ssi3", 1012, MOD_CLK_ID(1005)),
> + DEF_MOD("ssi2", 1013, MOD_CLK_ID(1005)),
> + DEF_MOD("ssi1", 1014, MOD_CLK_ID(1005)),
> + DEF_MOD("ssi0", 1015, MOD_CLK_ID(1005)),
> + DEF_MOD("scu-all", 1017, R8A77965_CLK_S3D4),
> + DEF_MOD("scu-dvc1", 1018, MOD_CLK_ID(1017)),
> + DEF_MOD("scu-dvc0", 1019, MOD_CLK_ID(1017)),
> + DEF_MOD("scu-ctu1-mix1", 1020, MOD_CLK_ID(1017)),
> + DEF_MOD("scu-ctu0-mix0", 1021, MOD_CLK_ID(1017)),
> + DEF_MOD("scu-src9", 1022, MOD_CLK_ID(1017)),
> + DEF_MOD("scu-src8", 1023, MOD_CLK_ID(1017)),
> + DEF_MOD("scu-src7", 1024, MOD_CLK_ID(1017)),
> + DEF_MOD("scu-src6", 1025, MOD_CLK_ID(1017)),
> + DEF_MOD("scu-src5", 1026, MOD_CLK_ID(1017)),
> + DEF_MOD("scu-src4", 1027, MOD_CLK_ID(1017)),
> + DEF_MOD("scu-src3", 1028, MOD_CLK_ID(1017)),
> + DEF_MOD("scu-src2", 1029, MOD_CLK_ID(1017)),
> + DEF_MOD("scu-src1", 1030, MOD_CLK_ID(1017)),
> + DEF_MOD("scu-src0", 1031, MOD_CLK_ID(1017)),
> +};
> +
> +static const unsigned int r8a77965_crit_mod_clks[] __initconst = {
> + MOD_CLK_ID(408), /* INTC-AP (GIC) */
> +};
> +
> +/*
> + * CPG Clock Data
> + */
> +
> +/*
> + * MD EXTAL PLL0 PLL1 PLL3 PLL4
> + * 14 13 19 17 (MHz)
> + *-----------------------------------------------------------
> + * 0 0 0 0 16.66 x 1 x180 x192 x192 x144
> + * 0 0 0 1 16.66 x 1 x180 x192 x128 x144
> + * 0 0 1 0 Prohibited setting
> + * 0 0 1 1 16.66 x 1 x180 x192 x192 x144
> + * 0 1 0 0 20 x 1 x150 x160 x160 x120
> + * 0 1 0 1 20 x 1 x150 x160 x106 x120
> + * 0 1 1 0 Prohibited setting
> + * 0 1 1 1 20 x 1 x150 x160 x160 x120
> + * 1 0 0 0 25 x 1 x120 x128 x128 x96
> + * 1 0 0 1 25 x 1 x120 x128 x84 x96
> + * 1 0 1 0 Prohibited setting
> + * 1 0 1 1 25 x 1 x120 x128 x128 x96
> + * 1 1 0 0 33.33 / 2 x180 x192 x192 x144
> + * 1 1 0 1 33.33 / 2 x180 x192 x128 x144
> + * 1 1 1 0 Prohibited setting
> + * 1 1 1 1 33.33 / 2 x180 x192 x192 x144
> + */
> +#define CPG_PLL_CONFIG_INDEX(md) ((((md) & BIT(14)) >> 11) | \
> + (((md) & BIT(13)) >> 11) | \
> + (((md) & BIT(19)) >> 18) | \
> + (((md) & BIT(17)) >> 17))
> +
> +static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[16] __initconst = {
> + /* EXTAL div PLL1 mult/div PLL3 mult/div */
> + { 1, 192, 1, 192, 1, },
> + { 1, 192, 1, 128, 1, },
> + { 0, /* Prohibited setting */ },
> + { 1, 192, 1, 192, 1, },
> + { 1, 160, 1, 160, 1, },
> + { 1, 160, 1, 106, 1, },
> + { 0, /* Prohibited setting */ },
> + { 1, 160, 1, 160, 1, },
> + { 1, 128, 1, 128, 1, },
> + { 1, 128, 1, 84, 1, },
> + { 0, /* Prohibited setting */ },
> + { 1, 128, 1, 128, 1, },
> + { 2, 192, 1, 192, 1, },
> + { 2, 192, 1, 128, 1, },
> + { 0, /* Prohibited setting */ },
> + { 2, 192, 1, 192, 1, },
> +};
> +
> +static int __init r8a77965_cpg_mssr_init(struct device *dev)
> +{
> + const struct rcar_gen3_cpg_pll_config *cpg_pll_config;
> + u32 cpg_mode;
> + int error;
> +
> + error = rcar_rst_read_mode_pins(&cpg_mode);
> + if (error)
> + return error;
> +
> + cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)];
> + if (!cpg_pll_config->extal_div) {
> + dev_err(dev, "Prohibited setting (cpg_mode=0x%x)\n", cpg_mode);
> + return -EINVAL;
> + }
> +
> + return rcar_gen3_cpg_init(cpg_pll_config, CLK_EXTALR, cpg_mode);
> +};
> +
> +const struct cpg_mssr_info r8a77965_cpg_mssr_info __initconst = {
> + /* Core Clocks */
> + .core_clks = r8a77965_core_clks,
> + .num_core_clks = ARRAY_SIZE(r8a77965_core_clks),
> + .last_dt_core_clk = LAST_DT_CORE_CLK,
> + .num_total_core_clks = MOD_CLK_BASE,
> +
> + /* Module Clocks */
> + .mod_clks = r8a77965_mod_clks,
> + .num_mod_clks = ARRAY_SIZE(r8a77965_mod_clks),
> + .num_hw_mod_clks = 12 * 32,
> +
> + /* Critical Module Clocks */
> + .crit_mod_clks = r8a77965_crit_mod_clks,
> + .num_crit_mod_clks = ARRAY_SIZE(r8a77965_crit_mod_clks),
> +
> + /* Callbacks */
> + .init = r8a77965_cpg_mssr_init,
> + .cpg_clk_register = rcar_gen3_cpg_clk_register,
> +};
> diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c
> index e3cc72c..b4b7d36 100644
> --- a/drivers/clk/renesas/renesas-cpg-mssr.c
> +++ b/drivers/clk/renesas/renesas-cpg-mssr.c
> @@ -693,6 +693,12 @@ static const struct of_device_id cpg_mssr_match[] = {
> .data = &r8a7796_cpg_mssr_info,
> },
> #endif
> +#ifdef CONFIG_CLK_R8A77965
> + {
> + .compatible = "renesas,r8a77965-cpg-mssr",
> + .data = &r8a77965_cpg_mssr_info,
> + },
> +#endif
> #ifdef CONFIG_CLK_R8A77970
> {
> .compatible = "renesas,r8a77970-cpg-mssr",
> diff --git a/drivers/clk/renesas/renesas-cpg-mssr.h b/drivers/clk/renesas/renesas-cpg-mssr.h
> index 0745b09..44397d3 100644
> --- a/drivers/clk/renesas/renesas-cpg-mssr.h
> +++ b/drivers/clk/renesas/renesas-cpg-mssr.h
> @@ -139,6 +139,7 @@ extern const struct cpg_mssr_info r8a7792_cpg_mssr_info;
> extern const struct cpg_mssr_info r8a7794_cpg_mssr_info;
> extern const struct cpg_mssr_info r8a7795_cpg_mssr_info;
> extern const struct cpg_mssr_info r8a7796_cpg_mssr_info;
> +extern const struct cpg_mssr_info r8a77965_cpg_mssr_info;
> extern const struct cpg_mssr_info r8a77970_cpg_mssr_info;
> extern const struct cpg_mssr_info r8a77995_cpg_mssr_info;
>
> diff --git a/include/dt-bindings/clock/r8a77965-cpg-mssr.h b/include/dt-bindings/clock/r8a77965-cpg-mssr.h
> new file mode 100644
> index 0000000..6d3b5a9
> --- /dev/null
> +++ b/include/dt-bindings/clock/r8a77965-cpg-mssr.h
> @@ -0,0 +1,62 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
> + */
> +#ifndef __DT_BINDINGS_CLOCK_R8A77965_CPG_MSSR_H__
> +#define __DT_BINDINGS_CLOCK_R8A77965_CPG_MSSR_H__
> +
> +#include <dt-bindings/clock/renesas-cpg-mssr.h>
> +
> +/* r8a77965 CPG Core Clocks */
> +#define R8A77965_CLK_Z 0
> +#define R8A77965_CLK_ZR 1
> +#define R8A77965_CLK_ZG 2
> +#define R8A77965_CLK_ZTR 3
> +#define R8A77965_CLK_ZTRD2 4
> +#define R8A77965_CLK_ZT 5
> +#define R8A77965_CLK_ZX 6
> +#define R8A77965_CLK_S0D1 7
> +#define R8A77965_CLK_S0D2 8
> +#define R8A77965_CLK_S0D3 9
> +#define R8A77965_CLK_S0D4 10
> +#define R8A77965_CLK_S0D6 11
> +#define R8A77965_CLK_S0D8 12
> +#define R8A77965_CLK_S0D12 13
> +#define R8A77965_CLK_S1D1 14
> +#define R8A77965_CLK_S1D2 15
> +#define R8A77965_CLK_S1D4 16
> +#define R8A77965_CLK_S2D1 17
> +#define R8A77965_CLK_S2D2 18
> +#define R8A77965_CLK_S2D4 19
> +#define R8A77965_CLK_S3D1 20
> +#define R8A77965_CLK_S3D2 21
> +#define R8A77965_CLK_S3D4 22
> +#define R8A77965_CLK_LB 23
> +#define R8A77965_CLK_CL 24
> +#define R8A77965_CLK_ZB3 25
> +#define R8A77965_CLK_ZB3D2 26
> +#define R8A77965_CLK_CR 27
> +#define R8A77965_CLK_CRD2 28
> +#define R8A77965_CLK_SD0H 29
> +#define R8A77965_CLK_SD0 30
> +#define R8A77965_CLK_SD1H 31
> +#define R8A77965_CLK_SD1 32
> +#define R8A77965_CLK_SD2H 33
> +#define R8A77965_CLK_SD2 34
> +#define R8A77965_CLK_SD3H 35
> +#define R8A77965_CLK_SD3 36
> +#define R8A77965_CLK_SSP2 37
> +#define R8A77965_CLK_SSP1 38
> +#define R8A77965_CLK_SSPRS 39
> +#define R8A77965_CLK_RPC 40
> +#define R8A77965_CLK_RPCD2 41
> +#define R8A77965_CLK_MSO 42
> +#define R8A77965_CLK_CANFD 43
> +#define R8A77965_CLK_HDMI 44
> +#define R8A77965_CLK_CSI0 45
> +#define R8A77965_CLK_CP 46
> +#define R8A77965_CLK_CPEX 47
> +#define R8A77965_CLK_R 48
> +#define R8A77965_CLK_OSC 49
> +
> +#endif /* __DT_BINDINGS_CLOCK_R8A77965_CPG_MSSR_H__ */
>
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 01/15] Documentation: devicetree: R-Car M3-N SoC DT bindings
[not found] ` <1518515162-23663-2-git-send-email-jacopo+renesas@jmondi.org>
@ 2018-02-14 10:01 ` Simon Horman
2018-02-19 2:52 ` Rob Herring
2018-02-14 10:36 ` Geert Uytterhoeven
1 sibling, 1 reply; 47+ messages in thread
From: Simon Horman @ 2018-02-14 10:01 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Feb 13, 2018 at 10:45:48AM +0100, Jacopo Mondi wrote:
> Add device tree bindings documentation for Renesas R-Car M3-N (r8a77965)
> SoC.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Thanks, this looks fine to me but I think the subject should be updated to
dt-bindings: arm: document R8A77965 SoC bindings
I'll let this sit for a few days to see if any other review is forthcoming.
> ---
> Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt
> index 5c3af7e..7eb4830 100644
> --- a/Documentation/devicetree/bindings/arm/shmobile.txt
> +++ b/Documentation/devicetree/bindings/arm/shmobile.txt
> @@ -39,6 +39,8 @@ SoCs:
> compatible = "renesas,r8a7795"
> - R-Car M3-W (R8A77960)
> compatible = "renesas,r8a7796"
> + - R-Car M3-N (R8A77965)
> + compatible = "renesas,r8a77965"
> - R-Car V3M (R8A77970)
> compatible = "renesas,r8a77970"
> - R-Car D3 (R8A77995)
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 01/15] Documentation: devicetree: R-Car M3-N SoC DT bindings
[not found] ` <1518515162-23663-2-git-send-email-jacopo+renesas@jmondi.org>
2018-02-14 10:01 ` [PATCH 01/15] Documentation: devicetree: R-Car M3-N SoC DT bindings Simon Horman
@ 2018-02-14 10:36 ` Geert Uytterhoeven
1 sibling, 0 replies; 47+ messages in thread
From: Geert Uytterhoeven @ 2018-02-14 10:36 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Feb 13, 2018 at 10:45 AM, Jacopo Mondi
<jacopo+renesas@jmondi.org> wrote:
> Add device tree bindings documentation for Renesas R-Car M3-N (r8a77965)
> SoC.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 02/15] clk: renesas: cpg-msr: Add support for R-Car M3-N
2018-02-13 9:45 ` [PATCH 02/15] clk: renesas: cpg-msr: Add support for R-Car M3-N Jacopo Mondi
2018-02-13 11:48 ` Kieran Bingham
@ 2018-02-14 11:03 ` Geert Uytterhoeven
2018-02-15 15:31 ` Simon Horman
2018-02-19 2:53 ` Rob Herring
3 siblings, 0 replies; 47+ messages in thread
From: Geert Uytterhoeven @ 2018-02-14 11:03 UTC (permalink / raw)
To: linux-arm-kernel
Hi Jacopo,
On Tue, Feb 13, 2018 at 10:45 AM, Jacopo Mondi
<jacopo+renesas@jmondi.org> wrote:
> Initial support for R-Car M3-N (r8a77965), including core and module
> clocks.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Thanks for your patch!
Please refer to Table 8.2d of R-Car Series, 3rd Generation User's Manual:
Hardware (Rev. 0.80, Oct 31, 2017), so we know which exact version of
the datasheet
was used for the core clock definitions.
> --- /dev/null
> +++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c
> @@ -0,0 +1,333 @@
> +static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
> + DEF_MOD("scif5", 202, R8A77965_CLK_S3D4),
> + DEF_MOD("scif4", 203, R8A77965_CLK_S3D4),
> + DEF_MOD("scif3", 204, R8A77965_CLK_S3D4),
> + DEF_MOD("scif1", 206, R8A77965_CLK_S3D4),
> + DEF_MOD("scif0", 207, R8A77965_CLK_S3D4),
> + DEF_MOD("sys-dmac2", 217, R8A77965_CLK_S0D3),
> + DEF_MOD("sys-dmac1", 218, R8A77965_CLK_S0D3),
> + DEF_MOD("sys-dmac0", 219, R8A77965_CLK_S0D3),
> +
> + DEF_MOD("cmt3", 300, R8A77965_CLK_R),
> + DEF_MOD("cmt2", 301, R8A77965_CLK_R),
> + DEF_MOD("cmt1", 302, R8A77965_CLK_R),
> + DEF_MOD("cmt0", 303, R8A77965_CLK_R),
> + DEF_MOD("scif2", 310, R8A77965_CLK_S3D4),
> + DEF_MOD("sdif3", 311, R8A77965_CLK_SD3),
> + DEF_MOD("sdif2", 312, R8A77965_CLK_SD2),
> + DEF_MOD("sdif1", 313, R8A77965_CLK_SD1),
> + DEF_MOD("sdif0", 314, R8A77965_CLK_SD0),
> + DEF_MOD("pcie1", 318, R8A77965_CLK_S3D1),
> + DEF_MOD("pcie0", 319, R8A77965_CLK_S3D1),
> + DEF_MOD("usb3-if0", 328, R8A77965_CLK_S3D1),
> + DEF_MOD("usb-dmac0", 330, R8A77965_CLK_S3D1),
> + DEF_MOD("usb-dmac1", 331, R8A77965_CLK_S3D1),
> +
> + DEF_MOD("rwdt", 402, R8A77965_CLK_R),
> + DEF_MOD("intc-ex", 407, R8A77965_CLK_CP),
> + DEF_MOD("intc-ap", 408, R8A77965_CLK_S3D1),
According to Figure 12A.1 the parent clock is S0D3. See also commit
6e7ddf89d67c2b0c ("clk: renesas: r8a7796: Correct parent clock of INTC-AP").
> +static int __init r8a77965_cpg_mssr_init(struct device *dev)
> +{
[...]
> +
> + return rcar_gen3_cpg_init(cpg_pll_config, CLK_EXTALR, cpg_mode);
> +};
Stray semicolon.
With the above fixed:
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 03/15] soc: renesas: Add R-Car M3-N support
[not found] ` <1518515162-23663-4-git-send-email-jacopo+renesas@jmondi.org>
@ 2018-02-14 12:48 ` Geert Uytterhoeven
2018-02-15 15:34 ` Simon Horman
2018-02-20 10:10 ` jacopo mondi
0 siblings, 2 replies; 47+ messages in thread
From: Geert Uytterhoeven @ 2018-02-14 12:48 UTC (permalink / raw)
To: linux-arm-kernel
Hi Jacopo,
Thanks for your patch!
On Tue, Feb 13, 2018 at 10:45 AM, Jacopo Mondi
<jacopo+renesas@jmondi.org> wrote:
> Add support for R-Car M3-N (r8a77965) power areas and reset.
> M3-N power areas are identical to M3-W ones, so just copy and rename
> them.
They are not identical:
- M3-N does not have the CA53-related areas,
- M3-W does not have A3VP,
- M3-N does not have A2VC0 (M3-W also doesn't, according to latest
datasheet?).
The datasheet also mentions A3SH, without further info about the register
block. I think we need to bring this up with Renesas.
> .../bindings/power/renesas,rcar-sysc.txt | 1 +
> .../devicetree/bindings/reset/renesas,rst.txt | 1 +
> drivers/soc/renesas/Kconfig | 9 ++++--
> drivers/soc/renesas/Makefile | 1 +
> drivers/soc/renesas/r8a77965-sysc.c | 37 ++++++++++++++++++++++
> drivers/soc/renesas/rcar-rst.c | 1 +
> drivers/soc/renesas/rcar-sysc.c | 3 ++
> drivers/soc/renesas/rcar-sysc.h | 1 +
> drivers/soc/renesas/renesas-soc.c | 8 +++++
> include/dt-bindings/power/r8a77965-sysc.h | 31 ++++++++++++++++++
> 10 files changed, 91 insertions(+), 2 deletions(-)
> create mode 100644 drivers/soc/renesas/r8a77965-sysc.c
> create mode 100644 include/dt-bindings/power/r8a77965-sysc.h
The maintainer may ask you to split this patch by functionality...
> --- /dev/null
> +++ b/drivers/soc/renesas/r8a77965-sysc.c
> @@ -0,0 +1,37 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Renesas R-Car M3-N System Controller
> + * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
> + *
> + * Based on Renesas R-Car M3-W System Controller
> + * Copyright (C) 2016 Glider bvba
> + */
> +
> +#include <linux/bug.h>
> +#include <linux/kernel.h>
> +
> +#include <dt-bindings/power/r8a77965-sysc.h>
> +
> +#include "rcar-sysc.h"
> +
> +static const struct rcar_sysc_area r8a77965_areas[] __initconst = {
> + { "always-on", 0, 0, R8A77965_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
> + { "ca57-scu", 0x1c0, 0, R8A77965_PD_CA57_SCU, R8A77965_PD_ALWAYS_ON,
> + PD_SCU },
> + { "ca57-cpu0", 0x80, 0, R8A77965_PD_CA57_CPU0, R8A77965_PD_CA57_SCU,
> + PD_CPU_NOCR },
> + { "ca57-cpu1", 0x80, 1, R8A77965_PD_CA57_CPU1, R8A77965_PD_CA57_SCU,
> + PD_CPU_NOCR },
> + { "cr7", 0x240, 0, R8A77965_PD_CR7, R8A77965_PD_ALWAYS_ON },
> + { "a3vc", 0x380, 0, R8A77965_PD_A3VC, R8A77965_PD_ALWAYS_ON },
> + { "a2vc0", 0x3c0, 0, R8A77965_PD_A2VC0, R8A77965_PD_A3VC },
M3-N (and M3-W) does not have A2VC0?
> + { "a2vc1", 0x3c0, 1, R8A77965_PD_A2VC1, R8A77965_PD_A3VC },
> + { "3dg-a", 0x100, 0, R8A77965_PD_3DG_A, R8A77965_PD_ALWAYS_ON },
> + { "3dg-b", 0x100, 1, R8A77965_PD_3DG_B, R8A77965_PD_3DG_A },
> + { "a3ir", 0x180, 0, R8A77965_PD_A3IR, R8A77965_PD_ALWAYS_ON },
A3VP is missing?
> +};
> +
> +const struct rcar_sysc_info r8a77965_sysc_info __initconst = {
> + .areas = r8a77965_areas,
> + .num_areas = ARRAY_SIZE(r8a77965_areas),
> +};
> --- /dev/null
> +++ b/include/dt-bindings/power/r8a77965-sysc.h
> @@ -0,0 +1,31 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
> + * Copyright (C) 2016 Glider bvba
> + */
> +
> +#ifndef __DT_BINDINGS_POWER_R8A77965_SYSC_H__
> +#define __DT_BINDINGS_POWER_R8A77965_SYSC_H__
> +
> +/*
> + * These power domain indices match the numbers of the interrupt bits
> + * representing the power areas in the various Interrupt Registers
> + * (e.g. SYSCISR, Interrupt Status Register)
> + */
> +
> +#define R8A77965_PD_CA57_CPU0 0
> +#define R8A77965_PD_CA57_CPU1 1
> +#define R8A77965_PD_A3VP 9
> +#define R8A77965_PD_CA57_SCU 12
> +#define R8A77965_PD_CR7 13
> +#define R8A77965_PD_A3VC 14
> +#define R8A77965_PD_3DG_A 17
> +#define R8A77965_PD_3DG_B 18
> +#define R8A77965_PD_A3IR 24
> +#define R8A77965_PD_A2VC0 25
M3-N (and M3-W) does not have A2VC0?
> +#define R8A77965_PD_A2VC1 26
> +
> +/* Always-on power area */
> +#define R8A77965_PD_ALWAYS_ON 32
> +
> +#endif /* __DT_BINDINGS_POWER_R8A77965_SYSC_H__ */
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 04/15] pinctrl: sh-pfc: Initial R-Car M3-N support
[not found] ` <1518515162-23663-5-git-send-email-jacopo+renesas@jmondi.org>
@ 2018-02-14 13:37 ` Geert Uytterhoeven
2018-02-14 13:53 ` jacopo mondi
2018-02-19 2:57 ` Rob Herring
1 sibling, 1 reply; 47+ messages in thread
From: Geert Uytterhoeven @ 2018-02-14 13:37 UTC (permalink / raw)
To: linux-arm-kernel
Hi Jacopo,
On Tue, Feb 13, 2018 at 10:45 AM, Jacopo Mondi
<jacopo+renesas@jmondi.org> wrote:
> Add initial PFC support for R-Car M3-N (r8a77965) SoC.
> No groups or functions defined, just pin and registers enumeration.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Thanks for your patch!
Looks mostly OK to me.
You do want to compare with pfc-r8a7796.c: all differences not related to
SATA_DEVSL, FSCLK, DU_DOTCLKIN2/3, and PRESET are issues that were fixed
recently in pfc-r8a7796.c, and should apply to pfc-r8a77965.c, too.
That leaves us with very few differences only, but it won't be trivial to have
a combined M3-W/N PFC driver, I'm afraid.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 04/15] pinctrl: sh-pfc: Initial R-Car M3-N support
2018-02-14 13:37 ` [PATCH 04/15] pinctrl: sh-pfc: Initial " Geert Uytterhoeven
@ 2018-02-14 13:53 ` jacopo mondi
2018-02-14 14:25 ` Geert Uytterhoeven
0 siblings, 1 reply; 47+ messages in thread
From: jacopo mondi @ 2018-02-14 13:53 UTC (permalink / raw)
To: linux-arm-kernel
Hi Geert,
thanks for review
On Wed, Feb 14, 2018 at 02:37:08PM +0100, Geert Uytterhoeven wrote:
> Hi Jacopo,
>
> On Tue, Feb 13, 2018 at 10:45 AM, Jacopo Mondi
> <jacopo+renesas@jmondi.org> wrote:
> > Add initial PFC support for R-Car M3-N (r8a77965) SoC.
> > No groups or functions defined, just pin and registers enumeration.
> >
> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
>
> Thanks for your patch!
>
> Looks mostly OK to me.
> You do want to compare with pfc-r8a7796.c: all differences not related to
> SATA_DEVSL, FSCLK, DU_DOTCLKIN2/3, and PRESET are issues that were fixed
> recently in pfc-r8a7796.c, and should apply to pfc-r8a77965.c, too.
>
I have used the M3-W tables with the exception of the pins/groups you
mentioned, that are clearly marked as different in the datasheet. At
least, this was my intention :)
I used v4.15 M3-W PFC tables, should I look in v4.16-rc1 or in
renesas-drivers for updates?
> That leaves us with very few differences only, but it won't be trivial to have
> a combined M3-W/N PFC driver, I'm afraid.
>
Takes a certain degree of grep-foo to clearly highlight differences
between the two version. Do you have any script/tools you use to
compare PFC tables a bit more easily?
Thanks
j
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 05/15] ARM64: dts: Add R-Car Salvator-x M3-N support
[not found] ` <1518515162-23663-6-git-send-email-jacopo+renesas@jmondi.org>
@ 2018-02-14 13:58 ` Geert Uytterhoeven
2018-02-14 21:22 ` Philippe Ombredanne
2018-02-15 15:38 ` Simon Horman
2018-02-16 9:20 ` Geert Uytterhoeven
2018-02-16 9:36 ` Geert Uytterhoeven
2 siblings, 2 replies; 47+ messages in thread
From: Geert Uytterhoeven @ 2018-02-14 13:58 UTC (permalink / raw)
To: linux-arm-kernel
Hi Jacopo,
On Tue, Feb 13, 2018 at 10:45 AM, Jacopo Mondi
<jacopo+renesas@jmondi.org> wrote:
> Add initial support for R-Car M3-N Salvator-x and r8a77965 SoC in
> device tree with cpg-mssr, reset and clock nodes.
>
> Add place-holder device nodes for all nodes referred by
> "salvator-common.dtsi"
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Thanks for your patch!
Looks mostly fine to me.
P.S. scripts/dtc/dtx_diff arch/arm64/boot/dts/renesas/r8a7796{,5}-salvator-x.dtb
is your friend.
> arch/arm64/Kconfig.platforms | 6 +
> arch/arm64/boot/dts/renesas/Makefile | 1 +
> .../arm64/boot/dts/renesas/r8a77965-salvator-x.dts | 30 ++
> arch/arm64/boot/dts/renesas/r8a77965.dtsi | 495 +++++++++++++++++++++
> 4 files changed, 532 insertions(+)
> create mode 100644 arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dts
> create mode 100644 arch/arm64/boot/dts/renesas/r8a77965.dtsi
The maintainer will probably ask you to split this in three parts:
- ARCH_R8A77965
- r8a77965.dtsi
- r8a77965-salvator-x.dts
> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dts
> @@ -0,0 +1,30 @@
> +// SPDX-License-Identifier: GPL-2.
> +/*
> + * Device Tree Source for the Salvator-X board
with R-Car M3-N
> + *
> + * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
> + */
> +
> +/dts-v1/;
> +#include "r8a77965.dtsi"
> +#include "salvator-x.dtsi"
> +
> +/ {
> + model = "Renesas Salvator-X board based on r8a77965";
> + compatible = "renesas,salvator-x", "renesas,r8a77965";
> +
> + aliases {
> + serial0 = &scif2;
> + };
> +
> + chosen {
> + bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
> + stdout-path = "serial0:115200n8";
> + };
Both aliases and chosen are already defined in salvator-common.dtsi,
included via salvator-x.dtsi.
> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> @@ -0,0 +1,495 @@
> +// SPDX-License-Identifier: GPL-2.
> +/*
> + * Device Tree Source for the r8a77965 SoC
> + *
> + * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
> + *
> + * Based on r8a7796.dtsi
> + * Copyright (C) 2016 Renesas Electronics Corp.
> + */
> +
> +#include <dt-bindings/clock/r8a77965-cpg-mssr.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/power/r8a77965-sysc.h>
> +
> +#define CPG_AUDIO_CLK_I R8A77965_CLK_S0D4
> +
> +/ {
> + soc {
> + compatible = "simple-bus";
> + interrupt-parent = <&gic>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupts = <GIC_PPI 13
> + (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 14
> + (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 11
> + (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 10
> + (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
> + };
Please move the timer out of the soc node, as it does't have a unit address
and a reg property.
> + pmu_a57 {
> + compatible = "arm,cortex-a57-pmu";
> + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-affinity = <&a57_0>,
> + <&a57_1>;
> + };
Please move the pmu out of the soc node, as it does't have a unit address
and a reg property.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 06/15] Documentation: devicetree: dma: Add r8a77965 dmac
[not found] ` <1518515162-23663-7-git-send-email-jacopo+renesas@jmondi.org>
@ 2018-02-14 13:59 ` Geert Uytterhoeven
2018-02-15 15:39 ` Simon Horman
1 sibling, 0 replies; 47+ messages in thread
From: Geert Uytterhoeven @ 2018-02-14 13:59 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Feb 13, 2018 at 10:45 AM, Jacopo Mondi
<jacopo+renesas@jmondi.org> wrote:
> Add documentation for r8a77965 compatible string to rcar-dmac device
> tree bindings documentation.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 08/15] Documentation: devicetree: renesas, sci: Add r8a77965
[not found] ` <1518515162-23663-9-git-send-email-jacopo+renesas@jmondi.org>
@ 2018-02-14 14:03 ` Geert Uytterhoeven
2018-02-15 15:47 ` [PATCH 08/15] Documentation: devicetree: renesas,sci: " Simon Horman
1 sibling, 0 replies; 47+ messages in thread
From: Geert Uytterhoeven @ 2018-02-14 14:03 UTC (permalink / raw)
To: linux-arm-kernel
Subject prefix should be "dt-bindings: serial: sh-sci: "
On Tue, Feb 13, 2018 at 10:45 AM, Jacopo Mondi
<jacopo+renesas@jmondi.org> wrote:
> Add documentation for r8a77965 compatible string to reneass sci-serial
Renesas
> device tree bindings documentation.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> ---
> Documentation/devicetree/bindings/serial/renesas,sci-serial.txt | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
> index cf504d0..cbb418a 100644
> --- a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
> +++ b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
> @@ -40,7 +40,9 @@ Required properties:
> - "renesas,scif-r8a7795" for R8A7795 (R-Car H3) SCIF compatible UART.
> - "renesas,hscif-r8a7795" for R8A7795 (R-Car H3) HSCIF compatible UART.
> - "renesas,scif-r8a7796" for R8A7796 (R-Car M3-W) SCIF compatible UART.
> + - "renesas,scif-r8a77965" for R8A77965 (R-Car M3-N) SCIF compatible UART.
> - "renesas,hscif-r8a7796" for R8A7796 (R-Car M3-W) HSCIF compatible UART.
> + - "renesas,hscif-r8a77965" for R8A77965 (R-Car M3-N) HSCIF compatible UART.
Please keep both r8a77965 entries together, like is done for other SoCs.
> - "renesas,scif-r8a77970" for R8A77970 (R-Car V3M) SCIF compatible UART.
> - "renesas,hscif-r8a77970" for R8A77970 (R-Car V3M) HSCIF compatible UART.
> - "renesas,scif-r8a77995" for R8A77995 (R-Car D3) SCIF compatible UART.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 11/15] gpio: rcar: Add R-Car M3-N compatible string
[not found] ` <1518515162-23663-12-git-send-email-jacopo+renesas@jmondi.org>
@ 2018-02-14 14:05 ` Geert Uytterhoeven
2018-02-20 13:35 ` jacopo mondi
0 siblings, 1 reply; 47+ messages in thread
From: Geert Uytterhoeven @ 2018-02-14 14:05 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Feb 13, 2018 at 10:45 AM, Jacopo Mondi
<jacopo+renesas@jmondi.org> wrote:
> Add compatible string for R-Car M3-N (r8a77965) in gpio-rcar.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> --- a/drivers/gpio/gpio-rcar.c
> +++ b/drivers/gpio/gpio-rcar.c
> @@ -360,6 +360,10 @@ static const struct of_device_id gpio_rcar_of_table[] = {
> /* Gen3 GPIO is identical to Gen2. */
> .data = &gpio_rcar_info_gen2,
> }, {
> + .compatible = "renesas,gpio-r8a77965",
> + /* Gen3 GPIO is identical to Gen2. */
> + .data = &gpio_rcar_info_gen2,
> + }, {
This part is not needed, as the driver already matches agains the generic
"renesas,rcar-gen3-gpio".
> .compatible = "renesas,rcar-gen1-gpio",
> .data = &gpio_rcar_info_gen1,
> }, {
With the above fixed:
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 13/15] Documentation: devicetree: ravb: Add r8a77965
[not found] ` <1518515162-23663-14-git-send-email-jacopo+renesas@jmondi.org>
@ 2018-02-14 14:06 ` Geert Uytterhoeven
2018-02-14 15:02 ` Sergei Shtylyov
2018-02-15 15:45 ` Simon Horman
2 siblings, 0 replies; 47+ messages in thread
From: Geert Uytterhoeven @ 2018-02-14 14:06 UTC (permalink / raw)
To: linux-arm-kernel
Subject prefix should be "dt-bindings: net: ravb:"
On Tue, Feb 13, 2018 at 10:46 AM, Jacopo Mondi
<jacopo+renesas@jmondi.org> wrote:
> Add documentation for r8a77965 compatible string to renesas ravb device
> tree bindings documentation.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 07/15] ARM64: dts: r8a77965: Add dmac device nods
[not found] ` <1518515162-23663-8-git-send-email-jacopo+renesas@jmondi.org>
@ 2018-02-14 14:08 ` Geert Uytterhoeven
0 siblings, 0 replies; 47+ messages in thread
From: Geert Uytterhoeven @ 2018-02-14 14:08 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Feb 13, 2018 at 10:45 AM, Jacopo Mondi
<jacopo+renesas@jmondi.org> wrote:
> Add dmac[0-2] device nodes for R-Car M3-N (r8a77965) SoC.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 12/15] ARM64: dts: r8a77965: Add GPIO nodes
[not found] ` <1518515162-23663-13-git-send-email-jacopo+renesas@jmondi.org>
@ 2018-02-14 14:10 ` Geert Uytterhoeven
0 siblings, 0 replies; 47+ messages in thread
From: Geert Uytterhoeven @ 2018-02-14 14:10 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Feb 13, 2018 at 10:45 AM, Jacopo Mondi
<jacopo+renesas@jmondi.org> wrote:
> Add GPIO nodes to r8a77965 SoC device tree file.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> @@ -201,38 +201,6 @@
> #power-domain-cells = <1>;
> };
>
> - gpio0: gpio at e6050000 {
> - /* placeholder */
> - };
> -
> - gpio1: gpio at e6051000 {
> - /* placeholder */
> - };
> -
> - gpio2: gpio at e6052000 {
> - /* placeholder */
> - };
> -
> - gpio3: gpio at e6053000 {
> - /* placeholder */
> - };
> -
> - gpio4: gpio at e6054000 {
> - /* placeholder */
> - };
> -
> - gpio5: gpio at e6055000 {
> - /* placeholder */
> - };
> -
> - gpio6: gpio at e6055400 {
> - /* placeholder */
> - };
> -
> - gpio7: gpio at e6055800 {
> - /* placeholder */
> - };
> -
> intc_ex: interrupt-controller at e61c0000 {
> /* placeholder */
> };
> @@ -339,6 +307,126 @@
> dma-channels = <16>;
> };
>
> + gpio0: gpio at e6050000 {
Why have you moved them?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 10/15] ARM64: dts: r8a77965: Add SCIF device nodes
[not found] ` <1518515162-23663-11-git-send-email-jacopo+renesas@jmondi.org>
@ 2018-02-14 14:13 ` Geert Uytterhoeven
0 siblings, 0 replies; 47+ messages in thread
From: Geert Uytterhoeven @ 2018-02-14 14:13 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Feb 13, 2018 at 10:45 AM, Jacopo Mondi
<jacopo+renesas@jmondi.org> wrote:
> Add SCIF[0-5] device nodes for M3-N (r8a77965) SoC.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> scif3: serial at e6c50000 {
> - /* placeholder */
> + compatible = "renesas,scif-r8a7796",
renesas,scif-r8a77965
> + "renesas,rcar-gen3-scif", "renesas,scif";
> + reg = <0 0xe6c50000 0 64>;
> + interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 204>,
> + <&cpg CPG_CORE R8A77965_CLK_S3D1>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x57>, <&dmac0 0x56>;
> + dma-names = "tx", "rx";
> + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
> + resets = <&cpg 204>;
> + status = "disabled";
> };
>
> scif4: serial at e6c40000 {
> - /* placeholder */
> + compatible = "renesas,scif-r8a7796",
renesas,scif-r8a77965
> + "renesas,rcar-gen3-scif", "renesas,scif";
> + reg = <0 0xe6c40000 0 64>;
> + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 203>,
> + <&cpg CPG_CORE R8A77965_CLK_S3D1>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x59>, <&dmac0 0x58>;
> + dma-names = "tx", "rx";
> + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
> + resets = <&cpg 203>;
> + status = "disabled";
> };
>
> scif5: serial at e6f30000 {
> - /* placeholder */
> + compatible = "renesas,scif-r8a7796",
renesas,scif-r8a77965
> + "renesas,rcar-gen3-scif", "renesas,scif";
> + reg = <0 0xe6f30000 0 64>;
> + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 202>,
> + <&cpg CPG_CORE R8A77965_CLK_S3D1>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
> + <&dmac2 0x5b>, <&dmac2 0x5a>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
> + resets = <&cpg 202>;
> + status = "disabled";
With the above fixed:
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 04/15] pinctrl: sh-pfc: Initial R-Car M3-N support
2018-02-14 13:53 ` jacopo mondi
@ 2018-02-14 14:25 ` Geert Uytterhoeven
0 siblings, 0 replies; 47+ messages in thread
From: Geert Uytterhoeven @ 2018-02-14 14:25 UTC (permalink / raw)
To: linux-arm-kernel
Hi Jacopo,
On Wed, Feb 14, 2018 at 2:53 PM, jacopo mondi <jacopo@jmondi.org> wrote:
> On Wed, Feb 14, 2018 at 02:37:08PM +0100, Geert Uytterhoeven wrote:
>> On Tue, Feb 13, 2018 at 10:45 AM, Jacopo Mondi
>> <jacopo+renesas@jmondi.org> wrote:
>> > Add initial PFC support for R-Car M3-N (r8a77965) SoC.
>> > No groups or functions defined, just pin and registers enumeration.
>> >
>> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
>>
>> Thanks for your patch!
>>
>> Looks mostly OK to me.
>> You do want to compare with pfc-r8a7796.c: all differences not related to
>> SATA_DEVSL, FSCLK, DU_DOTCLKIN2/3, and PRESET are issues that were fixed
>> recently in pfc-r8a7796.c, and should apply to pfc-r8a77965.c, too.
>>
>
> I have used the M3-W tables with the exception of the pins/groups you
> mentioned, that are clearly marked as different in the datasheet. At
> least, this was my intention :)
>
> I used v4.15 M3-W PFC tables, should I look in v4.16-rc1 or in
> renesas-drivers for updates?
Always look at the latest version in my sh-pfc branch ;-)
>> That leaves us with very few differences only, but it won't be trivial to have
>> a combined M3-W/N PFC driver, I'm afraid.
>
> Takes a certain degree of grep-foo to clearly highlight differences
> between the two version. Do you have any script/tools you use to
> compare PFC tables a bit more easily?
The "--no-index" option of git diff allows to compare files against each
other, instead of against some other version.
Can be combined with wdiff:
$ git help wdiff
`git wdiff' is aliased to `diff --color-words'
soc-dts-diff (https://www.spinics.net/lists/linux-renesas-soc/msg22630.html)
also helps, even for drivers.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 09/15] pinctrl: sh-pfc: r8a77965: Add SCIFs groups/functions
[not found] ` <1518515162-23663-10-git-send-email-jacopo+renesas@jmondi.org>
@ 2018-02-14 14:42 ` Geert Uytterhoeven
0 siblings, 0 replies; 47+ messages in thread
From: Geert Uytterhoeven @ 2018-02-14 14:42 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Feb 13, 2018 at 10:45 AM, Jacopo Mondi
<jacopo+renesas@jmondi.org> wrote:
> Add SCIF[0-5] groups and pin function definitions for R-Car M3-N.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Minor nit below...
> --- a/drivers/pinctrl/sh-pfc/pfc-r8a77965.c
> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77965.c
> @@ -1577,10 +1577,306 @@ static const struct sh_pfc_pin pinmux_pins[] = {
> SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 30, ASEBRK, CFG_FLAGS),
> };
>
> +/* - SCIF0 ------------------------------------------------------------------ */
> +static const unsigned int scif0_data_pins[] = {
> + /* RX, TX */
> + RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2),
> +};
> +static const unsigned int scif0_data_mux[] = {
> + RX0_MARK, TX0_MARK,
> +};
> +static const unsigned int scif0_clk_pins[] = {
> + /* SCK */
> + RCAR_GP_PIN(5, 0),
> +};
> +static const unsigned int scif0_clk_mux[] = {
> + SCK0_MARK,
> +};
> +static const unsigned int scif0_ctrl_pins[] = {
> + /* RTS, CTS */
> + RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 3),
> +};
> +static const unsigned int scif0_ctrl_mux[] = {
> + RTS0_N_TANS_MARK, CTS0_N_MARK,
Without TANS please (cfr. recent fixes to pfc-r8a7796.c).
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 14/15] pinctrl: sh-pfc: r8a77965: Add EtherAVB groups/functions
2018-02-13 9:46 ` [PATCH 14/15] pinctrl: sh-pfc: r8a77965: Add EtherAVB groups/functions Jacopo Mondi
@ 2018-02-14 14:47 ` Geert Uytterhoeven
0 siblings, 0 replies; 47+ messages in thread
From: Geert Uytterhoeven @ 2018-02-14 14:47 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Feb 13, 2018 at 10:46 AM, Jacopo Mondi
<jacopo+renesas@jmondi.org> wrote:
> Add EtherAVB groups and functions definitions for R-Car M3-N.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 15/15] ARM64: dts: r8a77965: Add EtherAVB device node
2018-02-13 9:46 ` [PATCH 15/15] ARM64: dts: r8a77965: Add EtherAVB device node Jacopo Mondi
@ 2018-02-14 14:48 ` Geert Uytterhoeven
0 siblings, 0 replies; 47+ messages in thread
From: Geert Uytterhoeven @ 2018-02-14 14:48 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Feb 13, 2018 at 10:46 AM, Jacopo Mondi
<jacopo+renesas@jmondi.org> wrote:
> Populate the ethernet at e6800000 device node to enable Ethernet interface
> for R-Car M3-N (r8a77965) SoC.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 13/15] Documentation: devicetree: ravb: Add r8a77965
[not found] ` <1518515162-23663-14-git-send-email-jacopo+renesas@jmondi.org>
2018-02-14 14:06 ` [PATCH 13/15] Documentation: devicetree: ravb: Add r8a77965 Geert Uytterhoeven
@ 2018-02-14 15:02 ` Sergei Shtylyov
2018-02-15 15:45 ` Simon Horman
2 siblings, 0 replies; 47+ messages in thread
From: Sergei Shtylyov @ 2018-02-14 15:02 UTC (permalink / raw)
To: linux-arm-kernel
Hello!
You need to send this patch to netdev and Cc me as well...
On 02/13/2018 12:46 PM, Jacopo Mondi wrote:
> Add documentation for r8a77965 compatible string to renesas ravb device
> tree bindings documentation.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
[...]
Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
MBR, Sergei
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 05/15] ARM64: dts: Add R-Car Salvator-x M3-N support
2018-02-14 13:58 ` [PATCH 05/15] ARM64: dts: Add R-Car Salvator-x " Geert Uytterhoeven
@ 2018-02-14 21:22 ` Philippe Ombredanne
2018-02-15 15:38 ` Simon Horman
1 sibling, 0 replies; 47+ messages in thread
From: Philippe Ombredanne @ 2018-02-14 21:22 UTC (permalink / raw)
To: linux-arm-kernel
Jacopo,
On Wed, Feb 14, 2018 at 2:58 PM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dts
>> @@ -0,0 +1,30 @@
>> +// SPDX-License-Identifier: GPL-2.
This should be GPL-2.0
<snip>
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
>> @@ -0,0 +1,495 @@
>> +// SPDX-License-Identifier: GPL-2.
This should be GPL-2.0 too.
--
Cordially
Philippe Ombredanne
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 02/15] clk: renesas: cpg-msr: Add support for R-Car M3-N
2018-02-13 9:45 ` [PATCH 02/15] clk: renesas: cpg-msr: Add support for R-Car M3-N Jacopo Mondi
2018-02-13 11:48 ` Kieran Bingham
2018-02-14 11:03 ` Geert Uytterhoeven
@ 2018-02-15 15:31 ` Simon Horman
2018-02-16 9:03 ` Geert Uytterhoeven
2018-02-19 2:53 ` Rob Herring
3 siblings, 1 reply; 47+ messages in thread
From: Simon Horman @ 2018-02-15 15:31 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Feb 13, 2018 at 10:45:49AM +0100, Jacopo Mondi wrote:
> Initial support for R-Car M3-N (r8a77965), including core and module
> clocks.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> ---
> .../devicetree/bindings/clock/renesas,cpg-mssr.txt | 1 +
> drivers/clk/renesas/Kconfig | 5 +
> drivers/clk/renesas/Makefile | 1 +
> drivers/clk/renesas/r8a77965-cpg-mssr.c | 333 +++++++++++++++++++++
> drivers/clk/renesas/renesas-cpg-mssr.c | 6 +
> drivers/clk/renesas/renesas-cpg-mssr.h | 1 +
> include/dt-bindings/clock/r8a77965-cpg-mssr.h | 62 ++++
> 7 files changed, 409 insertions(+)
> create mode 100644 drivers/clk/renesas/r8a77965-cpg-mssr.c
> create mode 100644 include/dt-bindings/clock/r8a77965-cpg-mssr.h
>
> diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
> index f1890d0..246ab63 100644
> --- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
> +++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
> @@ -22,6 +22,7 @@ Required Properties:
> - "renesas,r8a7794-cpg-mssr" for the r8a7794 SoC (R-Car E2)
> - "renesas,r8a7795-cpg-mssr" for the r8a7795 SoC (R-Car H3)
> - "renesas,r8a7796-cpg-mssr" for the r8a7796 SoC (R-Car M3-W)
> + - "renesas,r8a77965-cpg-mssr" for the r8a77965 SoC (R-Car M3-N)
> - "renesas,r8a77970-cpg-mssr" for the r8a77970 SoC (R-Car V3M)
> - "renesas,r8a77995-cpg-mssr" for the r8a77995 SoC (R-Car D3)
>
Its up to Geert, but would it be better if the bindings documentation
and driver changes where in separate patches?
> diff --git a/drivers/clk/renesas/Kconfig b/drivers/clk/renesas/Kconfig
> index 84b40b9..047d6b5 100644
> --- a/drivers/clk/renesas/Kconfig
> +++ b/drivers/clk/renesas/Kconfig
> @@ -15,6 +15,7 @@ config CLK_RENESAS
> select CLK_R8A7794 if ARCH_R8A7794
> select CLK_R8A7795 if ARCH_R8A7795
> select CLK_R8A7796 if ARCH_R8A7796
> + select CLK_R8A77965 if ARCH_R8A77965
> select CLK_R8A77970 if ARCH_R8A77970
> select CLK_R8A77995 if ARCH_R8A77995
> select CLK_SH73A0 if ARCH_SH73A0
> @@ -97,6 +98,10 @@ config CLK_R8A7796
> bool "R-Car M3-W clock support" if COMPILE_TEST
> select CLK_RCAR_GEN3_CPG
>
> +config CLK_R8A77965
> + bool "R-Car M3-N clock support" if COMPILE_TEST
> + select CLK_RCAR_GEN3_CPG
> +
> config CLK_R8A77970
> bool "R-Car V3M clock support" if COMPILE_TEST
> select CLK_RCAR_GEN3_CPG
> diff --git a/drivers/clk/renesas/Makefile b/drivers/clk/renesas/Makefile
> index 34c4e0b..2e0982f 100644
> --- a/drivers/clk/renesas/Makefile
> +++ b/drivers/clk/renesas/Makefile
> @@ -14,6 +14,7 @@ obj-$(CONFIG_CLK_R8A7792) += r8a7792-cpg-mssr.o
> obj-$(CONFIG_CLK_R8A7794) += r8a7794-cpg-mssr.o
> obj-$(CONFIG_CLK_R8A7795) += r8a7795-cpg-mssr.o
> obj-$(CONFIG_CLK_R8A7796) += r8a7796-cpg-mssr.o
> +obj-$(CONFIG_CLK_R8A77965) += r8a77965-cpg-mssr.o
> obj-$(CONFIG_CLK_R8A77970) += r8a77970-cpg-mssr.o
> obj-$(CONFIG_CLK_R8A77995) += r8a77995-cpg-mssr.o
> obj-$(CONFIG_CLK_SH73A0) += clk-sh73a0.o
> diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c
> new file mode 100644
> index 0000000..f29d42c
> --- /dev/null
> +++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c
> @@ -0,0 +1,333 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * r8a77965 Clock Pulse Generator / Module Standby and Software Reset
> + *
> + * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
> + *
> + * Based on r8a7795-cpg-mssr.c
> + *
> + * Copyright (C) 2015 Glider bvba
> + * Copyright (C) 2015 Renesas Electronics Corp.
> + */
> +
> +#include <linux/device.h>
> +#include <linux/init.h>
> +#include <linux/kernel.h>
> +#include <linux/soc/renesas/rcar-rst.h>
> +
> +#include <dt-bindings/clock/r8a77965-cpg-mssr.h>
> +
> +#include "renesas-cpg-mssr.h"
> +#include "rcar-gen3-cpg.h"
> +
> +enum clk_ids {
> + /* Core Clock Outputs exported to DT */
> + LAST_DT_CORE_CLK = R8A77965_CLK_OSC,
> +
> + /* External Input Clocks */
> + CLK_EXTAL,
> + CLK_EXTALR,
> +
> + /* Internal Core Clocks */
> + CLK_MAIN,
> + CLK_PLL0,
> + CLK_PLL1,
> + CLK_PLL3,
> + CLK_PLL4,
> + CLK_PLL1_DIV2,
> + CLK_PLL1_DIV4,
> + CLK_S0,
> + CLK_S1,
> + CLK_S2,
> + CLK_S3,
> + CLK_SDSRC,
> + CLK_SSPSRC,
> + CLK_RINT,
> +
> + /* Module Clocks */
> + MOD_CLK_BASE
> +};
> +
> +static const struct cpg_core_clk r8a77965_core_clks[] __initconst = {
> + /* External Clock Inputs */
> + DEF_INPUT("extal", CLK_EXTAL),
> + DEF_INPUT("extalr", CLK_EXTALR),
> +
> + /* Internal Core Clocks */
> + DEF_BASE(".main", CLK_MAIN, CLK_TYPE_GEN3_MAIN, CLK_EXTAL),
> + DEF_BASE(".pll0", CLK_PLL0, CLK_TYPE_GEN3_PLL0, CLK_MAIN),
> + DEF_BASE(".pll1", CLK_PLL1, CLK_TYPE_GEN3_PLL1, CLK_MAIN),
> + DEF_BASE(".pll3", CLK_PLL3, CLK_TYPE_GEN3_PLL3, CLK_MAIN),
> + DEF_BASE(".pll4", CLK_PLL4, CLK_TYPE_GEN3_PLL4, CLK_MAIN),
> +
> + DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
> + DEF_FIXED(".pll1_div4", CLK_PLL1_DIV4, CLK_PLL1_DIV2, 2, 1),
> + DEF_FIXED(".s0", CLK_S0, CLK_PLL1_DIV2, 2, 1),
> + DEF_FIXED(".s1", CLK_S1, CLK_PLL1_DIV2, 3, 1),
> + DEF_FIXED(".s2", CLK_S2, CLK_PLL1_DIV2, 4, 1),
> + DEF_FIXED(".s3", CLK_S3, CLK_PLL1_DIV2, 6, 1),
> + DEF_FIXED(".sdsrc", CLK_SDSRC, CLK_PLL1_DIV2, 2, 1),
> +
> + /* Core Clock Outputs */
> + DEF_FIXED("ztr", R8A77965_CLK_ZTR, CLK_PLL1_DIV2, 6, 1),
> + DEF_FIXED("ztrd2", R8A77965_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
> + DEF_FIXED("zt", R8A77965_CLK_ZT, CLK_PLL1_DIV2, 4, 1),
> + DEF_FIXED("zx", R8A77965_CLK_ZX, CLK_PLL1_DIV2, 2, 1),
> + DEF_FIXED("s0d1", R8A77965_CLK_S0D1, CLK_S0, 1, 1),
> + DEF_FIXED("s0d2", R8A77965_CLK_S0D2, CLK_S0, 2, 1),
> + DEF_FIXED("s0d3", R8A77965_CLK_S0D3, CLK_S0, 3, 1),
> + DEF_FIXED("s0d4", R8A77965_CLK_S0D4, CLK_S0, 4, 1),
> + DEF_FIXED("s0d6", R8A77965_CLK_S0D6, CLK_S0, 6, 1),
> + DEF_FIXED("s0d8", R8A77965_CLK_S0D8, CLK_S0, 8, 1),
> + DEF_FIXED("s0d12", R8A77965_CLK_S0D12, CLK_S0, 12, 1),
> + DEF_FIXED("s1d1", R8A77965_CLK_S1D1, CLK_S1, 1, 1),
> + DEF_FIXED("s1d2", R8A77965_CLK_S1D2, CLK_S1, 2, 1),
> + DEF_FIXED("s1d4", R8A77965_CLK_S1D4, CLK_S1, 4, 1),
> + DEF_FIXED("s2d1", R8A77965_CLK_S2D1, CLK_S2, 1, 1),
> + DEF_FIXED("s2d2", R8A77965_CLK_S2D2, CLK_S2, 2, 1),
> + DEF_FIXED("s2d4", R8A77965_CLK_S2D4, CLK_S2, 4, 1),
> + DEF_FIXED("s3d1", R8A77965_CLK_S3D1, CLK_S3, 1, 1),
> + DEF_FIXED("s3d2", R8A77965_CLK_S3D2, CLK_S3, 2, 1),
> + DEF_FIXED("s3d4", R8A77965_CLK_S3D4, CLK_S3, 4, 1),
> +
> + DEF_GEN3_SD("sd0", R8A77965_CLK_SD0, CLK_SDSRC, 0x074),
> + DEF_GEN3_SD("sd1", R8A77965_CLK_SD1, CLK_SDSRC, 0x078),
> + DEF_GEN3_SD("sd2", R8A77965_CLK_SD2, CLK_SDSRC, 0x268),
> + DEF_GEN3_SD("sd3", R8A77965_CLK_SD3, CLK_SDSRC, 0x26c),
> +
> + DEF_FIXED("cl", R8A77965_CLK_CL, CLK_PLL1_DIV2, 48, 1),
> + DEF_FIXED("cp", R8A77965_CLK_CP, CLK_EXTAL, 2, 1),
> +
> + DEF_DIV6P1("canfd", R8A77965_CLK_CANFD, CLK_PLL1_DIV4, 0x244),
> + DEF_DIV6P1("csi0", R8A77965_CLK_CSI0, CLK_PLL1_DIV4, 0x00c),
> + DEF_DIV6P1("mso", R8A77965_CLK_MSO, CLK_PLL1_DIV4, 0x014),
> + DEF_DIV6P1("hdmi", R8A77965_CLK_HDMI, CLK_PLL1_DIV4, 0x250),
> +
> + DEF_DIV6_RO("osc", R8A77965_CLK_OSC, CLK_EXTAL, CPG_RCKCR, 8),
> + DEF_DIV6_RO("r_int", CLK_RINT, CLK_EXTAL, CPG_RCKCR, 32),
> +
> + DEF_BASE("r", R8A77965_CLK_R, CLK_TYPE_GEN3_R, CLK_RINT),
> +};
> +
> +static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
> + DEF_MOD("scif5", 202, R8A77965_CLK_S3D4),
> + DEF_MOD("scif4", 203, R8A77965_CLK_S3D4),
> + DEF_MOD("scif3", 204, R8A77965_CLK_S3D4),
> + DEF_MOD("scif1", 206, R8A77965_CLK_S3D4),
> + DEF_MOD("scif0", 207, R8A77965_CLK_S3D4),
> + DEF_MOD("sys-dmac2", 217, R8A77965_CLK_S0D3),
> + DEF_MOD("sys-dmac1", 218, R8A77965_CLK_S0D3),
> + DEF_MOD("sys-dmac0", 219, R8A77965_CLK_S0D3),
> +
> + DEF_MOD("cmt3", 300, R8A77965_CLK_R),
> + DEF_MOD("cmt2", 301, R8A77965_CLK_R),
> + DEF_MOD("cmt1", 302, R8A77965_CLK_R),
> + DEF_MOD("cmt0", 303, R8A77965_CLK_R),
> + DEF_MOD("scif2", 310, R8A77965_CLK_S3D4),
> + DEF_MOD("sdif3", 311, R8A77965_CLK_SD3),
> + DEF_MOD("sdif2", 312, R8A77965_CLK_SD2),
> + DEF_MOD("sdif1", 313, R8A77965_CLK_SD1),
> + DEF_MOD("sdif0", 314, R8A77965_CLK_SD0),
> + DEF_MOD("pcie1", 318, R8A77965_CLK_S3D1),
> + DEF_MOD("pcie0", 319, R8A77965_CLK_S3D1),
> + DEF_MOD("usb3-if0", 328, R8A77965_CLK_S3D1),
> + DEF_MOD("usb-dmac0", 330, R8A77965_CLK_S3D1),
> + DEF_MOD("usb-dmac1", 331, R8A77965_CLK_S3D1),
> +
> + DEF_MOD("rwdt", 402, R8A77965_CLK_R),
> + DEF_MOD("intc-ex", 407, R8A77965_CLK_CP),
> + DEF_MOD("intc-ap", 408, R8A77965_CLK_S3D1),
> +
> + DEF_MOD("audmac1", 501, R8A77965_CLK_S0D3),
> + DEF_MOD("audmac0", 502, R8A77965_CLK_S0D3),
> + DEF_MOD("drif7", 508, R8A77965_CLK_S3D2),
> + DEF_MOD("drif6", 509, R8A77965_CLK_S3D2),
> + DEF_MOD("drif5", 510, R8A77965_CLK_S3D2),
> + DEF_MOD("drif4", 511, R8A77965_CLK_S3D2),
> + DEF_MOD("drif3", 512, R8A77965_CLK_S3D2),
> + DEF_MOD("drif2", 513, R8A77965_CLK_S3D2),
> + DEF_MOD("drif1", 514, R8A77965_CLK_S3D2),
> + DEF_MOD("drif0", 515, R8A77965_CLK_S3D2),
> + DEF_MOD("hscif4", 516, R8A77965_CLK_S3D1),
> + DEF_MOD("hscif3", 517, R8A77965_CLK_S3D1),
> + DEF_MOD("hscif2", 518, R8A77965_CLK_S3D1),
> + DEF_MOD("hscif1", 519, R8A77965_CLK_S3D1),
> + DEF_MOD("hscif0", 520, R8A77965_CLK_S3D1),
> + DEF_MOD("thermal", 522, R8A77965_CLK_CP),
> + DEF_MOD("pwm", 523, R8A77965_CLK_S0D12),
> +
> + DEF_MOD("fcpvd1", 602, R8A77965_CLK_S0D2),
> + DEF_MOD("fcpvd0", 603, R8A77965_CLK_S0D2),
> + DEF_MOD("fcpvb0", 607, R8A77965_CLK_S0D1),
> + DEF_MOD("fcpvi0", 611, R8A77965_CLK_S0D1),
> + DEF_MOD("fcpf0", 615, R8A77965_CLK_S0D1),
> + DEF_MOD("fcpcs", 619, R8A77965_CLK_S0D2),
> + DEF_MOD("vspd1", 622, R8A77965_CLK_S0D2),
> + DEF_MOD("vspd0", 623, R8A77965_CLK_S0D2),
> + DEF_MOD("vspb", 626, R8A77965_CLK_S0D1),
> + DEF_MOD("vspi0", 631, R8A77965_CLK_S0D1),
> +
> + DEF_MOD("ehci1", 702, R8A77965_CLK_S3D4),
> + DEF_MOD("ehci0", 703, R8A77965_CLK_S3D4),
> + DEF_MOD("hsusb", 704, R8A77965_CLK_S3D4),
> + DEF_MOD("csi20", 714, R8A77965_CLK_CSI0),
> + DEF_MOD("csi40", 716, R8A77965_CLK_CSI0),
> + DEF_MOD("du2", 722, R8A77965_CLK_S2D1),
> + DEF_MOD("du1", 723, R8A77965_CLK_S2D1),
> + DEF_MOD("du0", 724, R8A77965_CLK_S2D1),
> + DEF_MOD("lvds", 727, R8A77965_CLK_S2D1),
> + DEF_MOD("hdmi0", 729, R8A77965_CLK_HDMI),
> +
> + DEF_MOD("vin7", 804, R8A77965_CLK_S0D2),
> + DEF_MOD("vin6", 805, R8A77965_CLK_S0D2),
> + DEF_MOD("vin5", 806, R8A77965_CLK_S0D2),
> + DEF_MOD("vin4", 807, R8A77965_CLK_S0D2),
> + DEF_MOD("vin3", 808, R8A77965_CLK_S0D2),
> + DEF_MOD("vin2", 809, R8A77965_CLK_S0D2),
> + DEF_MOD("vin1", 810, R8A77965_CLK_S0D2),
> + DEF_MOD("vin0", 811, R8A77965_CLK_S0D2),
> + DEF_MOD("etheravb", 812, R8A77965_CLK_S0D6),
> + DEF_MOD("imr1", 822, R8A77965_CLK_S0D2),
> + DEF_MOD("imr0", 823, R8A77965_CLK_S0D2),
> +
> + DEF_MOD("gpio7", 905, R8A77965_CLK_S3D4),
> + DEF_MOD("gpio6", 906, R8A77965_CLK_S3D4),
> + DEF_MOD("gpio5", 907, R8A77965_CLK_S3D4),
> + DEF_MOD("gpio4", 908, R8A77965_CLK_S3D4),
> + DEF_MOD("gpio3", 909, R8A77965_CLK_S3D4),
> + DEF_MOD("gpio2", 910, R8A77965_CLK_S3D4),
> + DEF_MOD("gpio1", 911, R8A77965_CLK_S3D4),
> + DEF_MOD("gpio0", 912, R8A77965_CLK_S3D4),
> + DEF_MOD("can-fd", 914, R8A77965_CLK_S3D2),
> + DEF_MOD("can-if1", 915, R8A77965_CLK_S3D4),
> + DEF_MOD("can-if0", 916, R8A77965_CLK_S3D4),
> + DEF_MOD("i2c6", 918, R8A77965_CLK_S0D6),
> + DEF_MOD("i2c5", 919, R8A77965_CLK_S0D6),
> + DEF_MOD("i2c-dvfs", 926, R8A77965_CLK_CP),
> + DEF_MOD("i2c4", 927, R8A77965_CLK_S0D6),
> + DEF_MOD("i2c3", 928, R8A77965_CLK_S0D6),
> + DEF_MOD("i2c2", 929, R8A77965_CLK_S3D2),
> + DEF_MOD("i2c1", 930, R8A77965_CLK_S3D2),
> + DEF_MOD("i2c0", 931, R8A77965_CLK_S3D2),
> +
> + DEF_MOD("ssi-all", 1005, R8A77965_CLK_S3D4),
> + DEF_MOD("ssi9", 1006, MOD_CLK_ID(1005)),
> + DEF_MOD("ssi8", 1007, MOD_CLK_ID(1005)),
> + DEF_MOD("ssi7", 1008, MOD_CLK_ID(1005)),
> + DEF_MOD("ssi6", 1009, MOD_CLK_ID(1005)),
> + DEF_MOD("ssi5", 1010, MOD_CLK_ID(1005)),
> + DEF_MOD("ssi4", 1011, MOD_CLK_ID(1005)),
> + DEF_MOD("ssi3", 1012, MOD_CLK_ID(1005)),
> + DEF_MOD("ssi2", 1013, MOD_CLK_ID(1005)),
> + DEF_MOD("ssi1", 1014, MOD_CLK_ID(1005)),
> + DEF_MOD("ssi0", 1015, MOD_CLK_ID(1005)),
> + DEF_MOD("scu-all", 1017, R8A77965_CLK_S3D4),
> + DEF_MOD("scu-dvc1", 1018, MOD_CLK_ID(1017)),
> + DEF_MOD("scu-dvc0", 1019, MOD_CLK_ID(1017)),
> + DEF_MOD("scu-ctu1-mix1", 1020, MOD_CLK_ID(1017)),
> + DEF_MOD("scu-ctu0-mix0", 1021, MOD_CLK_ID(1017)),
> + DEF_MOD("scu-src9", 1022, MOD_CLK_ID(1017)),
> + DEF_MOD("scu-src8", 1023, MOD_CLK_ID(1017)),
> + DEF_MOD("scu-src7", 1024, MOD_CLK_ID(1017)),
> + DEF_MOD("scu-src6", 1025, MOD_CLK_ID(1017)),
> + DEF_MOD("scu-src5", 1026, MOD_CLK_ID(1017)),
> + DEF_MOD("scu-src4", 1027, MOD_CLK_ID(1017)),
> + DEF_MOD("scu-src3", 1028, MOD_CLK_ID(1017)),
> + DEF_MOD("scu-src2", 1029, MOD_CLK_ID(1017)),
> + DEF_MOD("scu-src1", 1030, MOD_CLK_ID(1017)),
> + DEF_MOD("scu-src0", 1031, MOD_CLK_ID(1017)),
> +};
> +
> +static const unsigned int r8a77965_crit_mod_clks[] __initconst = {
> + MOD_CLK_ID(408), /* INTC-AP (GIC) */
> +};
> +
> +/*
> + * CPG Clock Data
> + */
> +
> +/*
> + * MD EXTAL PLL0 PLL1 PLL3 PLL4
> + * 14 13 19 17 (MHz)
> + *-----------------------------------------------------------
> + * 0 0 0 0 16.66 x 1 x180 x192 x192 x144
> + * 0 0 0 1 16.66 x 1 x180 x192 x128 x144
> + * 0 0 1 0 Prohibited setting
> + * 0 0 1 1 16.66 x 1 x180 x192 x192 x144
> + * 0 1 0 0 20 x 1 x150 x160 x160 x120
> + * 0 1 0 1 20 x 1 x150 x160 x106 x120
> + * 0 1 1 0 Prohibited setting
> + * 0 1 1 1 20 x 1 x150 x160 x160 x120
> + * 1 0 0 0 25 x 1 x120 x128 x128 x96
> + * 1 0 0 1 25 x 1 x120 x128 x84 x96
> + * 1 0 1 0 Prohibited setting
> + * 1 0 1 1 25 x 1 x120 x128 x128 x96
> + * 1 1 0 0 33.33 / 2 x180 x192 x192 x144
> + * 1 1 0 1 33.33 / 2 x180 x192 x128 x144
> + * 1 1 1 0 Prohibited setting
> + * 1 1 1 1 33.33 / 2 x180 x192 x192 x144
> + */
> +#define CPG_PLL_CONFIG_INDEX(md) ((((md) & BIT(14)) >> 11) | \
> + (((md) & BIT(13)) >> 11) | \
> + (((md) & BIT(19)) >> 18) | \
> + (((md) & BIT(17)) >> 17))
> +
> +static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[16] __initconst = {
> + /* EXTAL div PLL1 mult/div PLL3 mult/div */
> + { 1, 192, 1, 192, 1, },
> + { 1, 192, 1, 128, 1, },
> + { 0, /* Prohibited setting */ },
> + { 1, 192, 1, 192, 1, },
> + { 1, 160, 1, 160, 1, },
> + { 1, 160, 1, 106, 1, },
> + { 0, /* Prohibited setting */ },
> + { 1, 160, 1, 160, 1, },
> + { 1, 128, 1, 128, 1, },
> + { 1, 128, 1, 84, 1, },
> + { 0, /* Prohibited setting */ },
> + { 1, 128, 1, 128, 1, },
> + { 2, 192, 1, 192, 1, },
> + { 2, 192, 1, 128, 1, },
> + { 0, /* Prohibited setting */ },
> + { 2, 192, 1, 192, 1, },
> +};
> +
> +static int __init r8a77965_cpg_mssr_init(struct device *dev)
> +{
> + const struct rcar_gen3_cpg_pll_config *cpg_pll_config;
> + u32 cpg_mode;
> + int error;
> +
> + error = rcar_rst_read_mode_pins(&cpg_mode);
> + if (error)
> + return error;
> +
> + cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)];
> + if (!cpg_pll_config->extal_div) {
> + dev_err(dev, "Prohibited setting (cpg_mode=0x%x)\n", cpg_mode);
> + return -EINVAL;
> + }
> +
> + return rcar_gen3_cpg_init(cpg_pll_config, CLK_EXTALR, cpg_mode);
> +};
> +
> +const struct cpg_mssr_info r8a77965_cpg_mssr_info __initconst = {
> + /* Core Clocks */
> + .core_clks = r8a77965_core_clks,
> + .num_core_clks = ARRAY_SIZE(r8a77965_core_clks),
> + .last_dt_core_clk = LAST_DT_CORE_CLK,
> + .num_total_core_clks = MOD_CLK_BASE,
> +
> + /* Module Clocks */
> + .mod_clks = r8a77965_mod_clks,
> + .num_mod_clks = ARRAY_SIZE(r8a77965_mod_clks),
> + .num_hw_mod_clks = 12 * 32,
> +
> + /* Critical Module Clocks */
> + .crit_mod_clks = r8a77965_crit_mod_clks,
> + .num_crit_mod_clks = ARRAY_SIZE(r8a77965_crit_mod_clks),
> +
> + /* Callbacks */
> + .init = r8a77965_cpg_mssr_init,
> + .cpg_clk_register = rcar_gen3_cpg_clk_register,
> +};
> diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c
> index e3cc72c..b4b7d36 100644
> --- a/drivers/clk/renesas/renesas-cpg-mssr.c
> +++ b/drivers/clk/renesas/renesas-cpg-mssr.c
> @@ -693,6 +693,12 @@ static const struct of_device_id cpg_mssr_match[] = {
> .data = &r8a7796_cpg_mssr_info,
> },
> #endif
> +#ifdef CONFIG_CLK_R8A77965
> + {
> + .compatible = "renesas,r8a77965-cpg-mssr",
> + .data = &r8a77965_cpg_mssr_info,
> + },
> +#endif
> #ifdef CONFIG_CLK_R8A77970
> {
> .compatible = "renesas,r8a77970-cpg-mssr",
> diff --git a/drivers/clk/renesas/renesas-cpg-mssr.h b/drivers/clk/renesas/renesas-cpg-mssr.h
> index 0745b09..44397d3 100644
> --- a/drivers/clk/renesas/renesas-cpg-mssr.h
> +++ b/drivers/clk/renesas/renesas-cpg-mssr.h
> @@ -139,6 +139,7 @@ extern const struct cpg_mssr_info r8a7792_cpg_mssr_info;
> extern const struct cpg_mssr_info r8a7794_cpg_mssr_info;
> extern const struct cpg_mssr_info r8a7795_cpg_mssr_info;
> extern const struct cpg_mssr_info r8a7796_cpg_mssr_info;
> +extern const struct cpg_mssr_info r8a77965_cpg_mssr_info;
> extern const struct cpg_mssr_info r8a77970_cpg_mssr_info;
> extern const struct cpg_mssr_info r8a77995_cpg_mssr_info;
>
> diff --git a/include/dt-bindings/clock/r8a77965-cpg-mssr.h b/include/dt-bindings/clock/r8a77965-cpg-mssr.h
> new file mode 100644
> index 0000000..6d3b5a9
> --- /dev/null
> +++ b/include/dt-bindings/clock/r8a77965-cpg-mssr.h
> @@ -0,0 +1,62 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
> + */
> +#ifndef __DT_BINDINGS_CLOCK_R8A77965_CPG_MSSR_H__
> +#define __DT_BINDINGS_CLOCK_R8A77965_CPG_MSSR_H__
> +
> +#include <dt-bindings/clock/renesas-cpg-mssr.h>
> +
> +/* r8a77965 CPG Core Clocks */
> +#define R8A77965_CLK_Z 0
> +#define R8A77965_CLK_ZR 1
> +#define R8A77965_CLK_ZG 2
> +#define R8A77965_CLK_ZTR 3
> +#define R8A77965_CLK_ZTRD2 4
> +#define R8A77965_CLK_ZT 5
> +#define R8A77965_CLK_ZX 6
> +#define R8A77965_CLK_S0D1 7
> +#define R8A77965_CLK_S0D2 8
> +#define R8A77965_CLK_S0D3 9
> +#define R8A77965_CLK_S0D4 10
> +#define R8A77965_CLK_S0D6 11
> +#define R8A77965_CLK_S0D8 12
> +#define R8A77965_CLK_S0D12 13
> +#define R8A77965_CLK_S1D1 14
> +#define R8A77965_CLK_S1D2 15
> +#define R8A77965_CLK_S1D4 16
> +#define R8A77965_CLK_S2D1 17
> +#define R8A77965_CLK_S2D2 18
> +#define R8A77965_CLK_S2D4 19
> +#define R8A77965_CLK_S3D1 20
> +#define R8A77965_CLK_S3D2 21
> +#define R8A77965_CLK_S3D4 22
> +#define R8A77965_CLK_LB 23
> +#define R8A77965_CLK_CL 24
> +#define R8A77965_CLK_ZB3 25
> +#define R8A77965_CLK_ZB3D2 26
> +#define R8A77965_CLK_CR 27
> +#define R8A77965_CLK_CRD2 28
> +#define R8A77965_CLK_SD0H 29
> +#define R8A77965_CLK_SD0 30
> +#define R8A77965_CLK_SD1H 31
> +#define R8A77965_CLK_SD1 32
> +#define R8A77965_CLK_SD2H 33
> +#define R8A77965_CLK_SD2 34
> +#define R8A77965_CLK_SD3H 35
> +#define R8A77965_CLK_SD3 36
> +#define R8A77965_CLK_SSP2 37
> +#define R8A77965_CLK_SSP1 38
> +#define R8A77965_CLK_SSPRS 39
> +#define R8A77965_CLK_RPC 40
> +#define R8A77965_CLK_RPCD2 41
> +#define R8A77965_CLK_MSO 42
> +#define R8A77965_CLK_CANFD 43
> +#define R8A77965_CLK_HDMI 44
> +#define R8A77965_CLK_CSI0 45
> +#define R8A77965_CLK_CP 46
> +#define R8A77965_CLK_CPEX 47
> +#define R8A77965_CLK_R 48
> +#define R8A77965_CLK_OSC 49
> +
> +#endif /* __DT_BINDINGS_CLOCK_R8A77965_CPG_MSSR_H__ */
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 03/15] soc: renesas: Add R-Car M3-N support
2018-02-14 12:48 ` [PATCH 03/15] soc: renesas: Add R-Car M3-N support Geert Uytterhoeven
@ 2018-02-15 15:34 ` Simon Horman
2018-02-20 10:10 ` jacopo mondi
1 sibling, 0 replies; 47+ messages in thread
From: Simon Horman @ 2018-02-15 15:34 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Feb 14, 2018 at 01:48:27PM +0100, Geert Uytterhoeven wrote:
> Hi Jacopo,
>
> Thanks for your patch!
>
> On Tue, Feb 13, 2018 at 10:45 AM, Jacopo Mondi
> <jacopo+renesas@jmondi.org> wrote:
> > Add support for R-Car M3-N (r8a77965) power areas and reset.
> > M3-N power areas are identical to M3-W ones, so just copy and rename
> > them.
>
> They are not identical:
> - M3-N does not have the CA53-related areas,
> - M3-W does not have A3VP,
> - M3-N does not have A2VC0 (M3-W also doesn't, according to latest
> datasheet?).
>
> The datasheet also mentions A3SH, without further info about the register
> block. I think we need to bring this up with Renesas.
>
> > .../bindings/power/renesas,rcar-sysc.txt | 1 +
> > .../devicetree/bindings/reset/renesas,rst.txt | 1 +
> > drivers/soc/renesas/Kconfig | 9 ++++--
> > drivers/soc/renesas/Makefile | 1 +
> > drivers/soc/renesas/r8a77965-sysc.c | 37 ++++++++++++++++++++++
> > drivers/soc/renesas/rcar-rst.c | 1 +
> > drivers/soc/renesas/rcar-sysc.c | 3 ++
> > drivers/soc/renesas/rcar-sysc.h | 1 +
> > drivers/soc/renesas/renesas-soc.c | 8 +++++
> > include/dt-bindings/power/r8a77965-sysc.h | 31 ++++++++++++++++++
> > 10 files changed, 91 insertions(+), 2 deletions(-)
> > create mode 100644 drivers/soc/renesas/r8a77965-sysc.c
> > create mode 100644 include/dt-bindings/power/r8a77965-sysc.h
>
> The maintainer may ask you to split this patch by functionality...
Yes, I would like this split up.
I think "[PATCH 00/11] Add R8A77980/Condor board support" provides
a good example.
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 05/15] ARM64: dts: Add R-Car Salvator-x M3-N support
2018-02-14 13:58 ` [PATCH 05/15] ARM64: dts: Add R-Car Salvator-x " Geert Uytterhoeven
2018-02-14 21:22 ` Philippe Ombredanne
@ 2018-02-15 15:38 ` Simon Horman
1 sibling, 0 replies; 47+ messages in thread
From: Simon Horman @ 2018-02-15 15:38 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Feb 14, 2018 at 02:58:34PM +0100, Geert Uytterhoeven wrote:
> Hi Jacopo,
>
> On Tue, Feb 13, 2018 at 10:45 AM, Jacopo Mondi
> <jacopo+renesas@jmondi.org> wrote:
> > Add initial support for R-Car M3-N Salvator-x and r8a77965 SoC in
> > device tree with cpg-mssr, reset and clock nodes.
> >
> > Add place-holder device nodes for all nodes referred by
> > "salvator-common.dtsi"
> >
> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
>
> Thanks for your patch!
>
> Looks mostly fine to me.
>
> P.S. scripts/dtc/dtx_diff arch/arm64/boot/dts/renesas/r8a7796{,5}-salvator-x.dtb
> is your friend.
>
> > arch/arm64/Kconfig.platforms | 6 +
> > arch/arm64/boot/dts/renesas/Makefile | 1 +
> > .../arm64/boot/dts/renesas/r8a77965-salvator-x.dts | 30 ++
> > arch/arm64/boot/dts/renesas/r8a77965.dtsi | 495 +++++++++++++++++++++
> > 4 files changed, 532 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dts
> > create mode 100644 arch/arm64/boot/dts/renesas/r8a77965.dtsi
>
> The maintainer will probably ask you to split this in three parts:
> - ARCH_R8A77965
> - r8a77965.dtsi
> - r8a77965-salvator-x.dts
Yes, I would like to ask for that.
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dts
> > @@ -0,0 +1,30 @@
> > +// SPDX-License-Identifier: GPL-2.
> > +/*
> > + * Device Tree Source for the Salvator-X board
>
> with R-Car M3-N
>
> > + *
> > + * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
> > + */
> > +
> > +/dts-v1/;
> > +#include "r8a77965.dtsi"
> > +#include "salvator-x.dtsi"
> > +
> > +/ {
> > + model = "Renesas Salvator-X board based on r8a77965";
> > + compatible = "renesas,salvator-x", "renesas,r8a77965";
> > +
> > + aliases {
> > + serial0 = &scif2;
> > + };
> > +
> > + chosen {
> > + bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
> > + stdout-path = "serial0:115200n8";
> > + };
>
> Both aliases and chosen are already defined in salvator-common.dtsi,
> included via salvator-x.dtsi.
>
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> > @@ -0,0 +1,495 @@
> > +// SPDX-License-Identifier: GPL-2.
> > +/*
> > + * Device Tree Source for the r8a77965 SoC
> > + *
> > + * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
> > + *
> > + * Based on r8a7796.dtsi
> > + * Copyright (C) 2016 Renesas Electronics Corp.
> > + */
> > +
> > +#include <dt-bindings/clock/r8a77965-cpg-mssr.h>
> > +#include <dt-bindings/interrupt-controller/arm-gic.h>
> > +#include <dt-bindings/power/r8a77965-sysc.h>
> > +
> > +#define CPG_AUDIO_CLK_I R8A77965_CLK_S0D4
> > +
> > +/ {
>
> > + soc {
> > + compatible = "simple-bus";
> > + interrupt-parent = <&gic>;
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > + ranges;
>
> > + timer {
> > + compatible = "arm,armv8-timer";
> > + interrupts = <GIC_PPI 13
> > + (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 14
> > + (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 11
> > + (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 10
> > + (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
> > + };
>
> Please move the timer out of the soc node, as it does't have a unit address
> and a reg property.
>
> > + pmu_a57 {
> > + compatible = "arm,cortex-a57-pmu";
> > + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-affinity = <&a57_0>,
> > + <&a57_1>;
> > + };
>
> Please move the pmu out of the soc node, as it does't have a unit address
> and a reg property.
Please refer to one of the upstream Gen3 dtsi files for examples of the
above.
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 06/15] Documentation: devicetree: dma: Add r8a77965 dmac
[not found] ` <1518515162-23663-7-git-send-email-jacopo+renesas@jmondi.org>
2018-02-14 13:59 ` [PATCH 06/15] Documentation: devicetree: dma: Add r8a77965 dmac Geert Uytterhoeven
@ 2018-02-15 15:39 ` Simon Horman
2018-02-15 15:56 ` Simon Horman
1 sibling, 1 reply; 47+ messages in thread
From: Simon Horman @ 2018-02-15 15:39 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Feb 13, 2018 at 10:45:53AM +0100, Jacopo Mondi wrote:
> Add documentation for r8a77965 compatible string to rcar-dmac device
> tree bindings documentation.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 13/15] Documentation: devicetree: ravb: Add r8a77965
[not found] ` <1518515162-23663-14-git-send-email-jacopo+renesas@jmondi.org>
2018-02-14 14:06 ` [PATCH 13/15] Documentation: devicetree: ravb: Add r8a77965 Geert Uytterhoeven
2018-02-14 15:02 ` Sergei Shtylyov
@ 2018-02-15 15:45 ` Simon Horman
2018-02-19 3:01 ` Rob Herring
2 siblings, 1 reply; 47+ messages in thread
From: Simon Horman @ 2018-02-15 15:45 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Feb 13, 2018 at 10:46:00AM +0100, Jacopo Mondi wrote:
> Add documentation for r8a77965 compatible string to renesas ravb device
> tree bindings documentation.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
This needs to be CCed to Sergei and netdev to proceed into mainline.
There are lot of examples and little consistency, but I believe a good
prefix and subject for the patch would be:
dt-bindings: net: ravb: Add support for r8a77965 SoC
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 08/15] Documentation: devicetree: renesas,sci: Add r8a77965
[not found] ` <1518515162-23663-9-git-send-email-jacopo+renesas@jmondi.org>
2018-02-14 14:03 ` [PATCH 08/15] Documentation: devicetree: renesas, sci: " Geert Uytterhoeven
@ 2018-02-15 15:47 ` Simon Horman
2018-02-19 2:59 ` Rob Herring
1 sibling, 1 reply; 47+ messages in thread
From: Simon Horman @ 2018-02-15 15:47 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Feb 13, 2018 at 10:45:55AM +0100, Jacopo Mondi wrote:
> Add documentation for r8a77965 compatible string to reneass sci-serial
> device tree bindings documentation.
I think a better subject would be:
dt-bindings: serial: sh-sci: Add support for r8a77965 (H)SCIF
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 06/15] Documentation: devicetree: dma: Add r8a77965 dmac
2018-02-15 15:39 ` Simon Horman
@ 2018-02-15 15:56 ` Simon Horman
2018-02-16 9:01 ` Geert Uytterhoeven
2018-02-19 2:58 ` Rob Herring
0 siblings, 2 replies; 47+ messages in thread
From: Simon Horman @ 2018-02-15 15:56 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Feb 15, 2018 at 04:39:49PM +0100, Simon Horman wrote:
> On Tue, Feb 13, 2018 at 10:45:53AM +0100, Jacopo Mondi wrote:
> > Add documentation for r8a77965 compatible string to rcar-dmac device
> > tree bindings documentation.
> >
> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
>
> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Sorry for not noticing this the first time around.
I think a better subject would be:
dt-bindings: dmaengine: rcar-dmac: document R8A77964 support
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 06/15] Documentation: devicetree: dma: Add r8a77965 dmac
2018-02-15 15:56 ` Simon Horman
@ 2018-02-16 9:01 ` Geert Uytterhoeven
2018-02-16 13:40 ` Simon Horman
2018-02-19 2:58 ` Rob Herring
1 sibling, 1 reply; 47+ messages in thread
From: Geert Uytterhoeven @ 2018-02-16 9:01 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Feb 15, 2018 at 4:56 PM, Simon Horman <horms@verge.net.au> wrote:
> On Thu, Feb 15, 2018 at 04:39:49PM +0100, Simon Horman wrote:
>> On Tue, Feb 13, 2018 at 10:45:53AM +0100, Jacopo Mondi wrote:
>> > Add documentation for r8a77965 compatible string to rcar-dmac device
>> > tree bindings documentation.
>> >
>> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
>>
>> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
>
> Sorry for not noticing this the first time around.
>
> I think a better subject would be:
>
> dt-bindings: dmaengine: rcar-dmac: document R8A77964 support
s/64/65/ ;-)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 02/15] clk: renesas: cpg-msr: Add support for R-Car M3-N
2018-02-15 15:31 ` Simon Horman
@ 2018-02-16 9:03 ` Geert Uytterhoeven
0 siblings, 0 replies; 47+ messages in thread
From: Geert Uytterhoeven @ 2018-02-16 9:03 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon,
On Thu, Feb 15, 2018 at 4:31 PM, Simon Horman <horms@verge.net.au> wrote:
> On Tue, Feb 13, 2018 at 10:45:49AM +0100, Jacopo Mondi wrote:
>> Initial support for R-Car M3-N (r8a77965), including core and module
>> clocks.
>>
>> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
>> ---
>> .../devicetree/bindings/clock/renesas,cpg-mssr.txt | 1 +
>> drivers/clk/renesas/Kconfig | 5 +
>> drivers/clk/renesas/Makefile | 1 +
>> drivers/clk/renesas/r8a77965-cpg-mssr.c | 333 +++++++++++++++++++++
>> drivers/clk/renesas/renesas-cpg-mssr.c | 6 +
>> drivers/clk/renesas/renesas-cpg-mssr.h | 1 +
>> include/dt-bindings/clock/r8a77965-cpg-mssr.h | 62 ++++
>> 7 files changed, 409 insertions(+)
>> create mode 100644 drivers/clk/renesas/r8a77965-cpg-mssr.c
>> create mode 100644 include/dt-bindings/clock/r8a77965-cpg-mssr.h
>>
>> diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
>> index f1890d0..246ab63 100644
>> --- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
>> +++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
>> @@ -22,6 +22,7 @@ Required Properties:
>> - "renesas,r8a7794-cpg-mssr" for the r8a7794 SoC (R-Car E2)
>> - "renesas,r8a7795-cpg-mssr" for the r8a7795 SoC (R-Car H3)
>> - "renesas,r8a7796-cpg-mssr" for the r8a7796 SoC (R-Car M3-W)
>> + - "renesas,r8a77965-cpg-mssr" for the r8a77965 SoC (R-Car M3-N)
>> - "renesas,r8a77970-cpg-mssr" for the r8a77970 SoC (R-Car V3M)
>> - "renesas,r8a77995-cpg-mssr" for the r8a77995 SoC (R-Car D3)
>>
>
> Its up to Geert, but would it be better if the bindings documentation
> and driver changes where in separate patches?
I don't care that much anymore.
It used to be a good idea when the bindings header went in separately,
as it was a dependency for both driver and DTS. But now we use hardcoded
constants in the first version of the DTS, so it doesn't matter anymore.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 05/15] ARM64: dts: Add R-Car Salvator-x M3-N support
[not found] ` <1518515162-23663-6-git-send-email-jacopo+renesas@jmondi.org>
2018-02-14 13:58 ` [PATCH 05/15] ARM64: dts: Add R-Car Salvator-x " Geert Uytterhoeven
@ 2018-02-16 9:20 ` Geert Uytterhoeven
2018-02-16 9:36 ` Geert Uytterhoeven
2 siblings, 0 replies; 47+ messages in thread
From: Geert Uytterhoeven @ 2018-02-16 9:20 UTC (permalink / raw)
To: linux-arm-kernel
Hi Jacopo,
On Tue, Feb 13, 2018 at 10:45 AM, Jacopo Mondi
<jacopo+renesas@jmondi.org> wrote:
> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> @@ -0,0 +1,495 @@
> +// SPDX-License-Identifier: GPL-2.
> +/*
> + * Device Tree Source for the r8a77965 SoC
> + *
> + * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
> + *
> + * Based on r8a7796.dtsi
> + * Copyright (C) 2016 Renesas Electronics Corp.
> + */
> +
> +#include <dt-bindings/clock/r8a77965-cpg-mssr.h>
For the initial submission, it's better to use hardcoded numbers than the
R8A77965_CLK_* definitions, as the latter go in through a different tree.
Hence you should replace above include by
#include <dt-bindings/clock/renesas-cpg-mssr.h>
and replace R8A77965_CLK_* by hardcoded numbers in all r8a77965.dtsi
patches.
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/power/r8a77965-sysc.h>
For the initial submission, it's better to use hardcoded numbers than the
R8A77965_PD_* definitions, as the latter go in through a different tree.
Hence you should drop the above include, and replace R8A77965_PD_*
by hardcoded numbers in all r8a77965.dtsi patches.
The hardcoded numbers can be replaced by symbolic definitions later,
when the definitions have hit mainline.
Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 05/15] ARM64: dts: Add R-Car Salvator-x M3-N support
[not found] ` <1518515162-23663-6-git-send-email-jacopo+renesas@jmondi.org>
2018-02-14 13:58 ` [PATCH 05/15] ARM64: dts: Add R-Car Salvator-x " Geert Uytterhoeven
2018-02-16 9:20 ` Geert Uytterhoeven
@ 2018-02-16 9:36 ` Geert Uytterhoeven
2 siblings, 0 replies; 47+ messages in thread
From: Geert Uytterhoeven @ 2018-02-16 9:36 UTC (permalink / raw)
To: linux-arm-kernel
Hi Jacopo,
On Tue, Feb 13, 2018 at 10:45 AM, Jacopo Mondi
<jacopo+renesas@jmondi.org> wrote:
> Add initial support for R-Car M3-N Salvator-x and r8a77965 SoC in
> device tree with cpg-mssr, reset and clock nodes.
>
> Add place-holder device nodes for all nodes referred by
> "salvator-common.dtsi"
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> + gic: interrupt-controller at f1010000 {
> + compatible = "arm,gic-400";
> + #interrupt-cells = <3>;
> + #address-cells = <0>;
> + interrupt-controller;
> + reg = <0x0 0xf1010000 0 0x1000>,
> + <0x0 0xf1020000 0 0x20000>,
> + <0x0 0xf1040000 0 0x20000>,
> + <0x0 0xf1060000 0 0x20000>;
> + interrupts = <GIC_PPI 9
> + (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
Given you have 2 CPU cores, it should say GIC_CPU_MASK_SIMPLE(2).
> + clocks = <&cpg CPG_MOD 408>;
> + clock-names = "clk";
> + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
> + resets = <&cpg 408>;
> + };
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupts = <GIC_PPI 13
> + (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 14
> + (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 11
> + (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 10
> + (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
This one is correct.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 06/15] Documentation: devicetree: dma: Add r8a77965 dmac
2018-02-16 9:01 ` Geert Uytterhoeven
@ 2018-02-16 13:40 ` Simon Horman
0 siblings, 0 replies; 47+ messages in thread
From: Simon Horman @ 2018-02-16 13:40 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Feb 16, 2018 at 10:01:33AM +0100, Geert Uytterhoeven wrote:
> On Thu, Feb 15, 2018 at 4:56 PM, Simon Horman <horms@verge.net.au> wrote:
> > On Thu, Feb 15, 2018 at 04:39:49PM +0100, Simon Horman wrote:
> >> On Tue, Feb 13, 2018 at 10:45:53AM +0100, Jacopo Mondi wrote:
> >> > Add documentation for r8a77965 compatible string to rcar-dmac device
> >> > tree bindings documentation.
> >> >
> >> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> >>
> >> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
> >
> > Sorry for not noticing this the first time around.
> >
> > I think a better subject would be:
> >
> > dt-bindings: dmaengine: rcar-dmac: document R8A77964 support
>
> s/64/65/ ;-)
These kind of errors allow you to verify that the email really came from me :)
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 01/15] Documentation: devicetree: R-Car M3-N SoC DT bindings
2018-02-14 10:01 ` [PATCH 01/15] Documentation: devicetree: R-Car M3-N SoC DT bindings Simon Horman
@ 2018-02-19 2:52 ` Rob Herring
2018-02-19 9:19 ` Simon Horman
0 siblings, 1 reply; 47+ messages in thread
From: Rob Herring @ 2018-02-19 2:52 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Feb 14, 2018 at 11:01:53AM +0100, Simon Horman wrote:
> On Tue, Feb 13, 2018 at 10:45:48AM +0100, Jacopo Mondi wrote:
> > Add device tree bindings documentation for Renesas R-Car M3-N (r8a77965)
> > SoC.
> >
> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
>
> Thanks, this looks fine to me but I think the subject should be updated to
>
> dt-bindings: arm: document R8A77965 SoC bindings
>
> I'll let this sit for a few days to see if any other review is forthcoming.
>
> > ---
> > Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++
> > 1 file changed, 2 insertions(+)
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 02/15] clk: renesas: cpg-msr: Add support for R-Car M3-N
2018-02-13 9:45 ` [PATCH 02/15] clk: renesas: cpg-msr: Add support for R-Car M3-N Jacopo Mondi
` (2 preceding siblings ...)
2018-02-15 15:31 ` Simon Horman
@ 2018-02-19 2:53 ` Rob Herring
3 siblings, 0 replies; 47+ messages in thread
From: Rob Herring @ 2018-02-19 2:53 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Feb 13, 2018 at 10:45:49AM +0100, Jacopo Mondi wrote:
> Initial support for R-Car M3-N (r8a77965), including core and module
> clocks.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> ---
> .../devicetree/bindings/clock/renesas,cpg-mssr.txt | 1 +
> drivers/clk/renesas/Kconfig | 5 +
> drivers/clk/renesas/Makefile | 1 +
> drivers/clk/renesas/r8a77965-cpg-mssr.c | 333 +++++++++++++++++++++
> drivers/clk/renesas/renesas-cpg-mssr.c | 6 +
> drivers/clk/renesas/renesas-cpg-mssr.h | 1 +
> include/dt-bindings/clock/r8a77965-cpg-mssr.h | 62 ++++
> 7 files changed, 409 insertions(+)
> create mode 100644 drivers/clk/renesas/r8a77965-cpg-mssr.c
> create mode 100644 include/dt-bindings/clock/r8a77965-cpg-mssr.h
For the DT bits:
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 04/15] pinctrl: sh-pfc: Initial R-Car M3-N support
[not found] ` <1518515162-23663-5-git-send-email-jacopo+renesas@jmondi.org>
2018-02-14 13:37 ` [PATCH 04/15] pinctrl: sh-pfc: Initial " Geert Uytterhoeven
@ 2018-02-19 2:57 ` Rob Herring
1 sibling, 0 replies; 47+ messages in thread
From: Rob Herring @ 2018-02-19 2:57 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Feb 13, 2018 at 10:45:51AM +0100, Jacopo Mondi wrote:
> Add initial PFC support for R-Car M3-N (r8a77965) SoC.
> No groups or functions defined, just pin and registers enumeration.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> ---
> .../bindings/pinctrl/renesas,pfc-pinctrl.txt | 1 +
Reviewed-by: Rob Herring <robh@kernel.org>
> drivers/pinctrl/sh-pfc/Kconfig | 5 +
> drivers/pinctrl/sh-pfc/Makefile | 1 +
> drivers/pinctrl/sh-pfc/core.c | 6 +
> drivers/pinctrl/sh-pfc/pfc-r8a77965.c | 2728 ++++++++++++++++++++
> drivers/pinctrl/sh-pfc/sh_pfc.h | 1 +
> 6 files changed, 2742 insertions(+)
> create mode 100644 drivers/pinctrl/sh-pfc/pfc-r8a77965.c
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 06/15] Documentation: devicetree: dma: Add r8a77965 dmac
2018-02-15 15:56 ` Simon Horman
2018-02-16 9:01 ` Geert Uytterhoeven
@ 2018-02-19 2:58 ` Rob Herring
1 sibling, 0 replies; 47+ messages in thread
From: Rob Herring @ 2018-02-19 2:58 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Feb 15, 2018 at 04:56:39PM +0100, Simon Horman wrote:
> On Thu, Feb 15, 2018 at 04:39:49PM +0100, Simon Horman wrote:
> > On Tue, Feb 13, 2018 at 10:45:53AM +0100, Jacopo Mondi wrote:
> > > Add documentation for r8a77965 compatible string to rcar-dmac device
> > > tree bindings documentation.
> > >
> > > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> >
> > Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
>
> Sorry for not noticing this the first time around.
>
> I think a better subject would be:
>
> dt-bindings: dmaengine: rcar-dmac: document R8A77964 support
With that,
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 08/15] Documentation: devicetree: renesas,sci: Add r8a77965
2018-02-15 15:47 ` [PATCH 08/15] Documentation: devicetree: renesas,sci: " Simon Horman
@ 2018-02-19 2:59 ` Rob Herring
0 siblings, 0 replies; 47+ messages in thread
From: Rob Herring @ 2018-02-19 2:59 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Feb 15, 2018 at 04:47:52PM +0100, Simon Horman wrote:
> On Tue, Feb 13, 2018 at 10:45:55AM +0100, Jacopo Mondi wrote:
> > Add documentation for r8a77965 compatible string to reneass sci-serial
> > device tree bindings documentation.
>
> I think a better subject would be:
>
> dt-bindings: serial: sh-sci: Add support for r8a77965 (H)SCIF
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 13/15] Documentation: devicetree: ravb: Add r8a77965
2018-02-15 15:45 ` Simon Horman
@ 2018-02-19 3:01 ` Rob Herring
0 siblings, 0 replies; 47+ messages in thread
From: Rob Herring @ 2018-02-19 3:01 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Feb 15, 2018 at 04:45:34PM +0100, Simon Horman wrote:
> On Tue, Feb 13, 2018 at 10:46:00AM +0100, Jacopo Mondi wrote:
> > Add documentation for r8a77965 compatible string to renesas ravb device
> > tree bindings documentation.
> >
> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
>
> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
>
> This needs to be CCed to Sergei and netdev to proceed into mainline.
>
> There are lot of examples and little consistency, but I believe a good
> prefix and subject for the patch would be:
>
> dt-bindings: net: ravb: Add support for r8a77965 SoC
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 01/15] Documentation: devicetree: R-Car M3-N SoC DT bindings
2018-02-19 2:52 ` Rob Herring
@ 2018-02-19 9:19 ` Simon Horman
0 siblings, 0 replies; 47+ messages in thread
From: Simon Horman @ 2018-02-19 9:19 UTC (permalink / raw)
To: linux-arm-kernel
On Sun, Feb 18, 2018 at 08:52:13PM -0600, Rob Herring wrote:
> On Wed, Feb 14, 2018 at 11:01:53AM +0100, Simon Horman wrote:
> > On Tue, Feb 13, 2018 at 10:45:48AM +0100, Jacopo Mondi wrote:
> > > Add device tree bindings documentation for Renesas R-Car M3-N (r8a77965)
> > > SoC.
> > >
> > > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> >
> > Thanks, this looks fine to me but I think the subject should be updated to
> >
> > dt-bindings: arm: document R8A77965 SoC bindings
> >
> > I'll let this sit for a few days to see if any other review is forthcoming.
> >
> > > ---
> > > Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++
> > > 1 file changed, 2 insertions(+)
>
> Reviewed-by: Rob Herring <robh@kernel.org>
Thanks, applied as
dt-bindings: arm: Document R-Car M3-N SoC DT bindings
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 03/15] soc: renesas: Add R-Car M3-N support
2018-02-14 12:48 ` [PATCH 03/15] soc: renesas: Add R-Car M3-N support Geert Uytterhoeven
2018-02-15 15:34 ` Simon Horman
@ 2018-02-20 10:10 ` jacopo mondi
1 sibling, 0 replies; 47+ messages in thread
From: jacopo mondi @ 2018-02-20 10:10 UTC (permalink / raw)
To: linux-arm-kernel
Hi Geert,
On Wed, Feb 14, 2018 at 01:48:27PM +0100, Geert Uytterhoeven wrote:
> Hi Jacopo,
>
> Thanks for your patch!
>
> On Tue, Feb 13, 2018 at 10:45 AM, Jacopo Mondi
> <jacopo+renesas@jmondi.org> wrote:
> > Add support for R-Car M3-N (r8a77965) power areas and reset.
> > M3-N power areas are identical to M3-W ones, so just copy and rename
> > them.
>
> They are not identical:
> - M3-N does not have the CA53-related areas,
> - M3-W does not have A3VP,
> - M3-N does not have A2VC0 (M3-W also doesn't, according to latest
> datasheet?).
>
> The datasheet also mentions A3SH, without further info about the register
> block. I think we need to bring this up with Renesas.
>
> > .../bindings/power/renesas,rcar-sysc.txt | 1 +
> > .../devicetree/bindings/reset/renesas,rst.txt | 1 +
> > drivers/soc/renesas/Kconfig | 9 ++++--
> > drivers/soc/renesas/Makefile | 1 +
> > drivers/soc/renesas/r8a77965-sysc.c | 37 ++++++++++++++++++++++
> > drivers/soc/renesas/rcar-rst.c | 1 +
> > drivers/soc/renesas/rcar-sysc.c | 3 ++
> > drivers/soc/renesas/rcar-sysc.h | 1 +
> > drivers/soc/renesas/renesas-soc.c | 8 +++++
> > include/dt-bindings/power/r8a77965-sysc.h | 31 ++++++++++++++++++
> > 10 files changed, 91 insertions(+), 2 deletions(-)
> > create mode 100644 drivers/soc/renesas/r8a77965-sysc.c
> > create mode 100644 include/dt-bindings/power/r8a77965-sysc.h
>
> The maintainer may ask you to split this patch by functionality...
>
> > --- /dev/null
> > +++ b/drivers/soc/renesas/r8a77965-sysc.c
> > @@ -0,0 +1,37 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Renesas R-Car M3-N System Controller
> > + * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
> > + *
> > + * Based on Renesas R-Car M3-W System Controller
> > + * Copyright (C) 2016 Glider bvba
> > + */
> > +
> > +#include <linux/bug.h>
> > +#include <linux/kernel.h>
> > +
> > +#include <dt-bindings/power/r8a77965-sysc.h>
> > +
> > +#include "rcar-sysc.h"
> > +
> > +static const struct rcar_sysc_area r8a77965_areas[] __initconst = {
> > + { "always-on", 0, 0, R8A77965_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
> > + { "ca57-scu", 0x1c0, 0, R8A77965_PD_CA57_SCU, R8A77965_PD_ALWAYS_ON,
> > + PD_SCU },
> > + { "ca57-cpu0", 0x80, 0, R8A77965_PD_CA57_CPU0, R8A77965_PD_CA57_SCU,
> > + PD_CPU_NOCR },
> > + { "ca57-cpu1", 0x80, 1, R8A77965_PD_CA57_CPU1, R8A77965_PD_CA57_SCU,
> > + PD_CPU_NOCR },
> > + { "cr7", 0x240, 0, R8A77965_PD_CR7, R8A77965_PD_ALWAYS_ON },
> > + { "a3vc", 0x380, 0, R8A77965_PD_A3VC, R8A77965_PD_ALWAYS_ON },
> > + { "a2vc0", 0x3c0, 0, R8A77965_PD_A2VC0, R8A77965_PD_A3VC },
>
> M3-N (and M3-W) does not have A2VC0?
Why do I still see that power area listed in latest renesas-drivers for
M3-W? Are there patch pendings for that?
I'll remove it anyway for M3-N.
Thanks
j
>
> > + { "a2vc1", 0x3c0, 1, R8A77965_PD_A2VC1, R8A77965_PD_A3VC },
> > + { "3dg-a", 0x100, 0, R8A77965_PD_3DG_A, R8A77965_PD_ALWAYS_ON },
> > + { "3dg-b", 0x100, 1, R8A77965_PD_3DG_B, R8A77965_PD_3DG_A },
> > + { "a3ir", 0x180, 0, R8A77965_PD_A3IR, R8A77965_PD_ALWAYS_ON },
>
> A3VP is missing?
>
> > +};
> > +
> > +const struct rcar_sysc_info r8a77965_sysc_info __initconst = {
> > + .areas = r8a77965_areas,
> > + .num_areas = ARRAY_SIZE(r8a77965_areas),
> > +};
>
> > --- /dev/null
> > +++ b/include/dt-bindings/power/r8a77965-sysc.h
> > @@ -0,0 +1,31 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +/*
> > + * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
> > + * Copyright (C) 2016 Glider bvba
> > + */
> > +
> > +#ifndef __DT_BINDINGS_POWER_R8A77965_SYSC_H__
> > +#define __DT_BINDINGS_POWER_R8A77965_SYSC_H__
> > +
> > +/*
> > + * These power domain indices match the numbers of the interrupt bits
> > + * representing the power areas in the various Interrupt Registers
> > + * (e.g. SYSCISR, Interrupt Status Register)
> > + */
> > +
> > +#define R8A77965_PD_CA57_CPU0 0
> > +#define R8A77965_PD_CA57_CPU1 1
> > +#define R8A77965_PD_A3VP 9
> > +#define R8A77965_PD_CA57_SCU 12
> > +#define R8A77965_PD_CR7 13
> > +#define R8A77965_PD_A3VC 14
> > +#define R8A77965_PD_3DG_A 17
> > +#define R8A77965_PD_3DG_B 18
> > +#define R8A77965_PD_A3IR 24
> > +#define R8A77965_PD_A2VC0 25
>
> M3-N (and M3-W) does not have A2VC0?
>
> > +#define R8A77965_PD_A2VC1 26
> > +
> > +/* Always-on power area */
> > +#define R8A77965_PD_ALWAYS_ON 32
> > +
> > +#endif /* __DT_BINDINGS_POWER_R8A77965_SYSC_H__ */
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 11/15] gpio: rcar: Add R-Car M3-N compatible string
2018-02-14 14:05 ` [PATCH 11/15] gpio: rcar: Add R-Car M3-N compatible string Geert Uytterhoeven
@ 2018-02-20 13:35 ` jacopo mondi
2018-02-20 13:40 ` Geert Uytterhoeven
0 siblings, 1 reply; 47+ messages in thread
From: jacopo mondi @ 2018-02-20 13:35 UTC (permalink / raw)
To: linux-arm-kernel
Hi Geert,
On Wed, Feb 14, 2018 at 03:05:05PM +0100, Geert Uytterhoeven wrote:
> On Tue, Feb 13, 2018 at 10:45 AM, Jacopo Mondi
> <jacopo+renesas@jmondi.org> wrote:
> > Add compatible string for R-Car M3-N (r8a77965) in gpio-rcar.
> >
> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
>
> > --- a/drivers/gpio/gpio-rcar.c
> > +++ b/drivers/gpio/gpio-rcar.c
> > @@ -360,6 +360,10 @@ static const struct of_device_id gpio_rcar_of_table[] = {
> > /* Gen3 GPIO is identical to Gen2. */
> > .data = &gpio_rcar_info_gen2,
> > }, {
> > + .compatible = "renesas,gpio-r8a77965",
> > + /* Gen3 GPIO is identical to Gen2. */
> > + .data = &gpio_rcar_info_gen2,
> > + }, {
>
> This part is not needed, as the driver already matches agains the generic
> "renesas,rcar-gen3-gpio".
Just to point out that the compatible string is there for M3-W and H3.
Anyway, if that's not good practice to add per-SoC strings here, I'll
drop this bit.
Thanks
j
>
> > .compatible = "renesas,rcar-gen1-gpio",
> > .data = &gpio_rcar_info_gen1,
> > }, {
>
> With the above fixed:
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
^ permalink raw reply [flat|nested] 47+ messages in thread
* [PATCH 11/15] gpio: rcar: Add R-Car M3-N compatible string
2018-02-20 13:35 ` jacopo mondi
@ 2018-02-20 13:40 ` Geert Uytterhoeven
0 siblings, 0 replies; 47+ messages in thread
From: Geert Uytterhoeven @ 2018-02-20 13:40 UTC (permalink / raw)
To: linux-arm-kernel
Hi Jacopo,
On Tue, Feb 20, 2018 at 2:35 PM, jacopo mondi <jacopo@jmondi.org> wrote:
> On Wed, Feb 14, 2018 at 03:05:05PM +0100, Geert Uytterhoeven wrote:
>> On Tue, Feb 13, 2018 at 10:45 AM, Jacopo Mondi
>> <jacopo+renesas@jmondi.org> wrote:
>> > Add compatible string for R-Car M3-N (r8a77965) in gpio-rcar.
>> >
>> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
>>
>> > --- a/drivers/gpio/gpio-rcar.c
>> > +++ b/drivers/gpio/gpio-rcar.c
>> > @@ -360,6 +360,10 @@ static const struct of_device_id gpio_rcar_of_table[] = {
>> > /* Gen3 GPIO is identical to Gen2. */
>> > .data = &gpio_rcar_info_gen2,
>> > }, {
>> > + .compatible = "renesas,gpio-r8a77965",
>> > + /* Gen3 GPIO is identical to Gen2. */
>> > + .data = &gpio_rcar_info_gen2,
>> > + }, {
>>
>> This part is not needed, as the driver already matches agains the generic
>> "renesas,rcar-gen3-gpio".
>
> Just to point out that the compatible string is there for M3-W and H3.
> Anyway, if that's not good practice to add per-SoC strings here, I'll
> drop this bit.
That's correct. Initially, we added the H3 string first, and the M3-W later.
After that we learned about new future Gen3 members, and we started using
the family-specific one.
Note that we cannot drop the strings for H3 and M3-W from the driver, as
old DTBs do not have the family-specific strings.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 47+ messages in thread
end of thread, other threads:[~2018-02-20 13:40 UTC | newest]
Thread overview: 47+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-02-13 9:45 [PATCH 00/15] R-Car M3-N initial support Jacopo Mondi
2018-02-13 9:45 ` [PATCH 02/15] clk: renesas: cpg-msr: Add support for R-Car M3-N Jacopo Mondi
2018-02-13 11:48 ` Kieran Bingham
2018-02-14 11:03 ` Geert Uytterhoeven
2018-02-15 15:31 ` Simon Horman
2018-02-16 9:03 ` Geert Uytterhoeven
2018-02-19 2:53 ` Rob Herring
2018-02-13 9:46 ` [PATCH 14/15] pinctrl: sh-pfc: r8a77965: Add EtherAVB groups/functions Jacopo Mondi
2018-02-14 14:47 ` Geert Uytterhoeven
2018-02-13 9:46 ` [PATCH 15/15] ARM64: dts: r8a77965: Add EtherAVB device node Jacopo Mondi
2018-02-14 14:48 ` Geert Uytterhoeven
[not found] ` <1518515162-23663-2-git-send-email-jacopo+renesas@jmondi.org>
2018-02-14 10:01 ` [PATCH 01/15] Documentation: devicetree: R-Car M3-N SoC DT bindings Simon Horman
2018-02-19 2:52 ` Rob Herring
2018-02-19 9:19 ` Simon Horman
2018-02-14 10:36 ` Geert Uytterhoeven
[not found] ` <1518515162-23663-4-git-send-email-jacopo+renesas@jmondi.org>
2018-02-14 12:48 ` [PATCH 03/15] soc: renesas: Add R-Car M3-N support Geert Uytterhoeven
2018-02-15 15:34 ` Simon Horman
2018-02-20 10:10 ` jacopo mondi
[not found] ` <1518515162-23663-5-git-send-email-jacopo+renesas@jmondi.org>
2018-02-14 13:37 ` [PATCH 04/15] pinctrl: sh-pfc: Initial " Geert Uytterhoeven
2018-02-14 13:53 ` jacopo mondi
2018-02-14 14:25 ` Geert Uytterhoeven
2018-02-19 2:57 ` Rob Herring
[not found] ` <1518515162-23663-6-git-send-email-jacopo+renesas@jmondi.org>
2018-02-14 13:58 ` [PATCH 05/15] ARM64: dts: Add R-Car Salvator-x " Geert Uytterhoeven
2018-02-14 21:22 ` Philippe Ombredanne
2018-02-15 15:38 ` Simon Horman
2018-02-16 9:20 ` Geert Uytterhoeven
2018-02-16 9:36 ` Geert Uytterhoeven
[not found] ` <1518515162-23663-12-git-send-email-jacopo+renesas@jmondi.org>
2018-02-14 14:05 ` [PATCH 11/15] gpio: rcar: Add R-Car M3-N compatible string Geert Uytterhoeven
2018-02-20 13:35 ` jacopo mondi
2018-02-20 13:40 ` Geert Uytterhoeven
[not found] ` <1518515162-23663-8-git-send-email-jacopo+renesas@jmondi.org>
2018-02-14 14:08 ` [PATCH 07/15] ARM64: dts: r8a77965: Add dmac device nods Geert Uytterhoeven
[not found] ` <1518515162-23663-13-git-send-email-jacopo+renesas@jmondi.org>
2018-02-14 14:10 ` [PATCH 12/15] ARM64: dts: r8a77965: Add GPIO nodes Geert Uytterhoeven
[not found] ` <1518515162-23663-11-git-send-email-jacopo+renesas@jmondi.org>
2018-02-14 14:13 ` [PATCH 10/15] ARM64: dts: r8a77965: Add SCIF device nodes Geert Uytterhoeven
[not found] ` <1518515162-23663-10-git-send-email-jacopo+renesas@jmondi.org>
2018-02-14 14:42 ` [PATCH 09/15] pinctrl: sh-pfc: r8a77965: Add SCIFs groups/functions Geert Uytterhoeven
[not found] ` <1518515162-23663-7-git-send-email-jacopo+renesas@jmondi.org>
2018-02-14 13:59 ` [PATCH 06/15] Documentation: devicetree: dma: Add r8a77965 dmac Geert Uytterhoeven
2018-02-15 15:39 ` Simon Horman
2018-02-15 15:56 ` Simon Horman
2018-02-16 9:01 ` Geert Uytterhoeven
2018-02-16 13:40 ` Simon Horman
2018-02-19 2:58 ` Rob Herring
[not found] ` <1518515162-23663-14-git-send-email-jacopo+renesas@jmondi.org>
2018-02-14 14:06 ` [PATCH 13/15] Documentation: devicetree: ravb: Add r8a77965 Geert Uytterhoeven
2018-02-14 15:02 ` Sergei Shtylyov
2018-02-15 15:45 ` Simon Horman
2018-02-19 3:01 ` Rob Herring
[not found] ` <1518515162-23663-9-git-send-email-jacopo+renesas@jmondi.org>
2018-02-14 14:03 ` [PATCH 08/15] Documentation: devicetree: renesas, sci: " Geert Uytterhoeven
2018-02-15 15:47 ` [PATCH 08/15] Documentation: devicetree: renesas,sci: " Simon Horman
2018-02-19 2:59 ` Rob Herring
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