[PATCH v2 00/19] R-Car M3-N initial support

[PATCH v2 00/19] R-Car M3-N initial support

[Jacopo Mondi]

Hello, second round for R-Car M3-N SoC and M3-N based Salvator-X board.

I have fixed all comments I have received and re-based on latest Geert's
renesas-drivers-2018-02-13-v4.16-rc1

I have applied requested changes, and updated PFC tables to comply with
last patches applied to r8a7796 that were not part of v4.15 which v1 was
based on.

I have added a per-patch change log as summarizing all little changes here
had not real benefit imho, being them mostly tiny changes specific to each
patch.

As a general note, I have split patches and bindings where requested and split
single patches in multiple ones where opportune (mostly when adding components
to drivers/soc/ and when introducing board and SoC DT files).

Tested serial console output and Ethernet interface.

Thanks
   j

v1 -> v2:
- Rebased on renesas-drivers-2018-02-13-v4.16-rc1
- Split patches when introducing rst, sysc in drivers/soc/
- Split patches when adding device tree file for Salvator-X board and
  r8a77965 SoC.
- Single change logs are reported per-patch

Jacopo Mondi (19):
  clk: renesas: cpg-mssr: Add support for R-Car M3-N
  soc: renesas: rcar-rst: Add support for R-Car M3-N
  soc: renesas: Identify R-Car M3-N
  soc: renesas: rcar-sysc: Add R-Car M3-N support
  pinctrl: sh-pfc: Initial R-Car M3-N support
  dt-bindings: arm: Document R-Car M3-N SoC DT bindings
  ARM64: Add Renesas R-Car M3-N config symbol
  ARM64: dts: Add Renesas R8A77965 SoC support
  ARM64: dts: Add R-Car Salvator-x M3-N support
  dt-bindings: dmaengine: rcar-dmac: document R8A77965 support
  ARM64: dts: r8a77965: Add dmac device nods
  dt-bindings: serial: sh-sci: Add support for r8a77965 (H)SCIF
  pinctrl: sh-pfc: r8a77965: Add SCIFs groups/functions
  ARM64: dts: r8a77965: Add SCIF device nodes
  dt-bindings: gpio: Add support for r8a77965
  ARM64: dts: r8a77965: Add GPIO nodes
  dt-bindings: net: ravb: Add support for r8a77965 SoC
  pinctrl: sh-pfc: r8a77965: Add EtherAVB groups/functions
  ARM64: dts: r8a77965: Add EtherAVB device node

 Documentation/devicetree/bindings/arm/shmobile.txt |    2 +
 .../devicetree/bindings/clock/renesas,cpg-mssr.txt |    1 +
 .../devicetree/bindings/dma/renesas,rcar-dmac.txt  |    1 +
 .../devicetree/bindings/gpio/renesas,gpio-rcar.txt |    1 +
 .../devicetree/bindings/net/renesas,ravb.txt       |    1 +
 .../bindings/pinctrl/renesas,pfc-pinctrl.txt       |    1 +
 .../bindings/power/renesas,rcar-sysc.txt           |    1 +
 .../devicetree/bindings/reset/renesas,rst.txt      |    1 +
 .../bindings/serial/renesas,sci-serial.txt         |    2 +
 arch/arm64/Kconfig.platforms                       |    6 +
 arch/arm64/boot/dts/renesas/Makefile               |    1 +
 .../arm64/boot/dts/renesas/r8a77965-salvator-x.dts |   21 +
 arch/arm64/boot/dts/renesas/r8a77965.dtsi          |  782 +++++
 drivers/clk/renesas/Kconfig                        |    5 +
 drivers/clk/renesas/Makefile                       |    1 +
 drivers/clk/renesas/r8a77965-cpg-mssr.c            |  334 +++
 drivers/clk/renesas/renesas-cpg-mssr.c             |    6 +
 drivers/clk/renesas/renesas-cpg-mssr.h             |    1 +
 drivers/pinctrl/sh-pfc/Kconfig                     |    5 +
 drivers/pinctrl/sh-pfc/Makefile                    |    1 +
 drivers/pinctrl/sh-pfc/core.c                      |    6 +
 drivers/pinctrl/sh-pfc/pfc-r8a77965.c              | 3128 ++++++++++++++++++++
 drivers/pinctrl/sh-pfc/sh_pfc.h                    |    1 +
 drivers/soc/renesas/Kconfig                        |    9 +-
 drivers/soc/renesas/Makefile                       |    1 +
 drivers/soc/renesas/r8a77965-sysc.c                |   37 +
 drivers/soc/renesas/rcar-rst.c                     |    1 +
 drivers/soc/renesas/rcar-sysc.c                    |    3 +
 drivers/soc/renesas/rcar-sysc.h                    |    1 +
 drivers/soc/renesas/renesas-soc.c                  |    8 +
 include/dt-bindings/clock/r8a77965-cpg-mssr.h      |   62 +
 include/dt-bindings/power/r8a77965-sysc.h          |   30 +
 32 files changed, 4459 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dts
 create mode 100644 arch/arm64/boot/dts/renesas/r8a77965.dtsi
 create mode 100644 drivers/clk/renesas/r8a77965-cpg-mssr.c
 create mode 100644 drivers/pinctrl/sh-pfc/pfc-r8a77965.c
 create mode 100644 drivers/soc/renesas/r8a77965-sysc.c
 create mode 100644 include/dt-bindings/clock/r8a77965-cpg-mssr.h
 create mode 100644 include/dt-bindings/power/r8a77965-sysc.h

--
2.7.4

[PATCH v2 01/19] clk: renesas: cpg-mssr: Add support for R-Car M3-N

[Jacopo Mondi]

Initial support for R-Car M3-N (r8a77965), including core and module
clocks.

Based on Table 8.2d of "R-Car Series, 3rd Generation User's Manual:
Hardware (Rev. 0.80, Oct 31, 2017)".

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

---
v1->v2:
- Add 'z' clock
- Change "intc-ap" parent clock to S0D3
---
 .../devicetree/bindings/clock/renesas,cpg-mssr.txt |   1 +
 drivers/clk/renesas/Kconfig                        |   5 +
 drivers/clk/renesas/Makefile                       |   1 +
 drivers/clk/renesas/r8a77965-cpg-mssr.c            | 334 +++++++++++++++++++++
 drivers/clk/renesas/renesas-cpg-mssr.c             |   6 +
 drivers/clk/renesas/renesas-cpg-mssr.h             |   1 +
 include/dt-bindings/clock/r8a77965-cpg-mssr.h      |  62 ++++
 7 files changed, 410 insertions(+)
 create mode 100644 drivers/clk/renesas/r8a77965-cpg-mssr.c
 create mode 100644 include/dt-bindings/clock/r8a77965-cpg-mssr.h

diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
index f1890d0..246ab63 100644
--- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
+++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
@@ -22,6 +22,7 @@ Required Properties:
       - "renesas,r8a7794-cpg-mssr" for the r8a7794 SoC (R-Car E2)
       - "renesas,r8a7795-cpg-mssr" for the r8a7795 SoC (R-Car H3)
       - "renesas,r8a7796-cpg-mssr" for the r8a7796 SoC (R-Car M3-W)
+      - "renesas,r8a77965-cpg-mssr" for the r8a77965 SoC (R-Car M3-N)
       - "renesas,r8a77970-cpg-mssr" for the r8a77970 SoC (R-Car V3M)
       - "renesas,r8a77995-cpg-mssr" for the r8a77995 SoC (R-Car D3)
 
diff --git a/drivers/clk/renesas/Kconfig b/drivers/clk/renesas/Kconfig
index 84b40b9..047d6b5 100644
--- a/drivers/clk/renesas/Kconfig
+++ b/drivers/clk/renesas/Kconfig
@@ -15,6 +15,7 @@ config CLK_RENESAS
 	select CLK_R8A7794 if ARCH_R8A7794
 	select CLK_R8A7795 if ARCH_R8A7795
 	select CLK_R8A7796 if ARCH_R8A7796
+	select CLK_R8A77965 if ARCH_R8A77965
 	select CLK_R8A77970 if ARCH_R8A77970
 	select CLK_R8A77995 if ARCH_R8A77995
 	select CLK_SH73A0 if ARCH_SH73A0
@@ -97,6 +98,10 @@ config CLK_R8A7796
 	bool "R-Car M3-W clock support" if COMPILE_TEST
 	select CLK_RCAR_GEN3_CPG
 
+config CLK_R8A77965
+	bool "R-Car M3-N clock support" if COMPILE_TEST
+	select CLK_RCAR_GEN3_CPG
+
 config CLK_R8A77970
 	bool "R-Car V3M clock support" if COMPILE_TEST
 	select CLK_RCAR_GEN3_CPG
diff --git a/drivers/clk/renesas/Makefile b/drivers/clk/renesas/Makefile
index 34c4e0b..2e0982f 100644
--- a/drivers/clk/renesas/Makefile
+++ b/drivers/clk/renesas/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_CLK_R8A7792)		+= r8a7792-cpg-mssr.o
 obj-$(CONFIG_CLK_R8A7794)		+= r8a7794-cpg-mssr.o
 obj-$(CONFIG_CLK_R8A7795)		+= r8a7795-cpg-mssr.o
 obj-$(CONFIG_CLK_R8A7796)		+= r8a7796-cpg-mssr.o
+obj-$(CONFIG_CLK_R8A77965)		+= r8a77965-cpg-mssr.o
 obj-$(CONFIG_CLK_R8A77970)		+= r8a77970-cpg-mssr.o
 obj-$(CONFIG_CLK_R8A77995)		+= r8a77995-cpg-mssr.o
 obj-$(CONFIG_CLK_SH73A0)		+= clk-sh73a0.o
diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c
new file mode 100644
index 0000000..41e506a
--- /dev/null
+++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c
@@ -0,0 +1,334 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * r8a77965 Clock Pulse Generator / Module Standby and Software Reset
+ *
+ * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
+ *
+ * Based on r8a7795-cpg-mssr.c
+ *
+ * Copyright (C) 2015 Glider bvba
+ * Copyright (C) 2015 Renesas Electronics Corp.
+ */
+
+#include <linux/device.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/soc/renesas/rcar-rst.h>
+
+#include <dt-bindings/clock/r8a77965-cpg-mssr.h>
+
+#include "renesas-cpg-mssr.h"
+#include "rcar-gen3-cpg.h"
+
+enum clk_ids {
+	/* Core Clock Outputs exported to DT */
+	LAST_DT_CORE_CLK = R8A77965_CLK_OSC,
+
+	/* External Input Clocks */
+	CLK_EXTAL,
+	CLK_EXTALR,
+
+	/* Internal Core Clocks */
+	CLK_MAIN,
+	CLK_PLL0,
+	CLK_PLL1,
+	CLK_PLL3,
+	CLK_PLL4,
+	CLK_PLL1_DIV2,
+	CLK_PLL1_DIV4,
+	CLK_S0,
+	CLK_S1,
+	CLK_S2,
+	CLK_S3,
+	CLK_SDSRC,
+	CLK_SSPSRC,
+	CLK_RINT,
+
+	/* Module Clocks */
+	MOD_CLK_BASE
+};
+
+static const struct cpg_core_clk r8a77965_core_clks[] __initconst = {
+	/* External Clock Inputs */
+	DEF_INPUT("extal",      CLK_EXTAL),
+	DEF_INPUT("extalr",     CLK_EXTALR),
+
+	/* Internal Core Clocks */
+	DEF_BASE(".main",	CLK_MAIN, CLK_TYPE_GEN3_MAIN, CLK_EXTAL),
+	DEF_BASE(".pll0",	CLK_PLL0, CLK_TYPE_GEN3_PLL0, CLK_MAIN),
+	DEF_BASE(".pll1",	CLK_PLL1, CLK_TYPE_GEN3_PLL1, CLK_MAIN),
+	DEF_BASE(".pll3",	CLK_PLL3, CLK_TYPE_GEN3_PLL3, CLK_MAIN),
+	DEF_BASE(".pll4",	CLK_PLL4, CLK_TYPE_GEN3_PLL4, CLK_MAIN),
+
+	DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2,		CLK_PLL1,	2, 1),
+	DEF_FIXED(".pll1_div4", CLK_PLL1_DIV4,		CLK_PLL1_DIV2,	2, 1),
+	DEF_FIXED(".s0",	CLK_S0,			CLK_PLL1_DIV2,	2, 1),
+	DEF_FIXED(".s1",	CLK_S1,			CLK_PLL1_DIV2,	3, 1),
+	DEF_FIXED(".s2",	CLK_S2,			CLK_PLL1_DIV2,	4, 1),
+	DEF_FIXED(".s3",	CLK_S3,			CLK_PLL1_DIV2,	6, 1),
+	DEF_FIXED(".sdsrc",	CLK_SDSRC,		CLK_PLL1_DIV2,	2, 1),
+
+	/* Core Clock Outputs */
+	DEF_BASE("z",		R8A77965_CLK_Z,		CLK_TYPE_GEN3_Z, CLK_PLL0),
+	DEF_FIXED("ztr",	R8A77965_CLK_ZTR,	CLK_PLL1_DIV2,	6, 1),
+	DEF_FIXED("ztrd2",	R8A77965_CLK_ZTRD2,	CLK_PLL1_DIV2,	12, 1),
+	DEF_FIXED("zt",		R8A77965_CLK_ZT,	CLK_PLL1_DIV2,	4, 1),
+	DEF_FIXED("zx",		R8A77965_CLK_ZX,	CLK_PLL1_DIV2,	2, 1),
+	DEF_FIXED("s0d1",	R8A77965_CLK_S0D1,	CLK_S0,		1, 1),
+	DEF_FIXED("s0d2",	R8A77965_CLK_S0D2,	CLK_S0,		2, 1),
+	DEF_FIXED("s0d3",	R8A77965_CLK_S0D3,	CLK_S0,		3, 1),
+	DEF_FIXED("s0d4",	R8A77965_CLK_S0D4,	CLK_S0,		4, 1),
+	DEF_FIXED("s0d6",	R8A77965_CLK_S0D6,	CLK_S0,		6, 1),
+	DEF_FIXED("s0d8",	R8A77965_CLK_S0D8,	CLK_S0,		8, 1),
+	DEF_FIXED("s0d12",	R8A77965_CLK_S0D12,	CLK_S0,		12, 1),
+	DEF_FIXED("s1d1",	R8A77965_CLK_S1D1,	CLK_S1,		1, 1),
+	DEF_FIXED("s1d2",	R8A77965_CLK_S1D2,	CLK_S1,		2, 1),
+	DEF_FIXED("s1d4",	R8A77965_CLK_S1D4,	CLK_S1,		4, 1),
+	DEF_FIXED("s2d1",	R8A77965_CLK_S2D1,	CLK_S2,		1, 1),
+	DEF_FIXED("s2d2",	R8A77965_CLK_S2D2,	CLK_S2,		2, 1),
+	DEF_FIXED("s2d4",	R8A77965_CLK_S2D4,	CLK_S2,		4, 1),
+	DEF_FIXED("s3d1",	R8A77965_CLK_S3D1,	CLK_S3,		1, 1),
+	DEF_FIXED("s3d2",	R8A77965_CLK_S3D2,	CLK_S3,		2, 1),
+	DEF_FIXED("s3d4",	R8A77965_CLK_S3D4,	CLK_S3,		4, 1),
+
+	DEF_GEN3_SD("sd0",	R8A77965_CLK_SD0,	CLK_SDSRC,	0x074),
+	DEF_GEN3_SD("sd1",	R8A77965_CLK_SD1,	CLK_SDSRC,	0x078),
+	DEF_GEN3_SD("sd2",	R8A77965_CLK_SD2,	CLK_SDSRC,	0x268),
+	DEF_GEN3_SD("sd3",	R8A77965_CLK_SD3,	CLK_SDSRC,	0x26c),
+
+	DEF_FIXED("cl",		R8A77965_CLK_CL,	CLK_PLL1_DIV2,	48, 1),
+	DEF_FIXED("cp",		R8A77965_CLK_CP,	CLK_EXTAL,	2, 1),
+
+	DEF_DIV6P1("canfd",	R8A77965_CLK_CANFD,	CLK_PLL1_DIV4,	0x244),
+	DEF_DIV6P1("csi0",	R8A77965_CLK_CSI0,	CLK_PLL1_DIV4,	0x00c),
+	DEF_DIV6P1("mso",	R8A77965_CLK_MSO,	CLK_PLL1_DIV4,	0x014),
+	DEF_DIV6P1("hdmi",	R8A77965_CLK_HDMI,	CLK_PLL1_DIV4,	0x250),
+
+	DEF_DIV6_RO("osc",	R8A77965_CLK_OSC, CLK_EXTAL, CPG_RCKCR, 8),
+	DEF_DIV6_RO("r_int",	CLK_RINT, CLK_EXTAL, CPG_RCKCR, 32),
+
+	DEF_BASE("r",		R8A77965_CLK_R,	CLK_TYPE_GEN3_R, CLK_RINT),
+};
+
+static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
+	DEF_MOD("scif5",		202,	R8A77965_CLK_S3D4),
+	DEF_MOD("scif4",		203,	R8A77965_CLK_S3D4),
+	DEF_MOD("scif3",		204,	R8A77965_CLK_S3D4),
+	DEF_MOD("scif1",		206,	R8A77965_CLK_S3D4),
+	DEF_MOD("scif0",		207,	R8A77965_CLK_S3D4),
+	DEF_MOD("sys-dmac2",		217,	R8A77965_CLK_S0D3),
+	DEF_MOD("sys-dmac1",		218,	R8A77965_CLK_S0D3),
+	DEF_MOD("sys-dmac0",		219,	R8A77965_CLK_S0D3),
+
+	DEF_MOD("cmt3",			300,	R8A77965_CLK_R),
+	DEF_MOD("cmt2",			301,	R8A77965_CLK_R),
+	DEF_MOD("cmt1",			302,	R8A77965_CLK_R),
+	DEF_MOD("cmt0",			303,	R8A77965_CLK_R),
+	DEF_MOD("scif2",		310,	R8A77965_CLK_S3D4),
+	DEF_MOD("sdif3",		311,	R8A77965_CLK_SD3),
+	DEF_MOD("sdif2",		312,	R8A77965_CLK_SD2),
+	DEF_MOD("sdif1",		313,	R8A77965_CLK_SD1),
+	DEF_MOD("sdif0",		314,	R8A77965_CLK_SD0),
+	DEF_MOD("pcie1",		318,	R8A77965_CLK_S3D1),
+	DEF_MOD("pcie0",		319,	R8A77965_CLK_S3D1),
+	DEF_MOD("usb3-if0",		328,	R8A77965_CLK_S3D1),
+	DEF_MOD("usb-dmac0",		330,	R8A77965_CLK_S3D1),
+	DEF_MOD("usb-dmac1",		331,	R8A77965_CLK_S3D1),
+
+	DEF_MOD("rwdt",			402,	R8A77965_CLK_R),
+	DEF_MOD("intc-ex",		407,	R8A77965_CLK_CP),
+	DEF_MOD("intc-ap",		408,	R8A77965_CLK_S0D3),
+
+	DEF_MOD("audmac1",		501,	R8A77965_CLK_S0D3),
+	DEF_MOD("audmac0",		502,	R8A77965_CLK_S0D3),
+	DEF_MOD("drif7",		508,	R8A77965_CLK_S3D2),
+	DEF_MOD("drif6",		509,	R8A77965_CLK_S3D2),
+	DEF_MOD("drif5",		510,	R8A77965_CLK_S3D2),
+	DEF_MOD("drif4",		511,	R8A77965_CLK_S3D2),
+	DEF_MOD("drif3",		512,	R8A77965_CLK_S3D2),
+	DEF_MOD("drif2",		513,	R8A77965_CLK_S3D2),
+	DEF_MOD("drif1",		514,	R8A77965_CLK_S3D2),
+	DEF_MOD("drif0",		515,	R8A77965_CLK_S3D2),
+	DEF_MOD("hscif4",		516,	R8A77965_CLK_S3D1),
+	DEF_MOD("hscif3",		517,	R8A77965_CLK_S3D1),
+	DEF_MOD("hscif2",		518,	R8A77965_CLK_S3D1),
+	DEF_MOD("hscif1",		519,	R8A77965_CLK_S3D1),
+	DEF_MOD("hscif0",		520,	R8A77965_CLK_S3D1),
+	DEF_MOD("thermal",		522,	R8A77965_CLK_CP),
+	DEF_MOD("pwm",			523,	R8A77965_CLK_S0D12),
+
+	DEF_MOD("fcpvd1",		602,	R8A77965_CLK_S0D2),
+	DEF_MOD("fcpvd0",		603,	R8A77965_CLK_S0D2),
+	DEF_MOD("fcpvb0",		607,	R8A77965_CLK_S0D1),
+	DEF_MOD("fcpvi0",		611,	R8A77965_CLK_S0D1),
+	DEF_MOD("fcpf0",		615,	R8A77965_CLK_S0D1),
+	DEF_MOD("fcpcs",		619,	R8A77965_CLK_S0D2),
+	DEF_MOD("vspd1",		622,	R8A77965_CLK_S0D2),
+	DEF_MOD("vspd0",		623,	R8A77965_CLK_S0D2),
+	DEF_MOD("vspb",			626,	R8A77965_CLK_S0D1),
+	DEF_MOD("vspi0",		631,	R8A77965_CLK_S0D1),
+
+	DEF_MOD("ehci1",		702,	R8A77965_CLK_S3D4),
+	DEF_MOD("ehci0",		703,	R8A77965_CLK_S3D4),
+	DEF_MOD("hsusb",		704,	R8A77965_CLK_S3D4),
+	DEF_MOD("csi20",		714,	R8A77965_CLK_CSI0),
+	DEF_MOD("csi40",		716,	R8A77965_CLK_CSI0),
+	DEF_MOD("du2",			722,	R8A77965_CLK_S2D1),
+	DEF_MOD("du1",			723,	R8A77965_CLK_S2D1),
+	DEF_MOD("du0",			724,	R8A77965_CLK_S2D1),
+	DEF_MOD("lvds",			727,	R8A77965_CLK_S2D1),
+	DEF_MOD("hdmi0",		729,	R8A77965_CLK_HDMI),
+
+	DEF_MOD("vin7",			804,	R8A77965_CLK_S0D2),
+	DEF_MOD("vin6",			805,	R8A77965_CLK_S0D2),
+	DEF_MOD("vin5",			806,	R8A77965_CLK_S0D2),
+	DEF_MOD("vin4",			807,	R8A77965_CLK_S0D2),
+	DEF_MOD("vin3",			808,	R8A77965_CLK_S0D2),
+	DEF_MOD("vin2",			809,	R8A77965_CLK_S0D2),
+	DEF_MOD("vin1",			810,	R8A77965_CLK_S0D2),
+	DEF_MOD("vin0",			811,	R8A77965_CLK_S0D2),
+	DEF_MOD("etheravb",		812,	R8A77965_CLK_S0D6),
+	DEF_MOD("imr1",			822,	R8A77965_CLK_S0D2),
+	DEF_MOD("imr0",			823,	R8A77965_CLK_S0D2),
+
+	DEF_MOD("gpio7",		905,	R8A77965_CLK_S3D4),
+	DEF_MOD("gpio6",		906,	R8A77965_CLK_S3D4),
+	DEF_MOD("gpio5",		907,	R8A77965_CLK_S3D4),
+	DEF_MOD("gpio4",		908,	R8A77965_CLK_S3D4),
+	DEF_MOD("gpio3",		909,	R8A77965_CLK_S3D4),
+	DEF_MOD("gpio2",		910,	R8A77965_CLK_S3D4),
+	DEF_MOD("gpio1",		911,	R8A77965_CLK_S3D4),
+	DEF_MOD("gpio0",		912,	R8A77965_CLK_S3D4),
+	DEF_MOD("can-fd",		914,	R8A77965_CLK_S3D2),
+	DEF_MOD("can-if1",		915,	R8A77965_CLK_S3D4),
+	DEF_MOD("can-if0",		916,	R8A77965_CLK_S3D4),
+	DEF_MOD("i2c6",			918,	R8A77965_CLK_S0D6),
+	DEF_MOD("i2c5",			919,	R8A77965_CLK_S0D6),
+	DEF_MOD("i2c-dvfs",		926,	R8A77965_CLK_CP),
+	DEF_MOD("i2c4",			927,	R8A77965_CLK_S0D6),
+	DEF_MOD("i2c3",			928,	R8A77965_CLK_S0D6),
+	DEF_MOD("i2c2",			929,	R8A77965_CLK_S3D2),
+	DEF_MOD("i2c1",			930,	R8A77965_CLK_S3D2),
+	DEF_MOD("i2c0",			931,	R8A77965_CLK_S3D2),
+
+	DEF_MOD("ssi-all",		1005,	R8A77965_CLK_S3D4),
+	DEF_MOD("ssi9",			1006,	MOD_CLK_ID(1005)),
+	DEF_MOD("ssi8",			1007,	MOD_CLK_ID(1005)),
+	DEF_MOD("ssi7",			1008,	MOD_CLK_ID(1005)),
+	DEF_MOD("ssi6",			1009,	MOD_CLK_ID(1005)),
+	DEF_MOD("ssi5",			1010,	MOD_CLK_ID(1005)),
+	DEF_MOD("ssi4",			1011,	MOD_CLK_ID(1005)),
+	DEF_MOD("ssi3",			1012,	MOD_CLK_ID(1005)),
+	DEF_MOD("ssi2",			1013,	MOD_CLK_ID(1005)),
+	DEF_MOD("ssi1",			1014,	MOD_CLK_ID(1005)),
+	DEF_MOD("ssi0",			1015,	MOD_CLK_ID(1005)),
+	DEF_MOD("scu-all",		1017,	R8A77965_CLK_S3D4),
+	DEF_MOD("scu-dvc1",		1018,	MOD_CLK_ID(1017)),
+	DEF_MOD("scu-dvc0",		1019,	MOD_CLK_ID(1017)),
+	DEF_MOD("scu-ctu1-mix1",	1020,	MOD_CLK_ID(1017)),
+	DEF_MOD("scu-ctu0-mix0",	1021,	MOD_CLK_ID(1017)),
+	DEF_MOD("scu-src9",		1022,	MOD_CLK_ID(1017)),
+	DEF_MOD("scu-src8",		1023,	MOD_CLK_ID(1017)),
+	DEF_MOD("scu-src7",		1024,	MOD_CLK_ID(1017)),
+	DEF_MOD("scu-src6",		1025,	MOD_CLK_ID(1017)),
+	DEF_MOD("scu-src5",		1026,	MOD_CLK_ID(1017)),
+	DEF_MOD("scu-src4",		1027,	MOD_CLK_ID(1017)),
+	DEF_MOD("scu-src3",		1028,	MOD_CLK_ID(1017)),
+	DEF_MOD("scu-src2",		1029,	MOD_CLK_ID(1017)),
+	DEF_MOD("scu-src1",		1030,	MOD_CLK_ID(1017)),
+	DEF_MOD("scu-src0",		1031,	MOD_CLK_ID(1017)),
+};
+
+static const unsigned int r8a77965_crit_mod_clks[] __initconst = {
+	MOD_CLK_ID(408),	/* INTC-AP (GIC) */
+};
+
+/*
+ * CPG Clock Data
+ */
+
+/*
+ *   MD		EXTAL		PLL0	PLL1	PLL3	PLL4
+ * 14 13 19 17	(MHz)
+ *-----------------------------------------------------------
+ * 0  0  0  0	16.66 x 1	x180	x192	x192	x144
+ * 0  0  0  1	16.66 x 1	x180	x192	x128	x144
+ * 0  0  1  0	Prohibited setting
+ * 0  0  1  1	16.66 x 1	x180	x192	x192	x144
+ * 0  1  0  0	20    x 1	x150	x160	x160	x120
+ * 0  1  0  1	20    x 1	x150	x160	x106	x120
+ * 0  1  1  0	Prohibited setting
+ * 0  1  1  1	20    x 1	x150	x160	x160	x120
+ * 1  0  0  0	25    x 1	x120	x128	x128	x96
+ * 1  0  0  1	25    x 1	x120	x128	x84	x96
+ * 1  0  1  0	Prohibited setting
+ * 1  0  1  1	25    x 1	x120	x128	x128	x96
+ * 1  1  0  0	33.33 / 2	x180	x192	x192	x144
+ * 1  1  0  1	33.33 / 2	x180	x192	x128	x144
+ * 1  1  1  0	Prohibited setting
+ * 1  1  1  1	33.33 / 2	x180	x192	x192	x144
+ */
+#define CPG_PLL_CONFIG_INDEX(md)	((((md) & BIT(14)) >> 11) | \
+					 (((md) & BIT(13)) >> 11) | \
+					 (((md) & BIT(19)) >> 18) | \
+					 (((md) & BIT(17)) >> 17))
+
+static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[16] __initconst = {
+	/* EXTAL div	PLL1 mult/div	PLL3 mult/div */
+	{ 1,		192,	1,	192,	1,	},
+	{ 1,		192,	1,	128,	1,	},
+	{ 0, /* Prohibited setting */			},
+	{ 1,		192,	1,	192,	1,	},
+	{ 1,		160,	1,	160,	1,	},
+	{ 1,		160,	1,	106,	1,	},
+	{ 0, /* Prohibited setting */			},
+	{ 1,		160,	1,	160,	1,	},
+	{ 1,		128,	1,	128,	1,	},
+	{ 1,		128,	1,	84,	1,	},
+	{ 0, /* Prohibited setting */			},
+	{ 1,		128,	1,	128,	1,	},
+	{ 2,		192,	1,	192,	1,	},
+	{ 2,		192,	1,	128,	1,	},
+	{ 0, /* Prohibited setting */			},
+	{ 2,		192,	1,	192,	1,	},
+};
+
+static int __init r8a77965_cpg_mssr_init(struct device *dev)
+{
+	const struct rcar_gen3_cpg_pll_config *cpg_pll_config;
+	u32 cpg_mode;
+	int error;
+
+	error = rcar_rst_read_mode_pins(&cpg_mode);
+	if (error)
+		return error;
+
+	cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)];
+	if (!cpg_pll_config->extal_div) {
+		dev_err(dev, "Prohibited setting (cpg_mode=0x%x)\n", cpg_mode);
+		return -EINVAL;
+	}
+
+	return rcar_gen3_cpg_init(cpg_pll_config, CLK_EXTALR, cpg_mode);
+};
+
+const struct cpg_mssr_info r8a77965_cpg_mssr_info __initconst = {
+	/* Core Clocks */
+	.core_clks		= r8a77965_core_clks,
+	.num_core_clks		= ARRAY_SIZE(r8a77965_core_clks),
+	.last_dt_core_clk	= LAST_DT_CORE_CLK,
+	.num_total_core_clks	= MOD_CLK_BASE,
+
+	/* Module Clocks */
+	.mod_clks		= r8a77965_mod_clks,
+	.num_mod_clks		= ARRAY_SIZE(r8a77965_mod_clks),
+	.num_hw_mod_clks	= 12 * 32,
+
+	/* Critical Module Clocks */
+	.crit_mod_clks		= r8a77965_crit_mod_clks,
+	.num_crit_mod_clks	= ARRAY_SIZE(r8a77965_crit_mod_clks),
+
+	/* Callbacks */
+	.init			= r8a77965_cpg_mssr_init,
+	.cpg_clk_register	= rcar_gen3_cpg_clk_register,
+};
diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c
index e3cc72c..b4b7d36 100644
--- a/drivers/clk/renesas/renesas-cpg-mssr.c
+++ b/drivers/clk/renesas/renesas-cpg-mssr.c
@@ -693,6 +693,12 @@ static const struct of_device_id cpg_mssr_match[] = {
 		.data = &r8a7796_cpg_mssr_info,
 	},
 #endif
+#ifdef CONFIG_CLK_R8A77965
+	{
+		.compatible = "renesas,r8a77965-cpg-mssr",
+		.data = &r8a77965_cpg_mssr_info,
+	},
+#endif
 #ifdef CONFIG_CLK_R8A77970
 	{
 		.compatible = "renesas,r8a77970-cpg-mssr",
diff --git a/drivers/clk/renesas/renesas-cpg-mssr.h b/drivers/clk/renesas/renesas-cpg-mssr.h
index 0745b09..44397d3 100644
--- a/drivers/clk/renesas/renesas-cpg-mssr.h
+++ b/drivers/clk/renesas/renesas-cpg-mssr.h
@@ -139,6 +139,7 @@ extern const struct cpg_mssr_info r8a7792_cpg_mssr_info;
 extern const struct cpg_mssr_info r8a7794_cpg_mssr_info;
 extern const struct cpg_mssr_info r8a7795_cpg_mssr_info;
 extern const struct cpg_mssr_info r8a7796_cpg_mssr_info;
+extern const struct cpg_mssr_info r8a77965_cpg_mssr_info;
 extern const struct cpg_mssr_info r8a77970_cpg_mssr_info;
 extern const struct cpg_mssr_info r8a77995_cpg_mssr_info;
 
diff --git a/include/dt-bindings/clock/r8a77965-cpg-mssr.h b/include/dt-bindings/clock/r8a77965-cpg-mssr.h
new file mode 100644
index 0000000..6d3b5a9
--- /dev/null
+++ b/include/dt-bindings/clock/r8a77965-cpg-mssr.h
@@ -0,0 +1,62 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
+ */
+#ifndef __DT_BINDINGS_CLOCK_R8A77965_CPG_MSSR_H__
+#define __DT_BINDINGS_CLOCK_R8A77965_CPG_MSSR_H__
+
+#include <dt-bindings/clock/renesas-cpg-mssr.h>
+
+/* r8a77965 CPG Core Clocks */
+#define R8A77965_CLK_Z			0
+#define R8A77965_CLK_ZR			1
+#define R8A77965_CLK_ZG			2
+#define R8A77965_CLK_ZTR		3
+#define R8A77965_CLK_ZTRD2		4
+#define R8A77965_CLK_ZT			5
+#define R8A77965_CLK_ZX			6
+#define R8A77965_CLK_S0D1		7
+#define R8A77965_CLK_S0D2		8
+#define R8A77965_CLK_S0D3		9
+#define R8A77965_CLK_S0D4		10
+#define R8A77965_CLK_S0D6		11
+#define R8A77965_CLK_S0D8		12
+#define R8A77965_CLK_S0D12		13
+#define R8A77965_CLK_S1D1		14
+#define R8A77965_CLK_S1D2		15
+#define R8A77965_CLK_S1D4		16
+#define R8A77965_CLK_S2D1		17
+#define R8A77965_CLK_S2D2		18
+#define R8A77965_CLK_S2D4		19
+#define R8A77965_CLK_S3D1		20
+#define R8A77965_CLK_S3D2		21
+#define R8A77965_CLK_S3D4		22
+#define R8A77965_CLK_LB			23
+#define R8A77965_CLK_CL			24
+#define R8A77965_CLK_ZB3		25
+#define R8A77965_CLK_ZB3D2		26
+#define R8A77965_CLK_CR			27
+#define R8A77965_CLK_CRD2		28
+#define R8A77965_CLK_SD0H		29
+#define R8A77965_CLK_SD0		30
+#define R8A77965_CLK_SD1H		31
+#define R8A77965_CLK_SD1		32
+#define R8A77965_CLK_SD2H		33
+#define R8A77965_CLK_SD2		34
+#define R8A77965_CLK_SD3H		35
+#define R8A77965_CLK_SD3		36
+#define R8A77965_CLK_SSP2		37
+#define R8A77965_CLK_SSP1		38
+#define R8A77965_CLK_SSPRS		39
+#define R8A77965_CLK_RPC		40
+#define R8A77965_CLK_RPCD2		41
+#define R8A77965_CLK_MSO		42
+#define R8A77965_CLK_CANFD		43
+#define R8A77965_CLK_HDMI		44
+#define R8A77965_CLK_CSI0		45
+#define R8A77965_CLK_CP			46
+#define R8A77965_CLK_CPEX		47
+#define R8A77965_CLK_R			48
+#define R8A77965_CLK_OSC		49
+
+#endif /* __DT_BINDINGS_CLOCK_R8A77965_CPG_MSSR_H__ */
-- 
2.7.4

[PATCH v2 01/19] clk: renesas: cpg-mssr: Add support for R-Car M3-N

[Geert Uytterhoeven]

On Tue, Feb 20, 2018 at 4:12 PM, Jacopo Mondi <jacopo+renesas@jmondi.org> wrote:
> Initial support for R-Car M3-N (r8a77965), including core and module
> clocks.
>
> Based on Table 8.2d of "R-Car Series, 3rd Generation User's Manual:
> Hardware (Rev. 0.80, Oct 31, 2017)".
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Queued in clk-renesas-for-v4.17.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH v2 01/19] clk: renesas: cpg-mssr: Add support for R-Car M3-N

[Geert Uytterhoeven]

Hi Jacopo,

On Tue, Feb 20, 2018 at 4:12 PM, Jacopo Mondi <jacopo+renesas@jmondi.org> wrote:
> Initial support for R-Car M3-N (r8a77965), including core and module
> clocks.
>
> Based on Table 8.2d of "R-Car Series, 3rd Generation User's Manual:
> Hardware (Rev. 0.80, Oct 31, 2017)".
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>

> --- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
> +++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
> @@ -22,6 +22,7 @@ Required Properties:
>        - "renesas,r8a7794-cpg-mssr" for the r8a7794 SoC (R-Car E2)
>        - "renesas,r8a7795-cpg-mssr" for the r8a7795 SoC (R-Car H3)
>        - "renesas,r8a7796-cpg-mssr" for the r8a7796 SoC (R-Car M3-W)
> +      - "renesas,r8a77965-cpg-mssr" for the r8a77965 SoC (R-Car M3-N)
>        - "renesas,r8a77970-cpg-mssr" for the r8a77970 SoC (R-Car V3M)
>        - "renesas,r8a77995-cpg-mssr" for the r8a77995 SoC (R-Car D3)

You forgot to update the list of external parent clock names.
No need to fix and resend, I've squashed in the following:

--- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
+++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
@@ -34,8 +34,8 @@ Required Properties:
     clock-names
   - clock-names: List of external parent clock names. Valid names are:
       - "extal" (r8a7743, r8a7745, r8a7790, r8a7791, r8a7792, r8a7793, r8a7794,
-                r8a7795, r8a7796, r8a77970, r8a77980, r8a77995)
-      - "extalr" (r8a7795, r8a7796, r8a77970, r8a77980)
+                r8a7795, r8a7796, r8a77965, r8a77970, r8a77980, r8a77995)
+      - "extalr" (r8a7795, r8a7796, r8a77965, r8a77970, r8a77980)
       - "usb_extal" (r8a7743, r8a7745, r8a7790, r8a7791, r8a7793, r8a7794)

   - #clock-cells: Must be 2

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH v2 02/19] soc: renesas: rcar-rst: Add support for R-Car M3-N

[Jacopo Mondi]

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
 Documentation/devicetree/bindings/reset/renesas,rst.txt | 1 +
 drivers/soc/renesas/Kconfig                             | 4 ++--
 drivers/soc/renesas/rcar-rst.c                          | 1 +
 3 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/reset/renesas,rst.txt b/Documentation/devicetree/bindings/reset/renesas,rst.txt
index a55b886..294a0da 100644
--- a/Documentation/devicetree/bindings/reset/renesas,rst.txt
+++ b/Documentation/devicetree/bindings/reset/renesas,rst.txt
@@ -26,6 +26,7 @@ Required properties:
 		  - "renesas,r8a7794-rst" (R-Car E2)
 		  - "renesas,r8a7795-rst" (R-Car H3)
 		  - "renesas,r8a7796-rst" (R-Car M3-W)
+		  - "renesas,r8a77965-rst" (R-Car M3-N)
 		  - "renesas,r8a77970-rst" (R-Car V3M)
 		  - "renesas,r8a77980-rst" (R-Car V3H)
 		  - "renesas,r8a77995-rst" (R-Car D3)
diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig
index 6efd7be..741b7cd 100644
--- a/drivers/soc/renesas/Kconfig
+++ b/drivers/soc/renesas/Kconfig
@@ -3,8 +3,8 @@ config SOC_RENESAS
 	default y if ARCH_RENESAS
 	select SOC_BUS
 	select RST_RCAR if ARCH_RCAR_GEN1 || ARCH_RCAR_GEN2 || \
-			   ARCH_R8A7795 || ARCH_R8A7796 || ARCH_R8A77970 || \
-			   ARCH_R8A77980 || ARCH_R8A77995
+			   ARCH_R8A7795 || ARCH_R8A7796 || ARCH_R8A77965 || \
+			   ARCH_R8A77970 || ARCH_R8A77980 || ARCH_R8A77995
 	select SYSC_R8A7743 if ARCH_R8A7743
 	select SYSC_R8A7745 if ARCH_R8A7745
 	select SYSC_R8A7779 if ARCH_R8A7779
diff --git a/drivers/soc/renesas/rcar-rst.c b/drivers/soc/renesas/rcar-rst.c
index e2340eb..33060f2 100644
--- a/drivers/soc/renesas/rcar-rst.c
+++ b/drivers/soc/renesas/rcar-rst.c
@@ -41,6 +41,7 @@ static const struct of_device_id rcar_rst_matches[] __initconst = {
 	/* R-Car Gen3 is handled like R-Car Gen2 */
 	{ .compatible = "renesas,r8a7795-rst", .data = &rcar_rst_gen2 },
 	{ .compatible = "renesas,r8a7796-rst", .data = &rcar_rst_gen2 },
+	{ .compatible = "renesas,r8a77965-rst", .data = &rcar_rst_gen2 },
 	{ .compatible = "renesas,r8a77970-rst", .data = &rcar_rst_gen2 },
 	{ .compatible = "renesas,r8a77980-rst", .data = &rcar_rst_gen2 },
 	{ .compatible = "renesas,r8a77995-rst", .data = &rcar_rst_gen2 },
-- 
2.7.4

[PATCH v2 02/19] soc: renesas: rcar-rst: Add support for R-Car M3-N

[Geert Uytterhoeven]

On Tue, Feb 20, 2018 at 4:12 PM, Jacopo Mondi <jacopo+renesas@jmondi.org> wrote:
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH v2 02/19] soc: renesas: rcar-rst: Add support for R-Car M3-N

[Simon Horman]

On Tue, Feb 20, 2018 at 04:29:37PM +0100, Geert Uytterhoeven wrote:
> On Tue, Feb 20, 2018 at 4:12 PM, Jacopo Mondi <jacopo+renesas@jmondi.org> wrote:
> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> 
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Thanks, applied.

[PATCH v2 03/19] soc: renesas: Identify R-Car M3-N

[Jacopo Mondi]

Add support for indentifying R-Car M3-N (R8A77965) SoC.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
 drivers/soc/renesas/renesas-soc.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/soc/renesas/renesas-soc.c b/drivers/soc/renesas/renesas-soc.c
index 0008343..7161983 100644
--- a/drivers/soc/renesas/renesas-soc.c
+++ b/drivers/soc/renesas/renesas-soc.c
@@ -149,6 +149,11 @@ static const struct renesas_soc soc_rcar_v3m __initconst __maybe_unused = {
 	.id	= 0x54,
 };
 
+static const struct renesas_soc soc_rcar_m3_n __initconst __maybe_unused = {
+	.family = &fam_rcar_gen3,
+	.id     = 0x55,
+};
+
 static const struct renesas_soc soc_rcar_v3h __initconst __maybe_unused = {
 	.family	= &fam_rcar_gen3,
 	.id	= 0x56,
@@ -214,6 +219,9 @@ static const struct of_device_id renesas_socs[] __initconst = {
 #ifdef CONFIG_ARCH_R8A7796
 	{ .compatible = "renesas,r8a7796",	.data = &soc_rcar_m3_w },
 #endif
+#ifdef CONFIG_ARCH_R8A77965
+	{ .compatible = "renesas,r8a77965",	.data = &soc_rcar_m3_n },
+#endif
 #ifdef CONFIG_ARCH_R8A77970
 	{ .compatible = "renesas,r8a77970",	.data = &soc_rcar_v3m },
 #endif
-- 
2.7.4

[PATCH v2 03/19] soc: renesas: Identify R-Car M3-N

[Geert Uytterhoeven]

Hi Jacopo,

On Tue, Feb 20, 2018 at 4:12 PM, Jacopo Mondi <jacopo+renesas@jmondi.org> wrote:
> Add support for indentifying R-Car M3-N (R8A77965) SoC.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

> --- a/drivers/soc/renesas/renesas-soc.c
> +++ b/drivers/soc/renesas/renesas-soc.c
> @@ -149,6 +149,11 @@ static const struct renesas_soc soc_rcar_v3m __initconst __maybe_unused = {
>         .id     = 0x54,
>  };
>
> +static const struct renesas_soc soc_rcar_m3_n __initconst __maybe_unused = {
> +       .family = &fam_rcar_gen3,
> +       .id     = 0x55,
> +};

Note that the list was sorted by SoC part number.

> +
>  static const struct renesas_soc soc_rcar_v3h __initconst __maybe_unused = {
>         .family = &fam_rcar_gen3,
>         .id     = 0x56,
> @@ -214,6 +219,9 @@ static const struct of_device_id renesas_socs[] __initconst = {
>  #ifdef CONFIG_ARCH_R8A7796
>         { .compatible = "renesas,r8a7796",      .data = &soc_rcar_m3_w },
>  #endif
> +#ifdef CONFIG_ARCH_R8A77965
> +       { .compatible = "renesas,r8a77965",     .data = &soc_rcar_m3_n },
> +#endif
>  #ifdef CONFIG_ARCH_R8A77970
>         { .compatible = "renesas,r8a77970",     .data = &soc_rcar_v3m },
>  #endif

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH v2 03/19] soc: renesas: Identify R-Car M3-N

[Simon Horman]

On Tue, Feb 20, 2018 at 04:40:34PM +0100, Geert Uytterhoeven wrote:
> Hi Jacopo,
> 
> On Tue, Feb 20, 2018 at 4:12 PM, Jacopo Mondi <jacopo+renesas@jmondi.org> wrote:
> > Add support for indentifying R-Car M3-N (R8A77965) SoC.
> >
> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> 
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> 
> > --- a/drivers/soc/renesas/renesas-soc.c
> > +++ b/drivers/soc/renesas/renesas-soc.c
> > @@ -149,6 +149,11 @@ static const struct renesas_soc soc_rcar_v3m __initconst __maybe_unused = {
> >         .id     = 0x54,
> >  };
> >
> > +static const struct renesas_soc soc_rcar_m3_n __initconst __maybe_unused = {
> > +       .family = &fam_rcar_gen3,
> > +       .id     = 0x55,
> > +};
> 
> Note that the list was sorted by SoC part number.

Thanks, I have moved the above structure to between
the similar structure for m3_w and v3m. The result is below.

> > +
> >  static const struct renesas_soc soc_rcar_v3h __initconst __maybe_unused = {
> >         .family = &fam_rcar_gen3,
> >         .id     = 0x56,
> > @@ -214,6 +219,9 @@ static const struct of_device_id renesas_socs[] __initconst = {
> >  #ifdef CONFIG_ARCH_R8A7796
> >         { .compatible = "renesas,r8a7796",      .data = &soc_rcar_m3_w },
> >  #endif
> > +#ifdef CONFIG_ARCH_R8A77965
> > +       { .compatible = "renesas,r8a77965",     .data = &soc_rcar_m3_n },
> > +#endif
> >  #ifdef CONFIG_ARCH_R8A77970
> >         { .compatible = "renesas,r8a77970",     .data = &soc_rcar_v3m },
> >  #endif

From: Jacopo Mondi <jacopo+renesas@jmondi.org>
Subject: [PATCH] soc: renesas: Identify R-Car M3-N

Add support for indentifying R-Car M3-N (R8A77965) SoC.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 drivers/soc/renesas/renesas-soc.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/soc/renesas/renesas-soc.c b/drivers/soc/renesas/renesas-soc.c
index 000834321774..ea71c413c926 100644
--- a/drivers/soc/renesas/renesas-soc.c
+++ b/drivers/soc/renesas/renesas-soc.c
@@ -144,6 +144,11 @@ static const struct renesas_soc soc_rcar_m3_w __initconst __maybe_unused = {
 	.id	= 0x52,
 };
 
+static const struct renesas_soc soc_rcar_m3_n __initconst __maybe_unused = {
+	.family = &fam_rcar_gen3,
+	.id     = 0x55,
+};
+
 static const struct renesas_soc soc_rcar_v3m __initconst __maybe_unused = {
 	.family	= &fam_rcar_gen3,
 	.id	= 0x54,
@@ -214,6 +219,9 @@ static const struct of_device_id renesas_socs[] __initconst = {
 #ifdef CONFIG_ARCH_R8A7796
 	{ .compatible = "renesas,r8a7796",	.data = &soc_rcar_m3_w },
 #endif
+#ifdef CONFIG_ARCH_R8A77965
+	{ .compatible = "renesas,r8a77965",	.data = &soc_rcar_m3_n },
+#endif
 #ifdef CONFIG_ARCH_R8A77970
 	{ .compatible = "renesas,r8a77970",	.data = &soc_rcar_v3m },
 #endif
-- 
2.11.0

[PATCH v2 04/19] soc: renesas: rcar-sysc: Add R-Car M3-N support

[Jacopo Mondi]

Add support for R-Car M3-N (R8A77965) power areas.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>

---
v1->v2:
- Remove A2VC0 power area
- Add A3VP power area
---
 .../bindings/power/renesas,rcar-sysc.txt           |  1 +
 drivers/soc/renesas/Kconfig                        |  5 +++
 drivers/soc/renesas/Makefile                       |  1 +
 drivers/soc/renesas/r8a77965-sysc.c                | 37 ++++++++++++++++++++++
 drivers/soc/renesas/rcar-sysc.c                    |  3 ++
 drivers/soc/renesas/rcar-sysc.h                    |  1 +
 include/dt-bindings/power/r8a77965-sysc.h          | 30 ++++++++++++++++++
 7 files changed, 78 insertions(+)
 create mode 100644 drivers/soc/renesas/r8a77965-sysc.c
 create mode 100644 include/dt-bindings/power/r8a77965-sysc.h

diff --git a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
index 8690f10..b9c9e28 100644
--- a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
+++ b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
@@ -17,6 +17,7 @@ Required properties:
       - "renesas,r8a7794-sysc" (R-Car E2)
       - "renesas,r8a7795-sysc" (R-Car H3)
       - "renesas,r8a7796-sysc" (R-Car M3-W)
+      - "renesas,r8a77965-sysc" (R-Car M3-N)
       - "renesas,r8a77970-sysc" (R-Car V3M)
       - "renesas,r8a77995-sysc" (R-Car D3)
   - reg: Address start and address range for the device.
diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig
index 741b7cd..c262a4b 100644
--- a/drivers/soc/renesas/Kconfig
+++ b/drivers/soc/renesas/Kconfig
@@ -14,6 +14,7 @@ config SOC_RENESAS
 	select SYSC_R8A7794 if ARCH_R8A7794
 	select SYSC_R8A7795 if ARCH_R8A7795
 	select SYSC_R8A7796 if ARCH_R8A7796
+	select SYSC_R8A77965 if ARCH_R8A77965
 	select SYSC_R8A77970 if ARCH_R8A77970
 	select SYSC_R8A77995 if ARCH_R8A77995
 
@@ -56,6 +57,10 @@ config SYSC_R8A7796
 	bool "R-Car M3-W System Controller support" if COMPILE_TEST
 	select SYSC_RCAR
 
+config SYSC_R8A77965
+	bool "R-Car M3-N System Controller support" if COMPILE_TEST
+	select SYSC_RCAR
+
 config SYSC_R8A77970
 	bool "R-Car V3M System Controller support" if COMPILE_TEST
 	select SYSC_RCAR
diff --git a/drivers/soc/renesas/Makefile b/drivers/soc/renesas/Makefile
index 845d62a..9f360b8 100644
--- a/drivers/soc/renesas/Makefile
+++ b/drivers/soc/renesas/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_SYSC_R8A7792)	+= r8a7792-sysc.o
 obj-$(CONFIG_SYSC_R8A7794)	+= r8a7794-sysc.o
 obj-$(CONFIG_SYSC_R8A7795)	+= r8a7795-sysc.o
 obj-$(CONFIG_SYSC_R8A7796)	+= r8a7796-sysc.o
+obj-$(CONFIG_SYSC_R8A77965)	+= r8a77965-sysc.o
 obj-$(CONFIG_SYSC_R8A77970)	+= r8a77970-sysc.o
 obj-$(CONFIG_SYSC_R8A77995)	+= r8a77995-sysc.o
 
diff --git a/drivers/soc/renesas/r8a77965-sysc.c b/drivers/soc/renesas/r8a77965-sysc.c
new file mode 100644
index 0000000..d7f7928
--- /dev/null
+++ b/drivers/soc/renesas/r8a77965-sysc.c
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Renesas R-Car M3-N System Controller
+ * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
+ *
+ * Based on Renesas R-Car M3-W System Controller
+ * Copyright (C) 2016 Glider bvba
+ */
+
+#include <linux/bug.h>
+#include <linux/kernel.h>
+
+#include <dt-bindings/power/r8a77965-sysc.h>
+
+#include "rcar-sysc.h"
+
+static const struct rcar_sysc_area r8a77965_areas[] __initconst = {
+	{ "always-on",	    0, 0, R8A77965_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
+	{ "ca57-scu",	0x1c0, 0, R8A77965_PD_CA57_SCU,	R8A77965_PD_ALWAYS_ON,
+	  PD_SCU },
+	{ "ca57-cpu0",	 0x80, 0, R8A77965_PD_CA57_CPU0, R8A77965_PD_CA57_SCU,
+	  PD_CPU_NOCR },
+	{ "ca57-cpu1",	 0x80, 1, R8A77965_PD_CA57_CPU1, R8A77965_PD_CA57_SCU,
+	  PD_CPU_NOCR },
+	{ "cr7",	0x240, 0, R8A77965_PD_CR7,	R8A77965_PD_ALWAYS_ON },
+	{ "a3vc",	0x380, 0, R8A77965_PD_A3VC,	R8A77965_PD_ALWAYS_ON },
+	{ "a3vp",	0x340, 0, R8A77965_PD_A3VP,	R8A77965_PD_ALWAYS_ON },
+	{ "a2vc1",	0x3c0, 1, R8A77965_PD_A2VC1,	R8A77965_PD_A3VC },
+	{ "3dg-a",	0x100, 0, R8A77965_PD_3DG_A,	R8A77965_PD_ALWAYS_ON },
+	{ "3dg-b",	0x100, 1, R8A77965_PD_3DG_B,	R8A77965_PD_3DG_A },
+	{ "a3ir",	0x180, 0, R8A77965_PD_A3IR,	R8A77965_PD_ALWAYS_ON },
+};
+
+const struct rcar_sysc_info r8a77965_sysc_info __initconst = {
+	.areas = r8a77965_areas,
+	.num_areas = ARRAY_SIZE(r8a77965_areas),
+};
diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c
index 636872b..d87f83a 100644
--- a/drivers/soc/renesas/rcar-sysc.c
+++ b/drivers/soc/renesas/rcar-sysc.c
@@ -284,6 +284,9 @@ static const struct of_device_id rcar_sysc_matches[] __initconst = {
 #ifdef CONFIG_SYSC_R8A7796
 	{ .compatible = "renesas,r8a7796-sysc", .data = &r8a7796_sysc_info },
 #endif
+#ifdef CONFIG_SYSC_R8A77965
+	{ .compatible = "renesas,r8a77965-sysc", .data = &r8a77965_sysc_info },
+#endif
 #ifdef CONFIG_SYSC_R8A77970
 	{ .compatible = "renesas,r8a77970-sysc", .data = &r8a77970_sysc_info },
 #endif
diff --git a/drivers/soc/renesas/rcar-sysc.h b/drivers/soc/renesas/rcar-sysc.h
index 9d9daf9..c892105 100644
--- a/drivers/soc/renesas/rcar-sysc.h
+++ b/drivers/soc/renesas/rcar-sysc.h
@@ -58,6 +58,7 @@ extern const struct rcar_sysc_info r8a7792_sysc_info;
 extern const struct rcar_sysc_info r8a7794_sysc_info;
 extern const struct rcar_sysc_info r8a7795_sysc_info;
 extern const struct rcar_sysc_info r8a7796_sysc_info;
+extern const struct rcar_sysc_info r8a77965_sysc_info;
 extern const struct rcar_sysc_info r8a77970_sysc_info;
 extern const struct rcar_sysc_info r8a77995_sysc_info;
 
diff --git a/include/dt-bindings/power/r8a77965-sysc.h b/include/dt-bindings/power/r8a77965-sysc.h
new file mode 100644
index 0000000..05a4b59
--- /dev/null
+++ b/include/dt-bindings/power/r8a77965-sysc.h
@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
+ * Copyright (C) 2016 Glider bvba
+ */
+
+#ifndef __DT_BINDINGS_POWER_R8A77965_SYSC_H__
+#define __DT_BINDINGS_POWER_R8A77965_SYSC_H__
+
+/*
+ * These power domain indices match the numbers of the interrupt bits
+ * representing the power areas in the various Interrupt Registers
+ * (e.g. SYSCISR, Interrupt Status Register)
+ */
+
+#define R8A77965_PD_CA57_CPU0		 0
+#define R8A77965_PD_CA57_CPU1		 1
+#define R8A77965_PD_A3VP		 9
+#define R8A77965_PD_CA57_SCU		12
+#define R8A77965_PD_CR7			13
+#define R8A77965_PD_A3VC		14
+#define R8A77965_PD_3DG_A		17
+#define R8A77965_PD_3DG_B		18
+#define R8A77965_PD_A3IR		24
+#define R8A77965_PD_A2VC1		26
+
+/* Always-on power area */
+#define R8A77965_PD_ALWAYS_ON		32
+
+#endif /* __DT_BINDINGS_POWER_R8A77965_SYSC_H__ */
-- 
2.7.4

[PATCH v2 04/19] soc: renesas: rcar-sysc: Add R-Car M3-N support

[Geert Uytterhoeven]

On Tue, Feb 20, 2018 at 4:12 PM, Jacopo Mondi <jacopo+renesas@jmondi.org> wrote:
> Add support for R-Car M3-N (R8A77965) power areas.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

We'll sort out the remaining issues later.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH v2 04/19] soc: renesas: rcar-sysc: Add R-Car M3-N support

[Simon Horman]

On Tue, Feb 20, 2018 at 04:12:06PM +0100, Jacopo Mondi wrote:
> Add support for R-Car M3-N (R8A77965) power areas.
> 
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> 
> ---
> v1->v2:
> - Remove A2VC0 power area
> - Add A3VP power area
> ---
>  .../bindings/power/renesas,rcar-sysc.txt           |  1 +
>  drivers/soc/renesas/Kconfig                        |  5 +++
>  drivers/soc/renesas/Makefile                       |  1 +
>  drivers/soc/renesas/r8a77965-sysc.c                | 37 ++++++++++++++++++++++
>  drivers/soc/renesas/rcar-sysc.c                    |  3 ++
>  drivers/soc/renesas/rcar-sysc.h                    |  1 +
>  include/dt-bindings/power/r8a77965-sysc.h          | 30 ++++++++++++++++++
>  7 files changed, 78 insertions(+)
>  create mode 100644 drivers/soc/renesas/r8a77965-sysc.c
>  create mode 100644 include/dt-bindings/power/r8a77965-sysc.h

Thanks, applied.

There was some fuzz. The result is below.

From: Jacopo Mondi <jacopo+renesas@jmondi.org>
Subject: [PATCH] soc: renesas: rcar-sysc: Add R-Car M3-N support

Add support for R-Car M3-N (R8A77965) power areas.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 .../bindings/power/renesas,rcar-sysc.txt           |  1 +
 drivers/soc/renesas/Kconfig                        |  5 +++
 drivers/soc/renesas/Makefile                       |  1 +
 drivers/soc/renesas/r8a77965-sysc.c                | 37 ++++++++++++++++++++++
 drivers/soc/renesas/rcar-sysc.c                    |  3 ++
 drivers/soc/renesas/rcar-sysc.h                    |  1 +
 include/dt-bindings/power/r8a77965-sysc.h          | 30 ++++++++++++++++++
 7 files changed, 78 insertions(+)
 create mode 100644 drivers/soc/renesas/r8a77965-sysc.c
 create mode 100644 include/dt-bindings/power/r8a77965-sysc.h

diff --git a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
index 6284a9550b3c..ab399e559257 100644
--- a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
+++ b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
@@ -17,6 +17,7 @@ Required properties:
       - "renesas,r8a7794-sysc" (R-Car E2)
       - "renesas,r8a7795-sysc" (R-Car H3)
       - "renesas,r8a7796-sysc" (R-Car M3-W)
+      - "renesas,r8a77965-sysc" (R-Car M3-N)
       - "renesas,r8a77970-sysc" (R-Car V3M)
       - "renesas,r8a77980-sysc" (R-Car V3H)
       - "renesas,r8a77995-sysc" (R-Car D3)
diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig
index 6caa393e3a2d..7106a6330210 100644
--- a/drivers/soc/renesas/Kconfig
+++ b/drivers/soc/renesas/Kconfig
@@ -14,6 +14,7 @@ config SOC_RENESAS
 	select SYSC_R8A7794 if ARCH_R8A7794
 	select SYSC_R8A7795 if ARCH_R8A7795
 	select SYSC_R8A7796 if ARCH_R8A7796
+	select SYSC_R8A77965 if ARCH_R8A77965
 	select SYSC_R8A77970 if ARCH_R8A77970
 	select SYSC_R8A77980 if ARCH_R8A77980
 	select SYSC_R8A77995 if ARCH_R8A77995
@@ -57,6 +58,10 @@ config SYSC_R8A7796
 	bool "R-Car M3-W System Controller support" if COMPILE_TEST
 	select SYSC_RCAR
 
+config SYSC_R8A77965
+	bool "R-Car M3-N System Controller support" if COMPILE_TEST
+	select SYSC_RCAR
+
 config SYSC_R8A77970
 	bool "R-Car V3M System Controller support" if COMPILE_TEST
 	select SYSC_RCAR
diff --git a/drivers/soc/renesas/Makefile b/drivers/soc/renesas/Makefile
index d3b7bb3284c0..ccb5ec57a262 100644
--- a/drivers/soc/renesas/Makefile
+++ b/drivers/soc/renesas/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_SYSC_R8A7792)	+= r8a7792-sysc.o
 obj-$(CONFIG_SYSC_R8A7794)	+= r8a7794-sysc.o
 obj-$(CONFIG_SYSC_R8A7795)	+= r8a7795-sysc.o
 obj-$(CONFIG_SYSC_R8A7796)	+= r8a7796-sysc.o
+obj-$(CONFIG_SYSC_R8A77965)	+= r8a77965-sysc.o
 obj-$(CONFIG_SYSC_R8A77970)	+= r8a77970-sysc.o
 obj-$(CONFIG_SYSC_R8A77980)	+= r8a77980-sysc.o
 obj-$(CONFIG_SYSC_R8A77995)	+= r8a77995-sysc.o
diff --git a/drivers/soc/renesas/r8a77965-sysc.c b/drivers/soc/renesas/r8a77965-sysc.c
new file mode 100644
index 000000000000..d7f7928e3c07
--- /dev/null
+++ b/drivers/soc/renesas/r8a77965-sysc.c
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Renesas R-Car M3-N System Controller
+ * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
+ *
+ * Based on Renesas R-Car M3-W System Controller
+ * Copyright (C) 2016 Glider bvba
+ */
+
+#include <linux/bug.h>
+#include <linux/kernel.h>
+
+#include <dt-bindings/power/r8a77965-sysc.h>
+
+#include "rcar-sysc.h"
+
+static const struct rcar_sysc_area r8a77965_areas[] __initconst = {
+	{ "always-on",	    0, 0, R8A77965_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
+	{ "ca57-scu",	0x1c0, 0, R8A77965_PD_CA57_SCU,	R8A77965_PD_ALWAYS_ON,
+	  PD_SCU },
+	{ "ca57-cpu0",	 0x80, 0, R8A77965_PD_CA57_CPU0, R8A77965_PD_CA57_SCU,
+	  PD_CPU_NOCR },
+	{ "ca57-cpu1",	 0x80, 1, R8A77965_PD_CA57_CPU1, R8A77965_PD_CA57_SCU,
+	  PD_CPU_NOCR },
+	{ "cr7",	0x240, 0, R8A77965_PD_CR7,	R8A77965_PD_ALWAYS_ON },
+	{ "a3vc",	0x380, 0, R8A77965_PD_A3VC,	R8A77965_PD_ALWAYS_ON },
+	{ "a3vp",	0x340, 0, R8A77965_PD_A3VP,	R8A77965_PD_ALWAYS_ON },
+	{ "a2vc1",	0x3c0, 1, R8A77965_PD_A2VC1,	R8A77965_PD_A3VC },
+	{ "3dg-a",	0x100, 0, R8A77965_PD_3DG_A,	R8A77965_PD_ALWAYS_ON },
+	{ "3dg-b",	0x100, 1, R8A77965_PD_3DG_B,	R8A77965_PD_3DG_A },
+	{ "a3ir",	0x180, 0, R8A77965_PD_A3IR,	R8A77965_PD_ALWAYS_ON },
+};
+
+const struct rcar_sysc_info r8a77965_sysc_info __initconst = {
+	.areas = r8a77965_areas,
+	.num_areas = ARRAY_SIZE(r8a77965_areas),
+};
diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c
index 72b0f4a9ad4e..faf20e719361 100644
--- a/drivers/soc/renesas/rcar-sysc.c
+++ b/drivers/soc/renesas/rcar-sysc.c
@@ -284,6 +284,9 @@ static const struct of_device_id rcar_sysc_matches[] __initconst = {
 #ifdef CONFIG_SYSC_R8A7796
 	{ .compatible = "renesas,r8a7796-sysc", .data = &r8a7796_sysc_info },
 #endif
+#ifdef CONFIG_SYSC_R8A77965
+	{ .compatible = "renesas,r8a77965-sysc", .data = &r8a77965_sysc_info },
+#endif
 #ifdef CONFIG_SYSC_R8A77970
 	{ .compatible = "renesas,r8a77970-sysc", .data = &r8a77970_sysc_info },
 #endif
diff --git a/drivers/soc/renesas/rcar-sysc.h b/drivers/soc/renesas/rcar-sysc.h
index 974b18619c08..dcdc9ec8eba7 100644
--- a/drivers/soc/renesas/rcar-sysc.h
+++ b/drivers/soc/renesas/rcar-sysc.h
@@ -58,6 +58,7 @@ extern const struct rcar_sysc_info r8a7792_sysc_info;
 extern const struct rcar_sysc_info r8a7794_sysc_info;
 extern const struct rcar_sysc_info r8a7795_sysc_info;
 extern const struct rcar_sysc_info r8a7796_sysc_info;
+extern const struct rcar_sysc_info r8a77965_sysc_info;
 extern const struct rcar_sysc_info r8a77970_sysc_info;
 extern const struct rcar_sysc_info r8a77980_sysc_info;
 extern const struct rcar_sysc_info r8a77995_sysc_info;
diff --git a/include/dt-bindings/power/r8a77965-sysc.h b/include/dt-bindings/power/r8a77965-sysc.h
new file mode 100644
index 000000000000..05a4b5917314
--- /dev/null
+++ b/include/dt-bindings/power/r8a77965-sysc.h
@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
+ * Copyright (C) 2016 Glider bvba
+ */
+
+#ifndef __DT_BINDINGS_POWER_R8A77965_SYSC_H__
+#define __DT_BINDINGS_POWER_R8A77965_SYSC_H__
+
+/*
+ * These power domain indices match the numbers of the interrupt bits
+ * representing the power areas in the various Interrupt Registers
+ * (e.g. SYSCISR, Interrupt Status Register)
+ */
+
+#define R8A77965_PD_CA57_CPU0		 0
+#define R8A77965_PD_CA57_CPU1		 1
+#define R8A77965_PD_A3VP		 9
+#define R8A77965_PD_CA57_SCU		12
+#define R8A77965_PD_CR7			13
+#define R8A77965_PD_A3VC		14
+#define R8A77965_PD_3DG_A		17
+#define R8A77965_PD_3DG_B		18
+#define R8A77965_PD_A3IR		24
+#define R8A77965_PD_A2VC1		26
+
+/* Always-on power area */
+#define R8A77965_PD_ALWAYS_ON		32
+
+#endif /* __DT_BINDINGS_POWER_R8A77965_SYSC_H__ */
-- 
2.11.0

[PATCH v2 06/19] dt-bindings: arm: Document R-Car M3-N SoC DT bindings

[Jacopo Mondi]

Add device tree bindings documentation for Renesas R-Car M3-N (r8a77965)
SoC.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Rob Herring <robh@kernel.org>
---
 Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt
index 41d3920..67889a9 100644
--- a/Documentation/devicetree/bindings/arm/shmobile.txt
+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
@@ -39,6 +39,8 @@ SoCs:
     compatible = "renesas,r8a7795"
   - R-Car M3-W (R8A77960)
     compatible = "renesas,r8a7796"
+  - R-Car M3-N (R8A77965)
+    compatible = "renesas,r8a77965"
   - R-Car V3M (R8A77970)
     compatible = "renesas,r8a77970"
   - R-Car V3H (R8A77980)
-- 
2.7.4

[PATCH v2 06/19] dt-bindings: arm: Document R-Car M3-N SoC DT bindings

[Simon Horman]

On Tue, Feb 20, 2018 at 04:12:08PM +0100, Jacopo Mondi wrote:
> Add device tree bindings documentation for Renesas R-Car M3-N (r8a77965)
> SoC.
> 
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Reviewed-by: Rob Herring <robh@kernel.org>

Thanks, this is already applied.

[PATCH v2 07/19] ARM64: Add Renesas R-Car M3-N config symbol

[Jacopo Mondi]

Add configuration option for the R-Car M3-N (R8A77965) SoC.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
 arch/arm64/Kconfig.platforms | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index b51db26..2b1535c 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -190,6 +190,12 @@ config ARCH_R8A7796
 	help
 	  This enables support for the Renesas R-Car M3-W SoC.
 
+config ARCH_R8A77965
+	bool "Renesas R-Car M3-N SoC Platform"
+	depends on ARCH_RENESAS
+	help
+	  This enables support for the Renesas R-Car M3-N SoC.
+
 config ARCH_R8A77970
 	bool "Renesas R-Car V3M SoC Platform"
 	depends on ARCH_RENESAS
-- 
2.7.4

[PATCH v2 07/19] ARM64: Add Renesas R-Car M3-N config symbol

[Geert Uytterhoeven]

On Tue, Feb 20, 2018 at 4:12 PM, Jacopo Mondi <jacopo+renesas@jmondi.org> wrote:
> Add configuration option for the R-Car M3-N (R8A77965) SoC.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH v2 07/19] ARM64: Add Renesas R-Car M3-N config symbol

[Simon Horman]

On Tue, Feb 20, 2018 at 04:12:09PM +0100, Jacopo Mondi wrote:
> Add configuration option for the R-Car M3-N (R8A77965) SoC.
> 
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>

Thanks, I have applied this after updating the subject to:

arm64: add Renesas R8A77965 support

Please use "arm64" rather than ARM64 as a prefix.
(But "ARM" rather than "arm"!).

[PATCH v2 08/19] ARM64: dts: Add Renesas R8A77965 SoC support

[Jacopo Mondi]

Basic support for the Gen 3 R-Car M3-N SoC.

Based on original work from:
Takeshi Kihara <takeshi.kihara.df@renesas.com>
Magnus Damm <damm+renesas@opensource.se>

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>

---
v1 -> v2:
- Split r8a77965.dtsi from patch v1 [5/15]
- Replace all PD_ and CLK_ defines with numeric entries
- Move timer and pmu nodes outside of soc node and replace their
  "interrupt" property with "interrupt-extended" one
- Fix license header
---
 arch/arm64/boot/dts/renesas/r8a77965.dtsi | 490 ++++++++++++++++++++++++++++++
 1 file changed, 490 insertions(+)
 create mode 100644 arch/arm64/boot/dts/renesas/r8a77965.dtsi

diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
new file mode 100644
index 0000000..6b6ec65
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -0,0 +1,490 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the r8a77965 SoC
+ *
+ * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
+ *
+ * Based on r8a7796.dtsi
+ * Copyright (C) 2016 Renesas Electronics Corp.
+ */
+
+#include <dt-bindings/clock/renesas-cpg-mssr.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+#define CPG_AUDIO_CLK_I		10
+
+/ {
+	compatible = "renesas,r8a77965";
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	psci {
+		compatible = "arm,psci-1.0", "arm,psci-0.2";
+		method = "smc";
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		a57_0: cpu at 0 {
+			compatible = "arm,cortex-a57", "arm,armv8";
+			reg = <0x0>;
+			device_type = "cpu";
+			power-domains = <&sysc 0>;
+			next-level-cache = <&L2_CA57>;
+			enable-method = "psci";
+		};
+
+		a57_1: cpu at 1 {
+			compatible = "arm,cortex-a57","arm,armv8";
+			reg = <0x1>;
+			device_type = "cpu";
+			power-domains = <&sysc 1>;
+			next-level-cache = <&L2_CA57>;
+			enable-method = "psci";
+		};
+
+		L2_CA57: cache-controller-0 {
+			compatible = "cache";
+			reg = <0>;
+			power-domains = <&sysc 12>;
+			cache-unified;
+			cache-level = <2>;
+		};
+	};
+
+	extal_clk: extal {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		/* This value must be overridden by the board */
+		clock-frequency = <0>;
+	};
+
+	extalr_clk: extalr {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		/* This value must be overridden by the board */
+		clock-frequency = <0>;
+	};
+
+	/*
+	 * The external audio clocks are configured as 0 Hz fixed frequency
+	 * clocks by default.
+	 * Boards that provide audio clocks should override them.
+	 */
+	audio_clk_a: audio_clk_a {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <0>;
+	};
+
+	audio_clk_b: audio_clk_b {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <0>;
+	};
+
+	audio_clk_c: audio_clk_c {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <0>;
+	};
+
+	/* External CAN clock - to be overridden by boards that provide it */
+	can_clk: can {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <0>;
+	};
+
+	/* External SCIF clock - to be overridden by boards that provide it */
+	scif_clk: scif {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <0>;
+	};
+
+	/* External PCIe clock - can be overridden by the board */
+	pcie_bus_clk: pcie_bus {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <0>;
+	};
+
+	/* External USB clocks - can be overridden by the board */
+	usb3s0_clk: usb3s0 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <0>;
+	};
+
+	usb_extal_clk: usb_extal {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <0>;
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+				      <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+				      <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+				      <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+	};
+
+	pmu_a57 {
+		compatible = "arm,cortex-a57-pmu";
+		interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
+				      <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&a57_0>,
+				     <&a57_1>;
+	};
+
+	soc {
+		compatible = "simple-bus";
+		interrupt-parent = <&gic>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		gic: interrupt-controller at f1010000 {
+			compatible = "arm,gic-400";
+			#interrupt-cells = <3>;
+			#address-cells = <0>;
+			interrupt-controller;
+			reg = <0x0 0xf1010000 0 0x1000>,
+			      <0x0 0xf1020000 0 0x20000>,
+			      <0x0 0xf1040000 0 0x20000>,
+			      <0x0 0xf1060000 0 0x20000>;
+			interrupts = <GIC_PPI 9
+					(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+			clocks = <&cpg CPG_MOD 408>;
+			clock-names = "clk";
+			power-domains = <&sysc 32>;
+			resets = <&cpg 408>;
+		};
+
+		pfc: pin-controller at e6060000 {
+			compatible = "renesas,pfc-r8a77965";
+			reg = <0 0xe6060000 0 0x50c>;
+		};
+
+		cpg: clock-controller at e6150000 {
+			compatible = "renesas,r8a77965-cpg-mssr";
+			reg = <0 0xe6150000 0 0x1000>;
+			clocks = <&extal_clk>, <&extalr_clk>;
+			clock-names = "extal", "extalr";
+			#clock-cells = <2>;
+			#power-domain-cells = <0>;
+			#reset-cells = <1>;
+		};
+
+		rst: reset-controller at e6160000 {
+			compatible = "renesas,r8a77965-rst";
+			reg = <0 0xe6160000 0 0x0200>;
+		};
+
+		prr: chipid at fff00044 {
+			compatible = "renesas,prr";
+			reg = <0 0xfff00044 0 4>;
+		};
+
+		sysc: system-controller at e6180000 {
+			compatible = "renesas,r8a77965-sysc";
+			reg = <0 0xe6180000 0 0x0400>;
+			#power-domain-cells = <1>;
+		};
+
+		gpio0: gpio at e6050000 {
+			/* placeholder */
+		};
+
+		gpio1: gpio at e6051000 {
+			/* placeholder */
+		};
+
+		gpio2: gpio at e6052000 {
+			/* placeholder */
+		};
+
+		gpio3: gpio at e6053000 {
+			/* placeholder */
+		};
+
+		gpio4: gpio at e6054000 {
+			/* placeholder */
+		};
+
+		gpio5: gpio at e6055000 {
+			/* placeholder */
+		};
+
+		gpio6: gpio at e6055400 {
+			/* placeholder */
+		};
+
+		gpio7: gpio at e6055800 {
+			/* placeholder */
+		};
+
+		intc_ex: interrupt-controller at e61c0000 {
+			/* placeholder */
+		};
+
+		dmac0: dma-controller at e6700000 {
+			/* placeholder */
+		};
+
+		dmac1: dma-controller at e7300000 {
+			/* placeholder */
+		};
+
+		dmac2: dma-controller at e7310000 {
+			/* placeholder */
+		};
+
+		scif0: serial at e6e60000 {
+			/* placeholder */
+		};
+
+		scif1: serial at e6e68000 {
+			/* placeholder */
+		};
+
+		scif2: serial at e6e88000 {
+			/* placeholder */
+		};
+
+		scif3: serial at e6c50000 {
+			/* placeholder */
+		};
+
+		scif4: serial at e6c40000 {
+			/* placeholder */
+		};
+
+		scif5: serial at e6f30000 {
+			/* placeholder */
+		};
+
+		avb: ethernet at e6800000 {
+			/* placeholder */
+		};
+
+		csi20: csi2 at fea80000 {
+			/* placeholder */
+		};
+
+		csi40: csi2 at feaa0000 {
+			/* placeholder */
+		};
+
+		vin0: video at e6ef0000 {
+			/* placeholder */
+		};
+
+		vin1: video at e6ef1000 {
+			/* placeholder */
+		};
+
+		vin2: video at e6ef2000 {
+			/* placeholder */
+		};
+
+		vin3: video at e6ef3000 {
+			/* placeholder */
+		};
+
+		vin4: video at e6ef4000 {
+			/* placeholder */
+		};
+
+		vin5: video at e6ef5000 {
+			/* placeholder */
+		};
+
+		vin6: video at e6ef6000 {
+			/* placeholder */
+		};
+
+		vin7: video at e6ef7000 {
+			/* placeholder */
+		};
+
+		ohci0: usb at ee080000 {
+			/* placeholder */
+		};
+
+		ehci0: usb at ee080100 {
+			/* placeholder */
+		};
+
+		usb2_phy0: usb-phy at ee080200 {
+			/* placeholder */
+		};
+
+		ohci1: usb at ee0a0000 {
+			/* placeholder */
+		};
+
+		ehci1: usb at ee0a0100 {
+			/* placeholder */
+		};
+
+		i2c0: i2c at e6500000 {
+			/* placeholder */
+		};
+
+		i2c1: i2c at e6508000 {
+			/* placeholder */
+		};
+
+		i2c2: i2c at e6510000 {
+			/* placeholder */
+		};
+
+		i2c3: i2c at e66d0000 {
+			/* placeholder */
+		};
+
+		i2c4: i2c at e66d8000 {
+			/* placeholder */
+		};
+
+		i2c5: i2c at e66e0000 {
+			/* placeholder */
+		};
+
+		i2c6: i2c at e66e8000 {
+			/* placeholder */
+		};
+
+		i2c_dvfs: i2c at e60b0000 {
+			/* placeholder */
+		};
+
+		pwm0: pwm at e6e30000 {
+			/* placeholder */
+		};
+
+		pwm1: pwm at e6e31000 {
+			/* placeholder */
+		};
+
+		pwm2: pwm at e6e32000 {
+			/* placeholder */
+		};
+
+		pwm3: pwm at e6e33000 {
+			/* placeholder */
+		};
+
+		pwm4: pwm at e6e34000 {
+			/* placeholder */
+		};
+
+		pwm5: pwm at e6e35000 {
+			/* placeholder */
+		};
+
+		pwm6: pwm at e6e36000 {
+			/* placeholder */
+		};
+
+		du: display at feb00000 {
+			/* placeholder */
+
+			ports {
+				port at 0 {
+					reg = <0>;
+					du_out_rgb: endpoint {
+					};
+				};
+				port at 1 {
+					reg = <1>;
+					du_out_hdmi0: endpoint {
+					};
+				};
+				port at 2 {
+					reg = <2>;
+					du_out_lvds0: endpoint {
+					};
+				};
+			};
+		};
+
+		hsusb: usb at e6590000 {
+			/* placeholder */
+		};
+
+		pciec0: pcie at fe000000 {
+			/* placeholder */
+		};
+
+		pciec1: pcie at ee800000 {
+			/* placeholder */
+		};
+
+		rcar_sound: sound at ec500000 {
+			/* placeholder */
+
+			rcar_sound,dvc {
+				dvc0: dvc-0 {
+				};
+				dvc1: dvc-1 {
+				};
+			};
+
+			rcar_sound,src {
+				src0: src-0 {
+				};
+				src1: src-1 {
+				};
+			};
+
+			rcar_sound,ssi {
+				ssi0: ssi-0 {
+				};
+				ssi1: ssi-1 {
+				};
+			};
+		};
+
+		usb2_phy1: usb-phy at ee0a0200 {
+			/* placeholder */
+		};
+
+		sdhi0: sd at ee100000 {
+			/* placeholder */
+		};
+
+		sdhi1: sd at ee120000 {
+			/* placeholder */
+		};
+
+		sdhi2: sd at ee140000 {
+			/* placeholder */
+		};
+
+		sdhi3: sd at ee160000 {
+			/* placeholder */
+		};
+
+		usb3_phy0: usb-phy at e65ee000 {
+			/* placeholder */
+		};
+
+		usb3_peri0: usb at ee020000 {
+			/* placeholder */
+		};
+
+		xhci0: usb at ee000000 {
+			/* placeholder */
+		};
+
+		wdt0: watchdog at e6020000 {
+			/* placeholder */
+		};
+	};
+};
-- 
2.7.4

[PATCH v2 08/19] ARM64: dts: Add Renesas R8A77965 SoC support

[Geert Uytterhoeven]

On Tue, Feb 20, 2018 at 4:12 PM, Jacopo Mondi <jacopo+renesas@jmondi.org> wrote:
> Basic support for the Gen 3 R-Car M3-N SoC.
>
> Based on original work from:
> Takeshi Kihara <takeshi.kihara.df@renesas.com>
> Magnus Damm <damm+renesas@opensource.se>
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH v2 08/19] ARM64: dts: Add Renesas R8A77965 SoC support

[Simon Horman]

On Tue, Feb 20, 2018 at 04:45:48PM +0100, Geert Uytterhoeven wrote:
> On Tue, Feb 20, 2018 at 4:12 PM, Jacopo Mondi <jacopo+renesas@jmondi.org> wrote:
> > Basic support for the Gen 3 R-Car M3-N SoC.
> >
> > Based on original work from:
> > Takeshi Kihara <takeshi.kihara.df@renesas.com>
> > Magnus Damm <damm+renesas@opensource.se>
> >
> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> 
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Thanks, applied with the patch subject updated to

arm64: dts: renesas: initial R8A77965 SoC device tree

Please use "arm64: dts: renesas:" as the prefix for Gen-3 DTS/DTSI patches.

[PATCH v2 09/19] ARM64: dts: Add R-Car Salvator-x M3-N support

[Jacopo Mondi]

Add basic support for R-Car Salvator-X M3-N (R8A77965) board.

Based on original work from:
Takeshi Kihara <takeshi.kihara.df@renesas.com>
Magnus Damm <damm+renesas@opensource.se>

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>

---
v1 -> v2:
- split from patch v1 [05/15]
- Remove "aliases" and "chosen" as they are defined already
- Fix license header
---
 arch/arm64/boot/dts/renesas/Makefile                |  1 +
 arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dts | 21 +++++++++++++++++++++
 2 files changed, 22 insertions(+)
 create mode 100644 arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dts

diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index 2186d01..3680ecd 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -7,5 +7,6 @@ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-kf.dtb
 dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb r8a7796-m3ulcb.dtb
 dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb
 dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb
+dtb-$(CONFIG_ARCH_R8A77965) += r8a77965-salvator-x.dtb
 dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle.dtb r8a77970-v3msk.dtb
 dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak.dtb
diff --git a/arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dts
new file mode 100644
index 0000000..75d890d
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dts
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the Salvator-X board with R-Car M3-N
+ *
+ * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
+ */
+
+/dts-v1/;
+#include "r8a77965.dtsi"
+#include "salvator-x.dtsi"
+
+/ {
+	model = "Renesas Salvator-X board based on r8a77965";
+	compatible = "renesas,salvator-x", "renesas,r8a77965";
+
+	memory at 48000000 {
+		device_type = "memory";
+		/* first 128MB is reserved for secure area. */
+		reg = <0x0 0x48000000 0x0 0x78000000>;
+	};
+};
-- 
2.7.4

[PATCH v2 09/19] ARM64: dts: Add R-Car Salvator-x M3-N support

[Geert Uytterhoeven]

On Tue, Feb 20, 2018 at 4:12 PM, Jacopo Mondi <jacopo+renesas@jmondi.org> wrote:
> Add basic support for R-Car Salvator-X M3-N (R8A77965) board.
>
> Based on original work from:
> Takeshi Kihara <takeshi.kihara.df@renesas.com>
> Magnus Damm <damm+renesas@opensource.se>
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH v2 09/19] ARM64: dts: Add R-Car Salvator-x M3-N support

[Simon Horman]

On Tue, Feb 20, 2018 at 04:46:23PM +0100, Geert Uytterhoeven wrote:
> On Tue, Feb 20, 2018 at 4:12 PM, Jacopo Mondi <jacopo+renesas@jmondi.org> wrote:
> > Add basic support for R-Car Salvator-X M3-N (R8A77965) board.
> >
> > Based on original work from:
> > Takeshi Kihara <takeshi.kihara.df@renesas.com>
> > Magnus Damm <damm+renesas@opensource.se>
> >
> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> 
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Thanks, applied with prefix updated to

"arm64: dts: renesas:"

There was some fuzz applying this patch, the result is as follows.

From: Jacopo Mondi <jacopo+renesas@jmondi.org>
Subject: [PATCH] arm64: dts: renesas: Add R-Car Salvator-x M3-N support

Add basic support for R-Car Salvator-X M3-N (R8A77965) board.

Based on original work from:
Takeshi Kihara <takeshi.kihara.df@renesas.com>
Magnus Damm <damm+renesas@opensource.se>

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm64/boot/dts/renesas/Makefile                |  1 +
 arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dts | 21 +++++++++++++++++++++
 2 files changed, 22 insertions(+)
 create mode 100644 arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dts

diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index c885eef4e660..9ea5ec0daeba 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -7,6 +7,7 @@ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-kf.dtb
 dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb r8a7796-m3ulcb.dtb
 dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb
 dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb
+dtb-$(CONFIG_ARCH_R8A77965) += r8a77965-salvator-x.dtb
 dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle.dtb r8a77970-v3msk.dtb
 dtb-$(CONFIG_ARCH_R8A77980) += r8a77980-condor.dtb
 dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak.dtb
diff --git a/arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dts
new file mode 100644
index 000000000000..75d890d91df9
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dts
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the Salvator-X board with R-Car M3-N
+ *
+ * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
+ */
+
+/dts-v1/;
+#include "r8a77965.dtsi"
+#include "salvator-x.dtsi"
+
+/ {
+	model = "Renesas Salvator-X board based on r8a77965";
+	compatible = "renesas,salvator-x", "renesas,r8a77965";
+
+	memory at 48000000 {
+		device_type = "memory";
+		/* first 128MB is reserved for secure area. */
+		reg = <0x0 0x48000000 0x0 0x78000000>;
+	};
+};
-- 
2.11.0

[PATCH v2 09/19] ARM64: dts: Add R-Car Salvator-x M3-N support

[Arnd Bergmann]

On Wed, Feb 21, 2018 at 6:15 PM, Simon Horman <horms@verge.net.au> wrote:
> On Tue, Feb 20, 2018 at 04:46:23PM +0100, Geert Uytterhoeven wrote:
>> On Tue, Feb 20, 2018 at 4:12 PM, Jacopo Mondi <jacopo+renesas@jmondi.org> wrote:
>> > Add basic support for R-Car Salvator-X M3-N (R8A77965) board.
>> >
>> > Based on original work from:
>> > Takeshi Kihara <takeshi.kihara.df@renesas.com>
>> > Magnus Damm <damm+renesas@opensource.se>
>> >
>> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
>>
>> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> Thanks, applied with prefix updated to
>
> "arm64: dts: renesas:"
>
> There was some fuzz applying this patch, the result is as follows.
>
> From: Jacopo Mondi <jacopo+renesas@jmondi.org>
> Subject: [PATCH] arm64: dts: renesas: Add R-Car Salvator-x M3-N support
>
> Add basic support for R-Car Salvator-X M3-N (R8A77965) board.
>
> Based on original work from:
> Takeshi Kihara <takeshi.kihara.df@renesas.com>
> Magnus Damm <damm+renesas@opensource.se>
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Something went wrong with this patch, I suspect it's missing some prerequisites
that fill in a few more device nodes to avoid these warnings in linux-next:

arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(reg_format): "reg" property in /soc/ethernet at e6800000/ethernet-phy at 0
has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(reg_format): "reg" property in /soc/i2c at e6510000/codec at 10 has invalid
length (4 bytes) (#address-cells == 2, #size-cells == 1)
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(reg_format): "reg" property in /soc/i2c at e6510000/clk_multiplier at 4f
has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(reg_format): "reg" property in /soc/i2c at e66d8000/gpio at 20 has invalid
length (4 bytes) (#address-cells == 2, #size-cells == 1)
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(reg_format): "reg" property in /soc/i2c at e66d8000/adc at 7c has invalid
length (4 bytes) (#address-cells == 2, #size-cells == 1)
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(reg_format): "reg" property in /soc/i2c at e66d8000/adc at 7f has invalid
length (4 bytes) (#address-cells == 2, #size-cells == 1)
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(reg_format): "reg" property in /soc/i2c at e66d8000/clock-generator at 6a
has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(reg_format): "reg" property in /soc/i2c at e60b0000/pmic at 30 has invalid
length (4 bytes) (#address-cells == 2, #size-cells == 1)
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(reg_format): "reg" property in /soc/display at feb00000/ports/port at 0 has
invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(reg_format): "reg" property in /soc/display at feb00000/ports/port at 1 has
invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(reg_format): "reg" property in /soc/display at feb00000/ports/port at 2 has
invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(avoid_default_addr_size): Relying on default #address-cells value for
/soc/ethernet at e6800000/ethernet-phy at 0
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(avoid_default_addr_size): Relying on default #size-cells value for
/soc/ethernet at e6800000/ethernet-phy at 0
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(avoid_default_addr_size): Relying on default #address-cells value for
/soc/i2c at e6510000/codec at 10
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(avoid_default_addr_size): Relying on default #size-cells value for
/soc/i2c at e6510000/codec at 10
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(avoid_default_addr_size): Relying on default #address-cells value for
/soc/i2c at e6510000/clk_multiplier at 4f
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(avoid_default_addr_size): Relying on default #size-cells value for
/soc/i2c at e6510000/clk_multiplier at 4f
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(avoid_default_addr_size): Relying on default #address-cells value for
/soc/i2c at e66d8000/gpio at 20
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(avoid_default_addr_size): Relying on default #size-cells value for
/soc/i2c at e66d8000/gpio at 20
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(avoid_default_addr_size): Relying on default #address-cells value for
/soc/i2c at e66d8000/adc at 7c
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(avoid_default_addr_size): Relying on default #size-cells value for
/soc/i2c at e66d8000/adc at 7c
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(avoid_default_addr_size): Relying on default #address-cells value for
/soc/i2c at e66d8000/adc at 7f
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(avoid_default_addr_size): Relying on default #size-cells value for
/soc/i2c at e66d8000/adc at 7f
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(avoid_default_addr_size): Relying on default #address-cells value for
/soc/i2c at e66d8000/clock-generator at 6a
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(avoid_default_addr_size): Relying on default #size-cells value for
/soc/i2c at e66d8000/clock-generator at 6a
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(avoid_default_addr_size): Relying on default #address-cells value for
/soc/i2c at e60b0000/pmic at 30
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(avoid_default_addr_size): Relying on default #size-cells value for
/soc/i2c at e60b0000/pmic at 30
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(avoid_default_addr_size): Relying on default #address-cells value for
/soc/display at feb00000/ports/port at 0
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(avoid_default_addr_size): Relying on default #size-cells value for
/soc/display at feb00000/ports/port at 0
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(avoid_default_addr_size): Relying on default #address-cells value for
/soc/display at feb00000/ports/port at 1
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(avoid_default_addr_size): Relying on default #size-cells value for
/soc/display at feb00000/ports/port at 1
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(avoid_default_addr_size): Relying on default #address-cells value for
/soc/display at feb00000/ports/port at 2
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(avoid_default_addr_size): Relying on default #size-cells value for
/soc/display at feb00000/ports/port at 2
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(phys_property): Missing property '#phy-cells' in node
/soc/usb-phy at e65ee000 or bad phandle (referred from
/soc/usb at ee020000:phys[0])
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(pwms_property): Missing property '#pwm-cells' in node
/soc/pwm at e6e31000 or bad phandle (referred from /backlight:pwms[0])
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(interrupts_property): Missing interrupt-controller or interrupt-map
property in /soc/interrupt-controller at e61c0000
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
(interrupts_property): Missing #interrupt-cells in interrupt-parent
/soc/interrupt-controller at e61c0000

Maybe just take out the patch adding the .dts file for the time being until
the important nodes are all in place?

        Arnd

[PATCH v2 09/19] ARM64: dts: Add R-Car Salvator-x M3-N support

[Geert Uytterhoeven]

Hi Arnd,

On Thu, Feb 22, 2018 at 12:39 PM, Arnd Bergmann <arnd@arndb.de> wrote:
> On Wed, Feb 21, 2018 at 6:15 PM, Simon Horman <horms@verge.net.au> wrote:
>> On Tue, Feb 20, 2018 at 04:46:23PM +0100, Geert Uytterhoeven wrote:
>>> On Tue, Feb 20, 2018 at 4:12 PM, Jacopo Mondi <jacopo+renesas@jmondi.org> wrote:
>>> > Add basic support for R-Car Salvator-X M3-N (R8A77965) board.
>>> >
>>> > Based on original work from:
>>> > Takeshi Kihara <takeshi.kihara.df@renesas.com>
>>> > Magnus Damm <damm+renesas@opensource.se>
>>> >
>>> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
>>>
>>> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>>
>> Thanks, applied with prefix updated to
>>
>> "arm64: dts: renesas:"
>>
>> There was some fuzz applying this patch, the result is as follows.
>>
>> From: Jacopo Mondi <jacopo+renesas@jmondi.org>
>> Subject: [PATCH] arm64: dts: renesas: Add R-Car Salvator-x M3-N support
>>
>> Add basic support for R-Car Salvator-X M3-N (R8A77965) board.
>>
>> Based on original work from:
>> Takeshi Kihara <takeshi.kihara.df@renesas.com>
>> Magnus Damm <damm+renesas@opensource.se>
>>
>> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
>> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> Something went wrong with this patch, I suspect it's missing some prerequisites
> that fill in a few more device nodes to avoid these warnings in linux-next:
>
> arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
> (reg_format): "reg" property in /soc/ethernet at e6800000/ethernet-phy at 0
> has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)

[...]

> Maybe just take out the patch adding the .dts file for the time being until
> the important nodes are all in place?

Removing the .dts file removes the ability to boot the newly added board...

The issue here is that we are sharing board .dtsi for boards that can be
equipped with different pin-compatible SiPs (Ri-Car H3, M3-W, M3-N), while
not all SoC support has been enabled and/or tested. As the board .dtsi
references on-SoC devices using phandles, the new r8a77965.dtsi declares
placeholders for the devices that are not yet enabled/tested.
This worked fine for r8a7796.dtsi before, but causes dtc warnings due to
recent improvements in DT validation.

I think the simplest way to fix this is to add reg properties to the
placeholders, as Simon did for the last two placeholders in r8a7796.dtsi in
commit 4316989537a6ed53 ("arm64: dts: renesas: r8a7796: add reg properties to
pciec[01] nodes").

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH v2 09/19] ARM64: dts: Add R-Car Salvator-x M3-N support

[Simon Horman]

On Thu, Feb 22, 2018 at 02:28:46PM +0100, Geert Uytterhoeven wrote:
> Hi Arnd,
> 
> On Thu, Feb 22, 2018 at 12:39 PM, Arnd Bergmann <arnd@arndb.de> wrote:
> > On Wed, Feb 21, 2018 at 6:15 PM, Simon Horman <horms@verge.net.au> wrote:
> >> On Tue, Feb 20, 2018 at 04:46:23PM +0100, Geert Uytterhoeven wrote:
> >>> On Tue, Feb 20, 2018 at 4:12 PM, Jacopo Mondi <jacopo+renesas@jmondi.org> wrote:
> >>> > Add basic support for R-Car Salvator-X M3-N (R8A77965) board.
> >>> >
> >>> > Based on original work from:
> >>> > Takeshi Kihara <takeshi.kihara.df@renesas.com>
> >>> > Magnus Damm <damm+renesas@opensource.se>
> >>> >
> >>> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> >>>
> >>> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> >>
> >> Thanks, applied with prefix updated to
> >>
> >> "arm64: dts: renesas:"
> >>
> >> There was some fuzz applying this patch, the result is as follows.
> >>
> >> From: Jacopo Mondi <jacopo+renesas@jmondi.org>
> >> Subject: [PATCH] arm64: dts: renesas: Add R-Car Salvator-x M3-N support
> >>
> >> Add basic support for R-Car Salvator-X M3-N (R8A77965) board.
> >>
> >> Based on original work from:
> >> Takeshi Kihara <takeshi.kihara.df@renesas.com>
> >> Magnus Damm <damm+renesas@opensource.se>
> >>
> >> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> >> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> >
> > Something went wrong with this patch, I suspect it's missing some prerequisites
> > that fill in a few more device nodes to avoid these warnings in linux-next:
> >
> > arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning
> > (reg_format): "reg" property in /soc/ethernet at e6800000/ethernet-phy at 0
> > has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
> 
> [...]
> 
> > Maybe just take out the patch adding the .dts file for the time being until
> > the important nodes are all in place?
> 
> Removing the .dts file removes the ability to boot the newly added board...
> 
> The issue here is that we are sharing board .dtsi for boards that can be
> equipped with different pin-compatible SiPs (Ri-Car H3, M3-W, M3-N), while
> not all SoC support has been enabled and/or tested. As the board .dtsi
> references on-SoC devices using phandles, the new r8a77965.dtsi declares
> placeholders for the devices that are not yet enabled/tested.
> This worked fine for r8a7796.dtsi before, but causes dtc warnings due to
> recent improvements in DT validation.
> 
> I think the simplest way to fix this is to add reg properties to the
> placeholders, as Simon did for the last two placeholders in r8a7796.dtsi in
> commit 4316989537a6ed53 ("arm64: dts: renesas: r8a7796: add reg properties to
> pciec[01] nodes").

Hi Arnd,

Sorry for letting this slip through.

I think the best solution is an incremental patch on top of the renesas
devel branch to, as Geert suggests, add reg properties to the placeholders.

I've asked Jacopo to prepare such a patch.

[PATCH v2 09/19] ARM64: dts: Add R-Car Salvator-x M3-N support

[Arnd Bergmann]

On Thu, Feb 22, 2018 at 4:38 PM, Simon Horman <horms@verge.net.au> wrote:
> On Thu, Feb 22, 2018 at 02:28:46PM +0100, Geert Uytterhoeven wrote:

>> Removing the .dts file removes the ability to boot the newly added board...
>>
>> The issue here is that we are sharing board .dtsi for boards that can be
>> equipped with different pin-compatible SiPs (Ri-Car H3, M3-W, M3-N), while
>> not all SoC support has been enabled and/or tested. As the board .dtsi
>> references on-SoC devices using phandles, the new r8a77965.dtsi declares
>> placeholders for the devices that are not yet enabled/tested.
>> This worked fine for r8a7796.dtsi before, but causes dtc warnings due to
>> recent improvements in DT validation.
>>
>> I think the simplest way to fix this is to add reg properties to the
>> placeholders, as Simon did for the last two placeholders in r8a7796.dtsi in
>> commit 4316989537a6ed53 ("arm64: dts: renesas: r8a7796: add reg properties to
>> pciec[01] nodes").
>
> I think the best solution is an incremental patch on top of the renesas
> devel branch to, as Geert suggests, add reg properties to the placeholders.
>
> I've asked Jacopo to prepare such a patch.

Sounds good, thanks a lot for the quick reply!

     Arnd

[PATCH v2 10/19] dt-bindings: dmaengine: rcar-dmac: document R8A77965 support

[Jacopo Mondi]

Add documentation for r8a77965 compatible string to rcar-dmac device
tree bindings documentation.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
---
 Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt b/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt
index 2f5167d..b7f3e60 100644
--- a/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt
+++ b/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt
@@ -25,6 +25,7 @@ Required Properties:
 		- "renesas,dmac-r8a7794" (R-Car E2)
 		- "renesas,dmac-r8a7795" (R-Car H3)
 		- "renesas,dmac-r8a7796" (R-Car M3-W)
+		- "renesas,dmac-r8a77965" (R-Car M3-N)
 		- "renesas,dmac-r8a77970" (R-Car V3M)
 		- "renesas,dmac-r8a77980" (R-Car V3H)
 
-- 
2.7.4

[PATCH v2 10/19] dt-bindings: dmaengine: rcar-dmac: document R8A77965 support

[Rob Herring]

On Tue, Feb 20, 2018 at 04:12:12PM +0100, Jacopo Mondi wrote:
> Add documentation for r8a77965 compatible string to rcar-dmac device
> tree bindings documentation.
> 
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
> ---
>  Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt | 1 +
>  1 file changed, 1 insertion(+)

Reviewed-by: Rob Herring <robh@kernel.org>

[PATCH v2 10/19] dt-bindings: dmaengine: rcar-dmac: document R8A77965 support

[Geert Uytterhoeven]

Hi Jacopo,

On Tue, Feb 20, 2018 at 4:12 PM, Jacopo Mondi <jacopo+renesas@jmondi.org> wrote:
> Add documentation for r8a77965 compatible string to rcar-dmac device
> tree bindings documentation.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Can you please resend to the DMA engine maintainer?
Thanks!

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH v2 11/19] ARM64: dts: r8a77965: Add dmac device nods

[Jacopo Mondi]

Add dmac[0-2] device nodes for R-Car M3-N (r8a77965) SoC.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm64/boot/dts/renesas/r8a77965.dtsi | 96 ++++++++++++++++++++++++++++++-
 1 file changed, 93 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 6b6ec65..b83dafc 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -233,15 +233,105 @@
 		};
 
 		dmac0: dma-controller at e6700000 {
-			/* placeholder */
+			compatible = "renesas,dmac-r8a77965",
+				     "renesas,rcar-dmac";
+			reg = <0 0xe6700000 0 0x10000>;
+			interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "error",
+					"ch0", "ch1", "ch2", "ch3",
+					"ch4", "ch5", "ch6", "ch7",
+					"ch8", "ch9", "ch10", "ch11",
+					"ch12", "ch13", "ch14", "ch15";
+			clocks = <&cpg CPG_MOD 219>;
+			clock-names = "fck";
+			power-domains = <&sysc 32>;
+			resets = <&cpg 219>;
+			#dma-cells = <1>;
+			dma-channels = <16>;
 		};
 
 		dmac1: dma-controller at e7300000 {
-			/* placeholder */
+			compatible = "renesas,dmac-r8a77965",
+				     "renesas,rcar-dmac";
+			reg = <0 0xe7300000 0 0x10000>;
+			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "error",
+					"ch0", "ch1", "ch2", "ch3",
+					"ch4", "ch5", "ch6", "ch7",
+					"ch8", "ch9", "ch10", "ch11",
+					"ch12", "ch13", "ch14", "ch15";
+			clocks = <&cpg CPG_MOD 218>;
+			clock-names = "fck";
+			power-domains = <&sysc 32>;
+			resets = <&cpg 218>;
+			#dma-cells = <1>;
+			dma-channels = <16>;
 		};
 
 		dmac2: dma-controller at e7310000 {
-			/* placeholder */
+			compatible = "renesas,dmac-r8a77965",
+				     "renesas,rcar-dmac";
+			reg = <0 0xe7310000 0 0x10000>;
+			interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "error",
+					"ch0", "ch1", "ch2", "ch3",
+					"ch4", "ch5", "ch6", "ch7",
+					"ch8", "ch9", "ch10", "ch11",
+					"ch12", "ch13", "ch14", "ch15";
+			clocks = <&cpg CPG_MOD 217>;
+			clock-names = "fck";
+			power-domains = <&sysc 32>;
+			resets = <&cpg 217>;
+			#dma-cells = <1>;
+			dma-channels = <16>;
 		};
 
 		scif0: serial at e6e60000 {
-- 
2.7.4

[PATCH v2 11/19] ARM64: dts: r8a77965: Add dmac device nods

[Simon Horman]

On Tue, Feb 20, 2018 at 04:12:13PM +0100, Jacopo Mondi wrote:
> Add dmac[0-2] device nodes for R-Car M3-N (r8a77965) SoC.
> 
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Thanks, applied with prefix updated to:

arm64: dts: renesas: r8a77965:

[PATCH v2 12/19] dt-bindings: serial: sh-sci: Add support for r8a77965 (H)SCIF

[Jacopo Mondi]

Add documentation for r8a77965 compatible string to Renesas sci-serial
device tree bindings documentation.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
 Documentation/devicetree/bindings/serial/renesas,sci-serial.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
index cf504d0..88f947c 100644
--- a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
+++ b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
@@ -41,6 +41,8 @@ Required properties:
     - "renesas,hscif-r8a7795" for R8A7795 (R-Car H3) HSCIF compatible UART.
     - "renesas,scif-r8a7796" for R8A7796 (R-Car M3-W) SCIF compatible UART.
     - "renesas,hscif-r8a7796" for R8A7796 (R-Car M3-W) HSCIF compatible UART.
+    - "renesas,scif-r8a77965" for R8A77965 (R-Car M3-N) SCIF compatible UART.
+    - "renesas,hscif-r8a77965" for R8A77965 (R-Car M3-N) HSCIF compatible UART.
     - "renesas,scif-r8a77970" for R8A77970 (R-Car V3M) SCIF compatible UART.
     - "renesas,hscif-r8a77970" for R8A77970 (R-Car V3M) HSCIF compatible UART.
     - "renesas,scif-r8a77995" for R8A77995 (R-Car D3) SCIF compatible UART.
-- 
2.7.4

[PATCH v2 12/19] dt-bindings: serial: sh-sci: Add support for r8a77965 (H)SCIF

[Geert Uytterhoeven]

On Tue, Feb 20, 2018 at 4:12 PM, Jacopo Mondi <jacopo+renesas@jmondi.org> wrote:
> Add documentation for r8a77965 compatible string to Renesas sci-serial
> device tree bindings documentation.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH v2 12/19] dt-bindings: serial: sh-sci: Add support for r8a77965 (H)SCIF

[Simon Horman]

On Tue, Feb 20, 2018 at 04:12:14PM +0100, Jacopo Mondi wrote:
> Add documentation for r8a77965 compatible string to Renesas sci-serial
> device tree bindings documentation.
> 
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

[PATCH v2 12/19] dt-bindings: serial: sh-sci: Add support for r8a77965 (H)SCIF

[Rob Herring]

On Tue, Feb 20, 2018 at 04:12:14PM +0100, Jacopo Mondi wrote:
> Add documentation for r8a77965 compatible string to Renesas sci-serial
> device tree bindings documentation.
> 
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> ---
>  Documentation/devicetree/bindings/serial/renesas,sci-serial.txt | 2 ++
>  1 file changed, 2 insertions(+)

Reviewed-by: Rob Herring <robh@kernel.org>

[PATCH v2 13/19] pinctrl: sh-pfc: r8a77965: Add SCIFs groups/functions

[Jacopo Mondi]

Add SCIF[0-5] groups and pin function definitions for R-Car M3-N.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

---
v1 -> v2:
- Remove _TANS
---
 drivers/pinctrl/sh-pfc/pfc-r8a77965.c | 296 ++++++++++++++++++++++++++++++++++
 1 file changed, 296 insertions(+)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77965.c b/drivers/pinctrl/sh-pfc/pfc-r8a77965.c
index 53fe4ec..43ffd63 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a77965.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a77965.c
@@ -1571,10 +1571,306 @@ static const struct sh_pfc_pin pinmux_pins[] = {
 	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 30, ASEBRK, CFG_FLAGS),
 };
 
+/* - SCIF0 ------------------------------------------------------------------ */
+static const unsigned int scif0_data_pins[] = {
+	/* RX, TX */
+	RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2),
+};
+static const unsigned int scif0_data_mux[] = {
+	RX0_MARK, TX0_MARK,
+};
+static const unsigned int scif0_clk_pins[] = {
+	/* SCK */
+	RCAR_GP_PIN(5, 0),
+};
+static const unsigned int scif0_clk_mux[] = {
+	SCK0_MARK,
+};
+static const unsigned int scif0_ctrl_pins[] = {
+	/* RTS, CTS */
+	RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 3),
+};
+static const unsigned int scif0_ctrl_mux[] = {
+	RTS0_N_MARK, CTS0_N_MARK,
+};
+/* - SCIF1 ------------------------------------------------------------------ */
+static const unsigned int scif1_data_a_pins[] = {
+	/* RX, TX */
+	RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6),
+};
+static const unsigned int scif1_data_a_mux[] = {
+	RX1_A_MARK, TX1_A_MARK,
+};
+static const unsigned int scif1_clk_pins[] = {
+	/* SCK */
+	RCAR_GP_PIN(6, 21),
+};
+static const unsigned int scif1_clk_mux[] = {
+	SCK1_MARK,
+};
+static const unsigned int scif1_ctrl_pins[] = {
+	/* RTS, CTS */
+	RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 7),
+};
+static const unsigned int scif1_ctrl_mux[] = {
+	RTS1_N_MARK, CTS1_N_MARK,
+};
+static const unsigned int scif1_data_b_pins[] = {
+	/* RX, TX */
+	RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25),
+};
+static const unsigned int scif1_data_b_mux[] = {
+	RX1_B_MARK, TX1_B_MARK,
+};
+/* - SCIF2 ------------------------------------------------------------------ */
+static const unsigned int scif2_data_a_pins[] = {
+	/* RX, TX */
+	RCAR_GP_PIN(5, 11), RCAR_GP_PIN(5, 10),
+};
+static const unsigned int scif2_data_a_mux[] = {
+	RX2_A_MARK, TX2_A_MARK,
+};
+static const unsigned int scif2_clk_pins[] = {
+	/* SCK */
+	RCAR_GP_PIN(5, 9),
+};
+static const unsigned int scif2_clk_mux[] = {
+	SCK2_MARK,
+};
+static const unsigned int scif2_data_b_pins[] = {
+	/* RX, TX */
+	RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 16),
+};
+static const unsigned int scif2_data_b_mux[] = {
+	RX2_B_MARK, TX2_B_MARK,
+};
+/* - SCIF3 ------------------------------------------------------------------ */
+static const unsigned int scif3_data_a_pins[] = {
+	/* RX, TX */
+	RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24),
+};
+static const unsigned int scif3_data_a_mux[] = {
+	RX3_A_MARK, TX3_A_MARK,
+};
+static const unsigned int scif3_clk_pins[] = {
+	/* SCK */
+	RCAR_GP_PIN(1, 22),
+};
+static const unsigned int scif3_clk_mux[] = {
+	SCK3_MARK,
+};
+static const unsigned int scif3_ctrl_pins[] = {
+	/* RTS, CTS */
+	RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25),
+};
+static const unsigned int scif3_ctrl_mux[] = {
+	RTS3_N_MARK, CTS3_N_MARK,
+};
+static const unsigned int scif3_data_b_pins[] = {
+	/* RX, TX */
+	RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 11),
+};
+static const unsigned int scif3_data_b_mux[] = {
+	RX3_B_MARK, TX3_B_MARK,
+};
+/* - SCIF4 ------------------------------------------------------------------ */
+static const unsigned int scif4_data_a_pins[] = {
+	/* RX, TX */
+	RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 12),
+};
+static const unsigned int scif4_data_a_mux[] = {
+	RX4_A_MARK, TX4_A_MARK,
+};
+static const unsigned int scif4_clk_a_pins[] = {
+	/* SCK */
+	RCAR_GP_PIN(2, 10),
+};
+static const unsigned int scif4_clk_a_mux[] = {
+	SCK4_A_MARK,
+};
+static const unsigned int scif4_ctrl_a_pins[] = {
+	/* RTS, CTS */
+	RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 13),
+};
+static const unsigned int scif4_ctrl_a_mux[] = {
+	RTS4_N_A_MARK, CTS4_N_A_MARK,
+};
+static const unsigned int scif4_data_b_pins[] = {
+	/* RX, TX */
+	RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
+};
+static const unsigned int scif4_data_b_mux[] = {
+	RX4_B_MARK, TX4_B_MARK,
+};
+static const unsigned int scif4_clk_b_pins[] = {
+	/* SCK */
+	RCAR_GP_PIN(1, 5),
+};
+static const unsigned int scif4_clk_b_mux[] = {
+	SCK4_B_MARK,
+};
+static const unsigned int scif4_ctrl_b_pins[] = {
+	/* RTS, CTS */
+	RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 9),
+};
+static const unsigned int scif4_ctrl_b_mux[] = {
+	RTS4_N_B_MARK, CTS4_N_B_MARK,
+};
+static const unsigned int scif4_data_c_pins[] = {
+	/* RX, TX */
+	RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13),
+};
+static const unsigned int scif4_data_c_mux[] = {
+	RX4_C_MARK, TX4_C_MARK,
+};
+static const unsigned int scif4_clk_c_pins[] = {
+	/* SCK */
+	RCAR_GP_PIN(0, 8),
+};
+static const unsigned int scif4_clk_c_mux[] = {
+	SCK4_C_MARK,
+};
+static const unsigned int scif4_ctrl_c_pins[] = {
+	/* RTS, CTS */
+	RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10),
+};
+static const unsigned int scif4_ctrl_c_mux[] = {
+	RTS4_N_C_MARK, CTS4_N_C_MARK,
+};
+/* - SCIF5 ------------------------------------------------------------------ */
+static const unsigned int scif5_data_a_pins[] = {
+	/* RX, TX */
+	RCAR_GP_PIN(5, 19), RCAR_GP_PIN(5, 21),
+};
+static const unsigned int scif5_data_a_mux[] = {
+	RX5_A_MARK, TX5_A_MARK,
+};
+static const unsigned int scif5_clk_a_pins[] = {
+	/* SCK */
+	RCAR_GP_PIN(6, 21),
+};
+static const unsigned int scif5_clk_a_mux[] = {
+	SCK5_A_MARK,
+};
+static const unsigned int scif5_data_b_pins[] = {
+	/* RX, TX */
+	RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 18),
+};
+static const unsigned int scif5_data_b_mux[] = {
+	RX5_B_MARK, TX5_B_MARK,
+};
+static const unsigned int scif5_clk_b_pins[] = {
+	/* SCK */
+	RCAR_GP_PIN(5, 0),
+};
+static const unsigned int scif5_clk_b_mux[] = {
+	SCK5_B_MARK,
+};
+/* - SCIF Clock ------------------------------------------------------------- */
+static const unsigned int scif_clk_a_pins[] = {
+	/* SCIF_CLK */
+	RCAR_GP_PIN(6, 23),
+};
+static const unsigned int scif_clk_a_mux[] = {
+	SCIF_CLK_A_MARK,
+};
+static const unsigned int scif_clk_b_pins[] = {
+	/* SCIF_CLK */
+	RCAR_GP_PIN(5, 9),
+};
+static const unsigned int scif_clk_b_mux[] = {
+	SCIF_CLK_B_MARK,
+};
+
 static const struct sh_pfc_pin_group pinmux_groups[] = {
+	SH_PFC_PIN_GROUP(scif0_data),
+	SH_PFC_PIN_GROUP(scif0_clk),
+	SH_PFC_PIN_GROUP(scif0_ctrl),
+	SH_PFC_PIN_GROUP(scif1_data_a),
+	SH_PFC_PIN_GROUP(scif1_clk),
+	SH_PFC_PIN_GROUP(scif1_ctrl),
+	SH_PFC_PIN_GROUP(scif1_data_b),
+	SH_PFC_PIN_GROUP(scif2_data_a),
+	SH_PFC_PIN_GROUP(scif2_clk),
+	SH_PFC_PIN_GROUP(scif2_data_b),
+	SH_PFC_PIN_GROUP(scif3_data_a),
+	SH_PFC_PIN_GROUP(scif3_clk),
+	SH_PFC_PIN_GROUP(scif3_ctrl),
+	SH_PFC_PIN_GROUP(scif3_data_b),
+	SH_PFC_PIN_GROUP(scif4_data_a),
+	SH_PFC_PIN_GROUP(scif4_clk_a),
+	SH_PFC_PIN_GROUP(scif4_ctrl_a),
+	SH_PFC_PIN_GROUP(scif4_data_b),
+	SH_PFC_PIN_GROUP(scif4_clk_b),
+	SH_PFC_PIN_GROUP(scif4_ctrl_b),
+	SH_PFC_PIN_GROUP(scif4_data_c),
+	SH_PFC_PIN_GROUP(scif4_clk_c),
+	SH_PFC_PIN_GROUP(scif4_ctrl_c),
+	SH_PFC_PIN_GROUP(scif5_data_a),
+	SH_PFC_PIN_GROUP(scif5_clk_a),
+	SH_PFC_PIN_GROUP(scif5_data_b),
+	SH_PFC_PIN_GROUP(scif5_clk_b),
+	SH_PFC_PIN_GROUP(scif_clk_a),
+	SH_PFC_PIN_GROUP(scif_clk_b),
+};
+
+static const char * const scif0_groups[] = {
+	"scif0_data",
+	"scif0_clk",
+	"scif0_ctrl",
+};
+
+static const char * const scif1_groups[] = {
+	"scif1_data_a",
+	"scif1_clk",
+	"scif1_ctrl",
+	"scif1_data_b",
+};
+static const char * const scif2_groups[] = {
+	"scif2_data_a",
+	"scif2_clk",
+	"scif2_data_b",
+};
+
+static const char * const scif3_groups[] = {
+	"scif3_data_a",
+	"scif3_clk",
+	"scif3_ctrl",
+	"scif3_data_b",
+};
+
+static const char * const scif4_groups[] = {
+	"scif4_data_a",
+	"scif4_clk_a",
+	"scif4_ctrl_a",
+	"scif4_data_b",
+	"scif4_clk_b",
+	"scif4_ctrl_b",
+	"scif4_data_c",
+	"scif4_clk_c",
+	"scif4_ctrl_c",
+};
+
+static const char * const scif5_groups[] = {
+	"scif5_data_a",
+	"scif5_clk_a",
+	"scif5_data_b",
+	"scif5_clk_b",
+};
+
+static const char * const scif_clk_groups[] = {
+	"scif_clk_a",
+	"scif_clk_b",
 };
 
 static const struct sh_pfc_function pinmux_functions[] = {
+	SH_PFC_FUNCTION(scif0),
+	SH_PFC_FUNCTION(scif1),
+	SH_PFC_FUNCTION(scif2),
+	SH_PFC_FUNCTION(scif3),
+	SH_PFC_FUNCTION(scif4),
+	SH_PFC_FUNCTION(scif5),
+	SH_PFC_FUNCTION(scif_clk),
 };
 
 static const struct pinmux_cfg_reg pinmux_config_regs[] = {
-- 
2.7.4

[PATCH v2 13/19] pinctrl: sh-pfc: r8a77965: Add SCIFs groups/functions

[Geert Uytterhoeven]

On Tue, Feb 20, 2018 at 4:12 PM, Jacopo Mondi <jacopo+renesas@jmondi.org> wrote:
> Add SCIF[0-5] groups and pin function definitions for R-Car M3-N.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Queueing in sh-pfc-for-v4.17.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH v2 15/19] dt-bindings: gpio: Add support for r8a77965

[Jacopo Mondi]

Add compatible string for R-Car M3-N (r8a77965) in gpio-rcar.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

---
v1 -> v2:
- Drop SoC-specific compatible string from drivers/gpio/gpio-rcar.c
- Change patch subject to reflect it only changes dt bindings
---
 Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
index 9474138..f2af897 100644
--- a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
+++ b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
@@ -14,6 +14,7 @@ Required Properties:
     - "renesas,gpio-r8a7794": for R8A7794 (R-Car E2) compatible GPIO controller.
     - "renesas,gpio-r8a7795": for R8A7795 (R-Car H3) compatible GPIO controller.
     - "renesas,gpio-r8a7796": for R8A7796 (R-Car M3-W) compatible GPIO controller.
+    - "renesas,gpio-r8a77965": for R8A77965 (R-Car M3-N) compatible GPIO controller.
     - "renesas,gpio-r8a77970": for R8A77970 (R-Car V3M) compatible GPIO controller.
     - "renesas,gpio-r8a77995": for R8A77995 (R-Car D3) compatible GPIO controller.
     - "renesas,rcar-gen1-gpio": for a generic R-Car Gen1 GPIO controller.
-- 
2.7.4

[PATCH v2 15/19] dt-bindings: gpio: Add support for r8a77965

[Simon Horman]

On Tue, Feb 20, 2018 at 04:12:17PM +0100, Jacopo Mondi wrote:
> Add compatible string for R-Car M3-N (r8a77965) in gpio-rcar.
> 
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

[PATCH v2 15/19] dt-bindings: gpio: Add support for r8a77965

[Rob Herring]

On Tue, Feb 20, 2018 at 04:12:17PM +0100, Jacopo Mondi wrote:
> Add compatible string for R-Car M3-N (r8a77965) in gpio-rcar.
> 
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> 
> ---
> v1 -> v2:
> - Drop SoC-specific compatible string from drivers/gpio/gpio-rcar.c
> - Change patch subject to reflect it only changes dt bindings
> ---
>  Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt | 1 +
>  1 file changed, 1 insertion(+)

Reviewed-by: Rob Herring <robh@kernel.org>

[PATCH v2 15/19] dt-bindings: gpio: Add support for r8a77965

[Geert Uytterhoeven]

Hi Jacopo,

On Tue, Feb 20, 2018 at 4:12 PM, Jacopo Mondi <jacopo+renesas@jmondi.org> wrote:
> Add compatible string for R-Car M3-N (r8a77965) in gpio-rcar.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Can you please resend to the GPIO maintainer?
Thanks!

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH v2 15/19] dt-bindings: gpio: Add support for r8a77965

[jacopo mondi]

Hi Geert,

On Mon, Apr 16, 2018 at 01:12:06PM +0200, Geert Uytterhoeven wrote:
> Hi Jacopo,
>
> On Tue, Feb 20, 2018 at 4:12 PM, Jacopo Mondi <jacopo+renesas@jmondi.org> wrote:
> > Add compatible string for R-Car M3-N (r8a77965) in gpio-rcar.
> >
> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> Can you please resend to the GPIO maintainer?
> Thanks!

Thank you for the useful reminder.

>From my original M3-N support series, the following DT binding patches
have actually to be resent, now that the SoC support is in v4.17-rc1.

dt-bindings: dmaengine: rcar-dmac: document R8A77965 support
dt-bindings: serial: sh-sci: Add support for r8a77965 (H)SCIF
dt-bindings: net: ravb: Add support for r8a77965 SoC
dt-bindings: gpio: Add support for r8a77965

I will resend each one to the appropriate tree maintainer.

Thanks
   j


>
> Gr{oetje,eeting}s,
>
>                         Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds
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[PATCH v2 16/19] ARM64: dts: r8a77965: Add GPIO nodes

[Jacopo Mondi]

Add GPIO nodes to r8a77965 SoC device tree file.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

---
v1 -> v2:
- Replace ALWAYS_ON power area define with numeric constant
- Do not move gpio nodes
---
 arch/arm64/boot/dts/renesas/r8a77965.dtsi | 104 +++++++++++++++++++++++++++---
 1 file changed, 96 insertions(+), 8 deletions(-)

diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 3cb1a33..55f05f7 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -197,35 +197,123 @@
 		};
 
 		gpio0: gpio at e6050000 {
-			/* placeholder */
+			compatible = "renesas,gpio-r8a77965",
+				     "renesas,rcar-gen3-gpio";
+			reg = <0 0xe6050000 0 0x50>;
+			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+			#gpio-cells = <2>;
+			gpio-controller;
+			gpio-ranges = <&pfc 0 0 16>;
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			clocks = <&cpg CPG_MOD 912>;
+			power-domains = <&sysc 32>;
+			resets = <&cpg 912>;
 		};
 
 		gpio1: gpio at e6051000 {
-			/* placeholder */
+			compatible = "renesas,gpio-r8a77965",
+				     "renesas,rcar-gen3-gpio";
+			reg = <0 0xe6051000 0 0x50>;
+			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+			#gpio-cells = <2>;
+			gpio-controller;
+			gpio-ranges = <&pfc 0 32 29>;
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			clocks = <&cpg CPG_MOD 911>;
+			power-domains = <&sysc 32>;
+			resets = <&cpg 911>;
 		};
 
 		gpio2: gpio at e6052000 {
-			/* placeholder */
+			compatible = "renesas,gpio-r8a77965",
+				     "renesas,rcar-gen3-gpio";
+			reg = <0 0xe6052000 0 0x50>;
+			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+			#gpio-cells = <2>;
+			gpio-controller;
+			gpio-ranges = <&pfc 0 64 15>;
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			clocks = <&cpg CPG_MOD 910>;
+			power-domains = <&sysc 32>;
+			resets = <&cpg 910>;
 		};
 
 		gpio3: gpio at e6053000 {
-			/* placeholder */
+			compatible = "renesas,gpio-r8a77965",
+				     "renesas,rcar-gen3-gpio";
+			reg = <0 0xe6053000 0 0x50>;
+			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+			#gpio-cells = <2>;
+			gpio-controller;
+			gpio-ranges = <&pfc 0 96 16>;
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			clocks = <&cpg CPG_MOD 909>;
+			power-domains = <&sysc 32>;
+			resets = <&cpg 909>;
 		};
 
 		gpio4: gpio at e6054000 {
-			/* placeholder */
+			compatible = "renesas,gpio-r8a77965",
+				     "renesas,rcar-gen3-gpio";
+			reg = <0 0xe6054000 0 0x50>;
+			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+			#gpio-cells = <2>;
+			gpio-controller;
+			gpio-ranges = <&pfc 0 128 18>;
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			clocks = <&cpg CPG_MOD 908>;
+			power-domains = <&sysc 32>;
+			resets = <&cpg 908>;
 		};
 
 		gpio5: gpio at e6055000 {
-			/* placeholder */
+			compatible = "renesas,gpio-r8a77965",
+				     "renesas,rcar-gen3-gpio";
+			reg = <0 0xe6055000 0 0x50>;
+			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+			#gpio-cells = <2>;
+			gpio-controller;
+			gpio-ranges = <&pfc 0 160 26>;
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			clocks = <&cpg CPG_MOD 907>;
+			power-domains = <&sysc 32>;
+			resets = <&cpg 907>;
 		};
 
 		gpio6: gpio at e6055400 {
-			/* placeholder */
+			compatible = "renesas,gpio-r8a77965",
+				     "renesas,rcar-gen3-gpio";
+			reg = <0 0xe6055400 0 0x50>;
+			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+			#gpio-cells = <2>;
+			gpio-controller;
+			gpio-ranges = <&pfc 0 192 32>;
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			clocks = <&cpg CPG_MOD 906>;
+			power-domains = <&sysc 32>;
+			resets = <&cpg 906>;
 		};
 
 		gpio7: gpio at e6055800 {
-			/* placeholder */
+			compatible = "renesas,gpio-r8a77965",
+				     "renesas,rcar-gen3-gpio";
+			reg = <0 0xe6055800 0 0x50>;
+			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+			#gpio-cells = <2>;
+			gpio-controller;
+			gpio-ranges = <&pfc 0 224 4>;
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			clocks = <&cpg CPG_MOD 905>;
+			power-domains = <&sysc 32>;
+			resets = <&cpg 905>;
 		};
 
 		intc_ex: interrupt-controller at e61c0000 {
-- 
2.7.4

[PATCH v2 16/19] ARM64: dts: r8a77965: Add GPIO nodes

[Simon Horman]

On Tue, Feb 20, 2018 at 04:12:18PM +0100, Jacopo Mondi wrote:
> Add GPIO nodes to r8a77965 SoC device tree file.
> 
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> 
> ---
> v1 -> v2:
> - Replace ALWAYS_ON power area define with numeric constant
> - Do not move gpio nodes

Thanks, applied with prefix updated to:

arm64: dts: renesas: r8a77965:

[PATCH v2 17/19] dt-bindings: net: ravb: Add support for r8a77965 SoC

[Jacopo Mondi]

Add documentation for r8a77965 compatible string to renesas ravb device
tree bindings documentation.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

Cc: sergei.shtylyov at cogentembedded.com, netdev at vger.kernel.org
---
 Documentation/devicetree/bindings/net/renesas,ravb.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/net/renesas,ravb.txt b/Documentation/devicetree/bindings/net/renesas,ravb.txt
index c902261..bf071a5 100644
--- a/Documentation/devicetree/bindings/net/renesas,ravb.txt
+++ b/Documentation/devicetree/bindings/net/renesas,ravb.txt
@@ -17,6 +17,7 @@ Required properties:
 
       - "renesas,etheravb-r8a7795" for the R8A7795 SoC.
       - "renesas,etheravb-r8a7796" for the R8A7796 SoC.
+      - "renesas,etheravb-r8a77965" for the R8A77965 SoC.
       - "renesas,etheravb-r8a77970" for the R8A77970 SoC.
       - "renesas,etheravb-r8a77995" for the R8A77995 SoC.
       - "renesas,etheravb-rcar-gen3" as a fallback for the above
-- 
2.7.4

[PATCH v2 17/19] dt-bindings: net: ravb: Add support for r8a77965 SoC

[Rob Herring]

On Tue, Feb 20, 2018 at 04:12:19PM +0100, Jacopo Mondi wrote:
> Add documentation for r8a77965 compatible string to renesas ravb device
> tree bindings documentation.
> 
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
> Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> 
> Cc: sergei.shtylyov at cogentembedded.com, netdev at vger.kernel.org
> ---
>  Documentation/devicetree/bindings/net/renesas,ravb.txt | 1 +
>  1 file changed, 1 insertion(+)

Reviewed-by: Rob Herring <robh@kernel.org>

[PATCH v2 19/19] ARM64: dts: r8a77965: Add EtherAVB device node

[Sergei Shtylyov]

On 02/20/2018 06:12 PM, Jacopo Mondi wrote:

> Populate the ethernet at e6800000 device node to enable Ethernet interface
> for R-Car M3-N (r8a77965) SoC.
> 
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> 
> ---
> v1 -> v2:
> - Replace ALWAYS_ON power area identifier with numeric constant
> ---
>  arch/arm64/boot/dts/renesas/r8a77965.dtsi | 43 ++++++++++++++++++++++++++++++-
>  1 file changed, 42 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> index 55f05f7..c249895 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> @@ -520,7 +520,48 @@
>  		};
>  
>  		avb: ethernet at e6800000 {
> -			/* placeholder */
> +			compatible = "renesas,etheravb-r8a77965",
> +				     "renesas,etheravb-rcar-gen3";
> +			reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
> +			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "ch0", "ch1", "ch2", "ch3",
> +					  "ch4", "ch5", "ch6", "ch7",
> +					  "ch8", "ch9", "ch10", "ch11",
> +					  "ch12", "ch13", "ch14", "ch15",
> +					  "ch16", "ch17", "ch18", "ch19",
> +					  "ch20", "ch21", "ch22", "ch23",
> +					  "ch24";
> +			clocks = <&cpg CPG_MOD 812>;
> +			power-domains = <&sysc 32>;
> +			resets = <&cpg 812>;
> +			phy-mode = "rgmii-txid";

   Why not just "rgmii"? TX delay is a board specific detail, no?

> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
>  		};
>  
>  		csi20: csi2 at fea80000 {
> 

MBR, Sergei

[PATCH v2 19/19] ARM64: dts: r8a77965: Add EtherAVB device node

[jacopo mondi]

Hi Sergei,

On Tue, Feb 20, 2018 at 06:30:56PM +0300, Sergei Shtylyov wrote:
> On 02/20/2018 06:12 PM, Jacopo Mondi wrote:
>
> > Populate the ethernet at e6800000 device node to enable Ethernet interface
> > for R-Car M3-N (r8a77965) SoC.
> >
> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> >
> > ---
> > v1 -> v2:
> > - Replace ALWAYS_ON power area identifier with numeric constant
> > ---
> >  arch/arm64/boot/dts/renesas/r8a77965.dtsi | 43 ++++++++++++++++++++++++++++++-
> >  1 file changed, 42 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> > index 55f05f7..c249895 100644
> > --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> > @@ -520,7 +520,48 @@
> >  		};
> >
> >  		avb: ethernet at e6800000 {
> > -			/* placeholder */
> > +			compatible = "renesas,etheravb-r8a77965",
> > +				     "renesas,etheravb-rcar-gen3";
> > +			reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
> > +			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
> > +			interrupt-names = "ch0", "ch1", "ch2", "ch3",
> > +					  "ch4", "ch5", "ch6", "ch7",
> > +					  "ch8", "ch9", "ch10", "ch11",
> > +					  "ch12", "ch13", "ch14", "ch15",
> > +					  "ch16", "ch17", "ch18", "ch19",
> > +					  "ch20", "ch21", "ch22", "ch23",
> > +					  "ch24";
> > +			clocks = <&cpg CPG_MOD 812>;
> > +			power-domains = <&sysc 32>;
> > +			resets = <&cpg 812>;
> > +			phy-mode = "rgmii-txid";
>
>    Why not just "rgmii"? TX delay is a board specific detail, no?
>

I admit I took this one straight from r8a7796 dtsi.
Would you like to me resend and change this?

Thanks
   j

> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +			status = "disabled";
> >  		};
> >
> >  		csi20: csi2 at fea80000 {
> >
>
> MBR, Sergei

[PATCH v2 19/19] ARM64: dts: r8a77965: Add EtherAVB device node

[Sergei Shtylyov]

Hello!

On 02/21/2018 01:07 PM, jacopo mondi wrote:

>>> Populate the ethernet at e6800000 device node to enable Ethernet interface
>>> for R-Car M3-N (r8a77965) SoC.
>>>
>>> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
>>> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>>>
>>> ---
>>> v1 -> v2:
>>> - Replace ALWAYS_ON power area identifier with numeric constant
>>> ---
>>>  arch/arm64/boot/dts/renesas/r8a77965.dtsi | 43 ++++++++++++++++++++++++++++++-
>>>  1 file changed, 42 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
>>> index 55f05f7..c249895 100644
>>> --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
>>> +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
>>> @@ -520,7 +520,48 @@
>>>  		};
>>>
>>>  		avb: ethernet at e6800000 {
>>> -			/* placeholder */
>>> +			compatible = "renesas,etheravb-r8a77965",
>>> +				     "renesas,etheravb-rcar-gen3";
>>> +			reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
>>> +			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
>>> +				     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
>>> +				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
>>> +				     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
>>> +				     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
>>> +				     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
>>> +				     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
>>> +				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
>>> +				     <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
>>> +				     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
>>> +				     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
>>> +				     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
>>> +				     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
>>> +				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
>>> +				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
>>> +				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
>>> +				     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
>>> +				     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
>>> +				     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
>>> +				     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
>>> +				     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
>>> +				     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
>>> +				     <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
>>> +				     <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
>>> +				     <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
>>> +			interrupt-names = "ch0", "ch1", "ch2", "ch3",
>>> +					  "ch4", "ch5", "ch6", "ch7",
>>> +					  "ch8", "ch9", "ch10", "ch11",
>>> +					  "ch12", "ch13", "ch14", "ch15",
>>> +					  "ch16", "ch17", "ch18", "ch19",
>>> +					  "ch20", "ch21", "ch22", "ch23",
>>> +					  "ch24";
>>> +			clocks = <&cpg CPG_MOD 812>;
>>> +			power-domains = <&sysc 32>;
>>> +			resets = <&cpg 812>;
>>> +			phy-mode = "rgmii-txid";
>>
>>    Why not just "rgmii"? TX delay is a board specific detail, no?
>>
> 
> I admit I took this one straight from r8a7796 dtsi.
> Would you like to me resend and change this?

   Yes, unless Simon would fix it while merging...

> Thanks
>    j
> 
>>> +			#address-cells = <1>;
>>> +			#size-cells = <0>;
>>> +			status = "disabled";
>>>  		};
>>>
>>>  		csi20: csi2 at fea80000 {

MBR, Sergei

[PATCH v2 19/19] ARM64: dts: r8a77965: Add EtherAVB device node

[Simon Horman]

On Wed, Feb 21, 2018 at 06:48:59PM +0300, Sergei Shtylyov wrote:
> Hello!
> 
> On 02/21/2018 01:07 PM, jacopo mondi wrote:
> 
> >>> Populate the ethernet at e6800000 device node to enable Ethernet interface
> >>> for R-Car M3-N (r8a77965) SoC.
> >>>
> >>> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> >>> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> >>>
> >>> ---
> >>> v1 -> v2:
> >>> - Replace ALWAYS_ON power area identifier with numeric constant
> >>> ---
> >>>  arch/arm64/boot/dts/renesas/r8a77965.dtsi | 43 ++++++++++++++++++++++++++++++-
> >>>  1 file changed, 42 insertions(+), 1 deletion(-)
> >>>
> >>> diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> >>> index 55f05f7..c249895 100644
> >>> --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> >>> +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> >>> @@ -520,7 +520,48 @@
> >>>  		};
> >>>
> >>>  		avb: ethernet at e6800000 {
> >>> -			/* placeholder */
> >>> +			compatible = "renesas,etheravb-r8a77965",
> >>> +				     "renesas,etheravb-rcar-gen3";
> >>> +			reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
> >>> +			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
> >>> +				     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
> >>> +				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
> >>> +				     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
> >>> +				     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
> >>> +				     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
> >>> +				     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
> >>> +				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
> >>> +				     <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
> >>> +				     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
> >>> +				     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
> >>> +				     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
> >>> +				     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
> >>> +				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
> >>> +				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
> >>> +				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
> >>> +				     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
> >>> +				     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
> >>> +				     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
> >>> +				     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
> >>> +				     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
> >>> +				     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
> >>> +				     <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
> >>> +				     <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
> >>> +				     <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
> >>> +			interrupt-names = "ch0", "ch1", "ch2", "ch3",
> >>> +					  "ch4", "ch5", "ch6", "ch7",
> >>> +					  "ch8", "ch9", "ch10", "ch11",
> >>> +					  "ch12", "ch13", "ch14", "ch15",
> >>> +					  "ch16", "ch17", "ch18", "ch19",
> >>> +					  "ch20", "ch21", "ch22", "ch23",
> >>> +					  "ch24";
> >>> +			clocks = <&cpg CPG_MOD 812>;
> >>> +			power-domains = <&sysc 32>;
> >>> +			resets = <&cpg 812>;
> >>> +			phy-mode = "rgmii-txid";
> >>
> >>    Why not just "rgmii"? TX delay is a board specific detail, no?
> >>
> > 
> > I admit I took this one straight from r8a7796 dtsi.
> > Would you like to me resend and change this?
> 
>    Yes, unless Simon would fix it while merging...

Can I confirm the desired change is s/rgmii-txid/rgmii/ ?

If so I can fix that up.

[PATCH v2 19/19] ARM64: dts: r8a77965: Add EtherAVB device node

[Sergei Shtylyov]

On 02/21/2018 08:31 PM, Simon Horman wrote:

>>>>> Populate the ethernet at e6800000 device node to enable Ethernet interface
>>>>> for R-Car M3-N (r8a77965) SoC.
>>>>>
>>>>> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
>>>>> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>>>>>
>>>>> ---
>>>>> v1 -> v2:
>>>>> - Replace ALWAYS_ON power area identifier with numeric constant
>>>>> ---
>>>>>  arch/arm64/boot/dts/renesas/r8a77965.dtsi | 43 ++++++++++++++++++++++++++++++-
>>>>>  1 file changed, 42 insertions(+), 1 deletion(-)
>>>>>
>>>>> diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
>>>>> index 55f05f7..c249895 100644
>>>>> --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
>>>>> +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
>>>>> @@ -520,7 +520,48 @@
>>>>>  		};
>>>>>
>>>>>  		avb: ethernet at e6800000 {
>>>>> -			/* placeholder */
>>>>> +			compatible = "renesas,etheravb-r8a77965",
>>>>> +				     "renesas,etheravb-rcar-gen3";
>>>>> +			reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
>>>>> +			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
>>>>> +				     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
>>>>> +				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
>>>>> +				     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
>>>>> +				     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
>>>>> +				     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
>>>>> +				     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
>>>>> +				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
>>>>> +				     <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
>>>>> +				     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
>>>>> +				     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
>>>>> +				     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
>>>>> +				     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
>>>>> +				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
>>>>> +				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
>>>>> +				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
>>>>> +				     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
>>>>> +				     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
>>>>> +				     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
>>>>> +				     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
>>>>> +				     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
>>>>> +				     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
>>>>> +				     <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
>>>>> +				     <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
>>>>> +				     <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
>>>>> +			interrupt-names = "ch0", "ch1", "ch2", "ch3",
>>>>> +					  "ch4", "ch5", "ch6", "ch7",
>>>>> +					  "ch8", "ch9", "ch10", "ch11",
>>>>> +					  "ch12", "ch13", "ch14", "ch15",
>>>>> +					  "ch16", "ch17", "ch18", "ch19",
>>>>> +					  "ch20", "ch21", "ch22", "ch23",
>>>>> +					  "ch24";
>>>>> +			clocks = <&cpg CPG_MOD 812>;
>>>>> +			power-domains = <&sysc 32>;
>>>>> +			resets = <&cpg 812>;
>>>>> +			phy-mode = "rgmii-txid";
>>>>
>>>>    Why not just "rgmii"? TX delay is a board specific detail, no?
>>>>
>>> I admit I took this one straight from r8a7796 dtsi.
>>> Would you like to me resend and change this?
>>
>>    Yes, unless Simon would fix it while merging...
> 
> Can I confirm the desired change is s/rgmii-txid/rgmii/ ?

   Yes.

> If so I can fix that up.
 
   Thank you!

MBR, Sergei

[PATCH v2 19/19] ARM64: dts: r8a77965: Add EtherAVB device node

[Sergei Shtylyov]

On 02/21/2018 08:38 PM, Sergei Shtylyov wrote:

>>>>>> Populate the ethernet at e6800000 device node to enable Ethernet interface
>>>>>> for R-Car M3-N (r8a77965) SoC.
>>>>>>
>>>>>> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
>>>>>> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>>>>>>
>>>>>> ---
>>>>>> v1 -> v2:
>>>>>> - Replace ALWAYS_ON power area identifier with numeric constant
>>>>>> ---
>>>>>>  arch/arm64/boot/dts/renesas/r8a77965.dtsi | 43 ++++++++++++++++++++++++++++++-
>>>>>>  1 file changed, 42 insertions(+), 1 deletion(-)
>>>>>>
>>>>>> diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
>>>>>> index 55f05f7..c249895 100644
>>>>>> --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
>>>>>> +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
>>>>>> @@ -520,7 +520,48 @@
>>>>>>  		};
>>>>>>
>>>>>>  		avb: ethernet at e6800000 {
>>>>>> -			/* placeholder */
>>>>>> +			compatible = "renesas,etheravb-r8a77965",
>>>>>> +				     "renesas,etheravb-rcar-gen3";
>>>>>> +			reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
>>>>>> +			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
>>>>>> +			interrupt-names = "ch0", "ch1", "ch2", "ch3",
>>>>>> +					  "ch4", "ch5", "ch6", "ch7",
>>>>>> +					  "ch8", "ch9", "ch10", "ch11",
>>>>>> +					  "ch12", "ch13", "ch14", "ch15",
>>>>>> +					  "ch16", "ch17", "ch18", "ch19",
>>>>>> +					  "ch20", "ch21", "ch22", "ch23",
>>>>>> +					  "ch24";
>>>>>> +			clocks = <&cpg CPG_MOD 812>;
>>>>>> +			power-domains = <&sysc 32>;
>>>>>> +			resets = <&cpg 812>;
>>>>>> +			phy-mode = "rgmii-txid";
>>>>>
>>>>>    Why not just "rgmii"? TX delay is a board specific detail, no?
>>>>>
>>>> I admit I took this one straight from r8a7796 dtsi.
>>>> Would you like to me resend and change this?
>>>
>>>    Yes, unless Simon would fix it while merging...
>>
>> Can I confirm the desired change is s/rgmii-txid/rgmii/ ?
> 
>    Yes.

   Apparently that means that this prop should be overridden in the board file
(which may not be an easy task given the board is Salvator-XS again).

[...]

MBR, Sergei

[PATCH v2 19/19] ARM64: dts: r8a77965: Add EtherAVB device node

[Simon Horman]

On Wed, Feb 21, 2018 at 08:53:53PM +0300, Sergei Shtylyov wrote:
> On 02/21/2018 08:38 PM, Sergei Shtylyov wrote:

...

> >>>>>> +			clocks = <&cpg CPG_MOD 812>;
> >>>>>> +			power-domains = <&sysc 32>;
> >>>>>> +			resets = <&cpg 812>;
> >>>>>> +			phy-mode = "rgmii-txid";
> >>>>>
> >>>>>    Why not just "rgmii"? TX delay is a board specific detail, no?
> >>>>>
> >>>> I admit I took this one straight from r8a7796 dtsi.
> >>>> Would you like to me resend and change this?
> >>>
> >>>    Yes, unless Simon would fix it while merging...
> >>
> >> Can I confirm the desired change is s/rgmii-txid/rgmii/ ?
> > 
> >    Yes.
> 
>    Apparently that means that this prop should be overridden in the board file
> (which may not be an easy task given the board is Salvator-XS again).
> 
> [...]

Can we override it in r8a77965-salvator-x.dts or r8a77965-salvator-xs.dts?

I feel that I'm missing an important point here.

[PATCH v2 19/19] ARM64: dts: r8a77965: Add EtherAVB device node

[Sergei Shtylyov]

On 02/21/2018 09:23 PM, Simon Horman wrote:

> ...
> 
>>>>>>>> +			clocks = <&cpg CPG_MOD 812>;
>>>>>>>> +			power-domains = <&sysc 32>;
>>>>>>>> +			resets = <&cpg 812>;
>>>>>>>> +			phy-mode = "rgmii-txid";
>>>>>>>
>>>>>>>    Why not just "rgmii"? TX delay is a board specific detail, no?
>>>>>>>
>>>>>> I admit I took this one straight from r8a7796 dtsi.
>>>>>> Would you like to me resend and change this?
>>>>>
>>>>>    Yes, unless Simon would fix it while merging...
>>>>
>>>> Can I confirm the desired change is s/rgmii-txid/rgmii/ ?
>>>
>>>    Yes.
>>
>>    Apparently that means that this prop should be overridden in the board file
>> (which may not be an easy task given the board is Salvator-XS again).
>>
>> [...]
> 
> Can we override it in r8a77965-salvator-x.dts or r8a77965-salvator-xs.dts?

   In salvator-common.dtsi most probably -- it has the PHY data for Ether AVB.

> I feel that I'm missing an important point here.

   Well, r8a779{5|6}.dtsi also have phy-mode = "rgmii-txid" (which was unjustified
in my current understanding). Thus such board override wouldn't hurt them. But we lack
a patch modifying salvator-common.dtsi in htis series, so I'm now thinking a respin of
this series is needed anyway... sorry for being unclear. :-)

MBR, Sergei

[PATCH v2 19/19] ARM64: dts: r8a77965: Add EtherAVB device node

[Simon Horman]

On Wed, Feb 21, 2018 at 09:53:58PM +0300, Sergei Shtylyov wrote:
> On 02/21/2018 09:23 PM, Simon Horman wrote:
> 
> > ...
> > 
> >>>>>>>> +			clocks = <&cpg CPG_MOD 812>;
> >>>>>>>> +			power-domains = <&sysc 32>;
> >>>>>>>> +			resets = <&cpg 812>;
> >>>>>>>> +			phy-mode = "rgmii-txid";
> >>>>>>>
> >>>>>>>    Why not just "rgmii"? TX delay is a board specific detail, no?
> >>>>>>>
> >>>>>> I admit I took this one straight from r8a7796 dtsi.
> >>>>>> Would you like to me resend and change this?
> >>>>>
> >>>>>    Yes, unless Simon would fix it while merging...
> >>>>
> >>>> Can I confirm the desired change is s/rgmii-txid/rgmii/ ?
> >>>
> >>>    Yes.
> >>
> >>    Apparently that means that this prop should be overridden in the board file
> >> (which may not be an easy task given the board is Salvator-XS again).
> >>
> >> [...]
> > 
> > Can we override it in r8a77965-salvator-x.dts or r8a77965-salvator-xs.dts?
> 
>    In salvator-common.dtsi most probably -- it has the PHY data for Ether AVB.
> 
> > I feel that I'm missing an important point here.
> 
>    Well, r8a779{5|6}.dtsi also have phy-mode = "rgmii-txid" (which was
>    unjustified in my current understanding). Thus such board override
>    wouldn't hurt them. But we lack a patch modifying salvator-common.dtsi
>    in htis series, so I'm now thinking a respin of this series is needed
>    anyway... sorry for being unclear. :-)

While I've applied other patches in this series I have
not applied this one - mainly to allow this discussion to conclude.

Is an appropriate solution to do the following?

1) Atomically update
   a) r8a779{5|6}.dtsi to use "rgmii" and
   b) salvator-common.dtsi to use "rgmii-txid"
2) Update this patch to use "rgmii"

Sorry if I'm still missing the point.

[PATCH v2 19/19] ARM64: dts: r8a77965: Add EtherAVB device node

[Sergei Shtylyov]

Hello!

On 02/22/2018 06:54 PM, Simon Horman wrote:

>>> ...
>>>
>>>>>>>>>> +			clocks = <&cpg CPG_MOD 812>;
>>>>>>>>>> +			power-domains = <&sysc 32>;
>>>>>>>>>> +			resets = <&cpg 812>;
>>>>>>>>>> +			phy-mode = "rgmii-txid";
>>>>>>>>>
>>>>>>>>>    Why not just "rgmii"? TX delay is a board specific detail, no?
>>>>>>>>>
>>>>>>>> I admit I took this one straight from r8a7796 dtsi.
>>>>>>>> Would you like to me resend and change this?
>>>>>>>
>>>>>>>    Yes, unless Simon would fix it while merging...
>>>>>>
>>>>>> Can I confirm the desired change is s/rgmii-txid/rgmii/ ?
>>>>>
>>>>>    Yes.
>>>>
>>>>    Apparently that means that this prop should be overridden in the board file
>>>> (which may not be an easy task given the board is Salvator-XS again).
>>>>
>>>> [...]
>>>
>>> Can we override it in r8a77965-salvator-x.dts or r8a77965-salvator-xs.dts?
>>
>>    In salvator-common.dtsi most probably -- it has the PHY data for Ether AVB.
>>
>>> I feel that I'm missing an important point here.
>>
>>    Well, r8a779{5|6}.dtsi also have phy-mode = "rgmii-txid" (which was
>>    unjustified in my current understanding). Thus such board override
>>    wouldn't hurt them. But we lack a patch modifying salvator-common.dtsi
>>    in htis series, so I'm now thinking a respin of this series is needed
>>    anyway... sorry for being unclear. :-)
> 
> While I've applied other patches in this series I have
> not applied this one - mainly to allow this discussion to conclude.
> 
> Is an appropriate solution to do the following?
> 
> 1) Atomically update
>    a) r8a779{5|6}.dtsi to use "rgmii" and
>    b) salvator-common.dtsi to use "rgmii-txid"
> 2) Update this patch to use "rgmii"

   Yeah, I was thinking about doing exactly this...

> Sorry if I'm still missing the point.

   I was referring to what the 2nd paragraph of [1] said about the internal delays
(perhaps I just misunderstood it)...

[1] https://en.wikipedia.org/wiki/Media-independent_interface#Reduced_gigabit_media-independent_interface

MBR, Sergei

[PATCH v2 19/19] ARM64: dts: r8a77965: Add EtherAVB device node

[Geert Uytterhoeven]

Hi Simon,

On Thu, Feb 22, 2018 at 4:54 PM, Simon Horman <horms@verge.net.au> wrote:
> On Wed, Feb 21, 2018 at 09:53:58PM +0300, Sergei Shtylyov wrote:
>> On 02/21/2018 09:23 PM, Simon Horman wrote:
>>
>> > ...
>> >
>> >>>>>>>> +                    clocks = <&cpg CPG_MOD 812>;
>> >>>>>>>> +                    power-domains = <&sysc 32>;
>> >>>>>>>> +                    resets = <&cpg 812>;
>> >>>>>>>> +                    phy-mode = "rgmii-txid";
>> >>>>>>>
>> >>>>>>>    Why not just "rgmii"? TX delay is a board specific detail, no?
>> >>>>>>>
>> >>>>>> I admit I took this one straight from r8a7796 dtsi.
>> >>>>>> Would you like to me resend and change this?
>> >>>>>
>> >>>>>    Yes, unless Simon would fix it while merging...
>> >>>>
>> >>>> Can I confirm the desired change is s/rgmii-txid/rgmii/ ?
>> >>>
>> >>>    Yes.
>> >>
>> >>    Apparently that means that this prop should be overridden in the board file
>> >> (which may not be an easy task given the board is Salvator-XS again).
>> >>
>> >> [...]
>> >
>> > Can we override it in r8a77965-salvator-x.dts or r8a77965-salvator-xs.dts?
>>
>>    In salvator-common.dtsi most probably -- it has the PHY data for Ether AVB.
>>
>> > I feel that I'm missing an important point here.
>>
>>    Well, r8a779{5|6}.dtsi also have phy-mode = "rgmii-txid" (which was
>>    unjustified in my current understanding). Thus such board override
>>    wouldn't hurt them. But we lack a patch modifying salvator-common.dtsi
>>    in htis series, so I'm now thinking a respin of this series is needed
>>    anyway... sorry for being unclear. :-)
>
> While I've applied other patches in this series I have
> not applied this one - mainly to allow this discussion to conclude.
>
> Is an appropriate solution to do the following?
>
> 1) Atomically update
>    a) r8a779{5|6}.dtsi to use "rgmii" and
>    b) salvator-common.dtsi to use "rgmii-txid"
> 2) Update this patch to use "rgmii"

No need for atomics.
It can all be done by patches touching single files only:
  1) Add "rgmii-txid" to board .dts(i) files,
  2) Change s/rgmii-txid/rgmii/ in SoC .dtsi files.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH v2 19/19] ARM64: dts: r8a77965: Add EtherAVB device node

[Simon Horman]

On Fri, Feb 23, 2018 at 08:06:11AM +0100, Geert Uytterhoeven wrote:
> Hi Simon,
> 
> On Thu, Feb 22, 2018 at 4:54 PM, Simon Horman <horms@verge.net.au> wrote:
> > On Wed, Feb 21, 2018 at 09:53:58PM +0300, Sergei Shtylyov wrote:
> >> On 02/21/2018 09:23 PM, Simon Horman wrote:
> >>
> >> > ...
> >> >
> >> >>>>>>>> +                    clocks = <&cpg CPG_MOD 812>;
> >> >>>>>>>> +                    power-domains = <&sysc 32>;
> >> >>>>>>>> +                    resets = <&cpg 812>;
> >> >>>>>>>> +                    phy-mode = "rgmii-txid";
> >> >>>>>>>
> >> >>>>>>>    Why not just "rgmii"? TX delay is a board specific detail, no?
> >> >>>>>>>
> >> >>>>>> I admit I took this one straight from r8a7796 dtsi.
> >> >>>>>> Would you like to me resend and change this?
> >> >>>>>
> >> >>>>>    Yes, unless Simon would fix it while merging...
> >> >>>>
> >> >>>> Can I confirm the desired change is s/rgmii-txid/rgmii/ ?
> >> >>>
> >> >>>    Yes.
> >> >>
> >> >>    Apparently that means that this prop should be overridden in the board file
> >> >> (which may not be an easy task given the board is Salvator-XS again).
> >> >>
> >> >> [...]
> >> >
> >> > Can we override it in r8a77965-salvator-x.dts or r8a77965-salvator-xs.dts?
> >>
> >>    In salvator-common.dtsi most probably -- it has the PHY data for Ether AVB.
> >>
> >> > I feel that I'm missing an important point here.
> >>
> >>    Well, r8a779{5|6}.dtsi also have phy-mode = "rgmii-txid" (which was
> >>    unjustified in my current understanding). Thus such board override
> >>    wouldn't hurt them. But we lack a patch modifying salvator-common.dtsi
> >>    in htis series, so I'm now thinking a respin of this series is needed
> >>    anyway... sorry for being unclear. :-)
> >
> > While I've applied other patches in this series I have
> > not applied this one - mainly to allow this discussion to conclude.
> >
> > Is an appropriate solution to do the following?
> >
> > 1) Atomically update
> >    a) r8a779{5|6}.dtsi to use "rgmii" and
> >    b) salvator-common.dtsi to use "rgmii-txid"
> > 2) Update this patch to use "rgmii"
> 
> No need for atomics.
> It can all be done by patches touching single files only:
>   1) Add "rgmii-txid" to board .dts(i) files,
>   2) Change s/rgmii-txid/rgmii/ in SoC .dtsi files.

Sounds good.

Jacopo would you care to:

a) Implement the above rgmii-txid / rgmii update.
b) Rebase this patch on top of that update and [PATCH v2 0/7] R-Car M3-N
   DTS fixes

[PATCH v2 05/19] pinctrl: sh-pfc: Initial R-Car M3-N support

[Geert Uytterhoeven]

Hi Jacopo,

On Tue, Feb 20, 2018 at 4:12 PM, Jacopo Mondi <jacopo+renesas@jmondi.org> wrote:
> Add initial PFC support for R-Car M3-N (r8a77965) SoC.
> No groups or functions defined, just pin and registers enumeration.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> Reviewed-by: Rob Herring <robh@kernel.org>
>
> ---
> v1 -> v2:
>
> Applied the following patches for r8a7796 on r8a77965:
>
> commit 0f4713d71f22d3b0ec3de6ae4a126cceecdea82b
> Author: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> Date:   Thu Nov 16 23:59:21 2017 +0900
> pinctrl: sh-pfc: r8a7796: Rename RTS{0,1,3,4}# pin function definitions
>
> commit fbd81e345c9393b96e8ad252eef390f8c6f9cf60
> Author: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> Date:   Thu Nov 16 12:17:18 2017 +0900
> pinctrl: sh-pfc: r8a7796: Fix to delete A20..A25 pins function definitions

Thanks for the update!

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
and queueing in sh-pfc-for-v4.17, with the following recent fixes for
r8a7796 that are also applicable to r8a77965 folded in:

    pinctrl: sh-pfc: r8a7796: Fix IPSR and MOD_SEL register pin
assignment for NDFC pins group
    pinctrl: sh-pfc: r8a7796: Fix MOD_SEL register pin assignment for
SSI pins group

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH v2 18/19] pinctrl: sh-pfc: r8a77965: Add EtherAVB groups/functions

[Geert Uytterhoeven]

On Tue, Feb 20, 2018 at 4:12 PM, Jacopo Mondi <jacopo+renesas@jmondi.org> wrote:
> Add EtherAVB groups and functions definitions for R-Car M3-N.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Queueing in sh-pfc-for-v4.17.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH v2 14/19] ARM64: dts: r8a77965: Add SCIF device nodes

[Simon Horman]

On Tue, Feb 20, 2018 at 04:12:16PM +0100, Jacopo Mondi wrote:
> Add SCIF[0-5] device nodes for M3-N (r8a77965) SoC.
> 
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Thanks, applied with prefix updated to:

arm64: dts: renesas: r8a77965: