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* [PATCH v2 0/2] Basic GPIO support for r8a7795
@ 2015-10-27  1:42 Simon Horman
  2015-10-27  1:42 ` [PATCH v2 1/2] arm64: dts: r8a7795: add GPIO nodes Simon Horman
                   ` (2 more replies)
  0 siblings, 3 replies; 6+ messages in thread
From: Simon Horman @ 2015-10-27  1:42 UTC (permalink / raw)
  To: linux-arm-kernel

Hi,

this is an update of work by Takeshi Kihara, posted by me, then Ulrich
Hecht and now me again. The main change since Ulrich's v1 posting is to
update to new CPG/MSSR bindings via Geert Uytterhoeven. This includes
dropping "arm64: dts: r8a7795: add GPIO clocks" from the series as the new
approach does not require those nodes.

Ulrich, I would be most grateful if you could look over this and repost
if there are problems.

Base:

* "[PATCH v12 0/7] arm64: renesas: Add Renesas R8A7795 SoC support".
  This can be found in the topic/arm64-rcar-gen3-v12 branch of
  my renesas tree on kernel.org.

Run-time dependencies:
* The base
* The new GPG driver
  "[PATCH/RFC v4 0/5] clk: shmobile: Add new Renesas CPG/MSSR DT bindings"
  and its dependencies. This may be found in the
  topic/cpg-mssr-v4 branch of
  git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers
  along with an earlier version of this patchset which updates applied.

Availability:
* This patchset is available in the  topic/r8a7795-gpio-v2 branch of my
  renesas tree on kernel.org


Takeshi Kihara (2):
  arm64: dts: r8a7795: add GPIO nodes
  arm64: defconfig: Enable GPIO of Renesas R-Car Gen3 SoC

 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 112 +++++++++++++++++++++++++++++++
 arch/arm64/configs/defconfig             |   1 +
 2 files changed, 113 insertions(+)

-- 
2.1.4

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH v2 1/2] arm64: dts: r8a7795: add GPIO nodes
  2015-10-27  1:42 [PATCH v2 0/2] Basic GPIO support for r8a7795 Simon Horman
@ 2015-10-27  1:42 ` Simon Horman
  2015-10-28  9:16   ` Geert Uytterhoeven
  2015-10-27  1:42 ` [PATCH v2 2/2] arm64: defconfig: Enable GPIO of Renesas R-Car Gen3 SoC Simon Horman
  2015-10-27  9:21 ` [PATCH v2 0/2] Basic GPIO support for r8a7795 Ulrich Hecht
  2 siblings, 1 reply; 6+ messages in thread
From: Simon Horman @ 2015-10-27  1:42 UTC (permalink / raw)
  To: linux-arm-kernel

From: Takeshi Kihara <takeshi.kihara.df@renesas.com>

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[horms: broken out of a larger patch; moved to soc node]
[uli: fixed gpio6/7 clocks]
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

---

v2 [Simon Horman]
* Update for new CPG/MSSR bindings via Geert Uytterhoeven

v1 [Ulrich Hecht]
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 112 +++++++++++++++++++++++++++++++
 1 file changed, 112 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index b94e5a9e2c3b..68430ccb82e3 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -59,6 +59,118 @@
 					(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
 		};
 
+		gpio0: gpio at e6050000 {
+			compatible = "renesas,gpio-r8a7795",
+				     "renesas,gpio-rcar";
+			reg = <0 0xe6050000 0 0x50>;
+			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+			#gpio-cells = <2>;
+			gpio-controller;
+			gpio-ranges = <&pfc 0 0 32>;
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			clocks = <&cpg CPG_MOD 912>;
+			power-domains = <&cpg>;
+		};
+
+		gpio1: gpio at e6051000 {
+			compatible = "renesas,gpio-r8a7795",
+				     "renesas,gpio-rcar";
+			reg = <0 0xe6051000 0 0x50>;
+			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+			#gpio-cells = <2>;
+			gpio-controller;
+			gpio-ranges = <&pfc 0 32 32>;
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			clocks = <&cpg CPG_MOD 911>;
+			power-domains = <&cpg>;
+		};
+
+		gpio2: gpio at e6052000 {
+			compatible = "renesas,gpio-r8a7795",
+				     "renesas,gpio-rcar";
+			reg = <0 0xe6052000 0 0x50>;
+			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+			#gpio-cells = <2>;
+			gpio-controller;
+			gpio-ranges = <&pfc 0 64 32>;
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			clocks = <&cpg CPG_MOD 910>;
+			power-domains = <&cpg>;
+		};
+
+		gpio3: gpio at e6053000 {
+			compatible = "renesas,gpio-r8a7795",
+				     "renesas,gpio-rcar";
+			reg = <0 0xe6053000 0 0x50>;
+			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+			#gpio-cells = <2>;
+			gpio-controller;
+			gpio-ranges = <&pfc 0 96 32>;
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			clocks = <&cpg CPG_MOD 909>;
+			power-domains = <&cpg>;
+		};
+
+		gpio4: gpio at e6054000 {
+			compatible = "renesas,gpio-r8a7795",
+				     "renesas,gpio-rcar";
+			reg = <0 0xe6054000 0 0x50>;
+			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+			#gpio-cells = <2>;
+			gpio-controller;
+			gpio-ranges = <&pfc 0 128 32>;
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			clocks = <&cpg CPG_MOD 908>;
+			power-domains = <&cpg>;
+		};
+
+		gpio5: gpio at e6055000 {
+			compatible = "renesas,gpio-r8a7795",
+				     "renesas,gpio-rcar";
+			reg = <0 0xe6055000 0 0x50>;
+			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+			#gpio-cells = <2>;
+			gpio-controller;
+			gpio-ranges = <&pfc 0 160 32>;
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			clocks = <&cpg CPG_MOD 907>;
+			power-domains = <&cpg>;
+		};
+
+		gpio6: gpio at e6055400 {
+			compatible = "renesas,gpio-r8a7795",
+				     "renesas,gpio-rcar";
+			reg = <0 0xe6055400 0 0x50>;
+			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+			#gpio-cells = <2>;
+			gpio-controller;
+			gpio-ranges = <&pfc 0 192 32>;
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			clocks = <&cpg CPG_MOD 906>;
+			power-domains = <&cpg>;
+		};
+
+		gpio7: gpio at e6055800 {
+			compatible = "renesas,gpio-r8a7795",
+				     "renesas,gpio-rcar";
+			reg = <0 0xe6055800 0 0x50>;
+			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+			#gpio-cells = <2>;
+			gpio-controller;
+			gpio-ranges = <&pfc 0 224 32>;
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			clocks = <&cpg CPG_MOD 905>;
+			power-domains = <&cpg>;
+		};
+
 		timer {
 			compatible = "arm,armv8-timer";
 			interrupts = <GIC_PPI 13
-- 
2.1.4

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH v2 2/2] arm64: defconfig: Enable GPIO of Renesas R-Car Gen3 SoC
  2015-10-27  1:42 [PATCH v2 0/2] Basic GPIO support for r8a7795 Simon Horman
  2015-10-27  1:42 ` [PATCH v2 1/2] arm64: dts: r8a7795: add GPIO nodes Simon Horman
@ 2015-10-27  1:42 ` Simon Horman
  2015-10-27  9:26   ` Geert Uytterhoeven
  2015-10-27  9:21 ` [PATCH v2 0/2] Basic GPIO support for r8a7795 Ulrich Hecht
  2 siblings, 1 reply; 6+ messages in thread
From: Simon Horman @ 2015-10-27  1:42 UTC (permalink / raw)
  To: linux-arm-kernel

From: Takeshi Kihara <takeshi.kihara.df@renesas.com>

Enable GPIO for  Renesas R-Car Gen3 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[horms: only enable GPIO_RCAR]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index dccc685b58ae..d9946384f102 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -125,6 +125,7 @@ CONFIG_SPI=y
 CONFIG_SPI_PL022=y
 CONFIG_PINCTRL_MSM8916=y
 CONFIG_GPIO_PL061=y
+CONFIG_GPIO_RCAR=y
 CONFIG_GPIO_XGENE=y
 CONFIG_POWER_RESET_XGENE=y
 CONFIG_POWER_RESET_SYSCON=y
-- 
2.1.4

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH v2 0/2] Basic GPIO support for r8a7795
  2015-10-27  1:42 [PATCH v2 0/2] Basic GPIO support for r8a7795 Simon Horman
  2015-10-27  1:42 ` [PATCH v2 1/2] arm64: dts: r8a7795: add GPIO nodes Simon Horman
  2015-10-27  1:42 ` [PATCH v2 2/2] arm64: defconfig: Enable GPIO of Renesas R-Car Gen3 SoC Simon Horman
@ 2015-10-27  9:21 ` Ulrich Hecht
  2 siblings, 0 replies; 6+ messages in thread
From: Ulrich Hecht @ 2015-10-27  9:21 UTC (permalink / raw)
  To: linux-arm-kernel

On Tue, Oct 27, 2015 at 2:42 AM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> this is an update of work by Takeshi Kihara, posted by me, then Ulrich
> Hecht and now me again. The main change since Ulrich's v1 posting is to
> update to new CPG/MSSR bindings via Geert Uytterhoeven. This includes
> dropping "arm64: dts: r8a7795: add GPIO clocks" from the series as the new
> approach does not require those nodes.
>
> Ulrich, I would be most grateful if you could look over this and repost
> if there are problems.

Thank you for the patches.  Looks all correct to me.

CU
Uli

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH v2 2/2] arm64: defconfig: Enable GPIO of Renesas R-Car Gen3 SoC
  2015-10-27  1:42 ` [PATCH v2 2/2] arm64: defconfig: Enable GPIO of Renesas R-Car Gen3 SoC Simon Horman
@ 2015-10-27  9:26   ` Geert Uytterhoeven
  0 siblings, 0 replies; 6+ messages in thread
From: Geert Uytterhoeven @ 2015-10-27  9:26 UTC (permalink / raw)
  To: linux-arm-kernel

On Tue, Oct 27, 2015 at 2:42 AM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
>
> Enable GPIO for  Renesas R-Car Gen3 SoC.
>
> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> [horms: only enable GPIO_RCAR]
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH v2 1/2] arm64: dts: r8a7795: add GPIO nodes
  2015-10-27  1:42 ` [PATCH v2 1/2] arm64: dts: r8a7795: add GPIO nodes Simon Horman
@ 2015-10-28  9:16   ` Geert Uytterhoeven
  0 siblings, 0 replies; 6+ messages in thread
From: Geert Uytterhoeven @ 2015-10-28  9:16 UTC (permalink / raw)
  To: linux-arm-kernel

On Tue, Oct 27, 2015 at 2:42 AM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
>
> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> [horms: broken out of a larger patch; moved to soc node]
> [uli: fixed gpio6/7 clocks]
> Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
>
> ---
>
> v2 [Simon Horman]
> * Update for new CPG/MSSR bindings via Geert Uytterhoeven
>
> v1 [Ulrich Hecht]
> ---
>  arch/arm64/boot/dts/renesas/r8a7795.dtsi | 112 +++++++++++++++++++++++++++++++
>  1 file changed, 112 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> index b94e5a9e2c3b..68430ccb82e3 100644
> --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> @@ -59,6 +59,118 @@
>                                         (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
>                 };
>
> +               gpio0: gpio at e6050000 {
> +                       compatible = "renesas,gpio-r8a7795",
> +                                    "renesas,gpio-rcar";
> +                       reg = <0 0xe6050000 0 0x50>;
> +                       interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> +                       #gpio-cells = <2>;
> +                       gpio-controller;
> +                       gpio-ranges = <&pfc 0 0 32>;

gpio-ranges = <&pfc 0 0 16>;

> +                       #interrupt-cells = <2>;
> +                       interrupt-controller;
> +                       clocks = <&cpg CPG_MOD 912>;
> +                       power-domains = <&cpg>;
> +               };
> +
> +               gpio1: gpio at e6051000 {
> +                       compatible = "renesas,gpio-r8a7795",
> +                                    "renesas,gpio-rcar";
> +                       reg = <0 0xe6051000 0 0x50>;
> +                       interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> +                       #gpio-cells = <2>;
> +                       gpio-controller;
> +                       gpio-ranges = <&pfc 0 32 32>;

gpio-ranges = <&pfc 0 32 28>;

> +                       #interrupt-cells = <2>;
> +                       interrupt-controller;
> +                       clocks = <&cpg CPG_MOD 911>;
> +                       power-domains = <&cpg>;
> +               };
> +
> +               gpio2: gpio at e6052000 {
> +                       compatible = "renesas,gpio-r8a7795",
> +                                    "renesas,gpio-rcar";
> +                       reg = <0 0xe6052000 0 0x50>;
> +                       interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> +                       #gpio-cells = <2>;
> +                       gpio-controller;
> +                       gpio-ranges = <&pfc 0 64 32>;

gpio-ranges = <&pfc 0 64 15>;

> +                       #interrupt-cells = <2>;
> +                       interrupt-controller;
> +                       clocks = <&cpg CPG_MOD 910>;
> +                       power-domains = <&cpg>;
> +               };
> +
> +               gpio3: gpio at e6053000 {
> +                       compatible = "renesas,gpio-r8a7795",
> +                                    "renesas,gpio-rcar";
> +                       reg = <0 0xe6053000 0 0x50>;
> +                       interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> +                       #gpio-cells = <2>;
> +                       gpio-controller;
> +                       gpio-ranges = <&pfc 0 96 32>;

gpio-ranges = <&pfc 0 96 16>;

> +                       #interrupt-cells = <2>;
> +                       interrupt-controller;
> +                       clocks = <&cpg CPG_MOD 909>;
> +                       power-domains = <&cpg>;
> +               };
> +
> +               gpio4: gpio at e6054000 {
> +                       compatible = "renesas,gpio-r8a7795",
> +                                    "renesas,gpio-rcar";
> +                       reg = <0 0xe6054000 0 0x50>;
> +                       interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> +                       #gpio-cells = <2>;
> +                       gpio-controller;
> +                       gpio-ranges = <&pfc 0 128 32>;

gpio-ranges = <&pfc 0 128 18>;

> +                       #interrupt-cells = <2>;
> +                       interrupt-controller;
> +                       clocks = <&cpg CPG_MOD 908>;
> +                       power-domains = <&cpg>;
> +               };
> +
> +               gpio5: gpio at e6055000 {
> +                       compatible = "renesas,gpio-r8a7795",
> +                                    "renesas,gpio-rcar";
> +                       reg = <0 0xe6055000 0 0x50>;
> +                       interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
> +                       #gpio-cells = <2>;
> +                       gpio-controller;
> +                       gpio-ranges = <&pfc 0 160 32>;

gpio-ranges = <&pfc 0 160 26>;

> +                       #interrupt-cells = <2>;
> +                       interrupt-controller;
> +                       clocks = <&cpg CPG_MOD 907>;
> +                       power-domains = <&cpg>;
> +               };
> +
> +               gpio6: gpio at e6055400 {
> +                       compatible = "renesas,gpio-r8a7795",
> +                                    "renesas,gpio-rcar";
> +                       reg = <0 0xe6055400 0 0x50>;
> +                       interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
> +                       #gpio-cells = <2>;
> +                       gpio-controller;
> +                       gpio-ranges = <&pfc 0 192 32>;
> +                       #interrupt-cells = <2>;
> +                       interrupt-controller;
> +                       clocks = <&cpg CPG_MOD 906>;
> +                       power-domains = <&cpg>;
> +               };
> +
> +               gpio7: gpio at e6055800 {
> +                       compatible = "renesas,gpio-r8a7795",
> +                                    "renesas,gpio-rcar";
> +                       reg = <0 0xe6055800 0 0x50>;
> +                       interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
> +                       #gpio-cells = <2>;
> +                       gpio-controller;
> +                       gpio-ranges = <&pfc 0 224 32>;

gpio-ranges = <&pfc 0 224 4>;

> +                       #interrupt-cells = <2>;
> +                       interrupt-controller;
> +                       clocks = <&cpg CPG_MOD 905>;
> +                       power-domains = <&cpg>;
> +               };
> +
>                 timer {
>                         compatible = "arm,armv8-timer";
>                         interrupts = <GIC_PPI 13

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2015-10-28  9:16 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2015-10-27  1:42 [PATCH v2 0/2] Basic GPIO support for r8a7795 Simon Horman
2015-10-27  1:42 ` [PATCH v2 1/2] arm64: dts: r8a7795: add GPIO nodes Simon Horman
2015-10-28  9:16   ` Geert Uytterhoeven
2015-10-27  1:42 ` [PATCH v2 2/2] arm64: defconfig: Enable GPIO of Renesas R-Car Gen3 SoC Simon Horman
2015-10-27  9:26   ` Geert Uytterhoeven
2015-10-27  9:21 ` [PATCH v2 0/2] Basic GPIO support for r8a7795 Ulrich Hecht

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