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From: haojian.zhuang@gmail.com (Haojian Zhuang)
Date: Mon, 27 Aug 2012 21:45:23 +0800
Subject: Question about ION carveout heap support partial cache flush
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On Mon, Aug 27, 2012 at 4:56 PM, zhangfei gao <zhangfei.gao@gmail.com> wrote:
>
> Any suggestion of flushing cache according to cache line, instead of PAGE_SIZE.
> In order to get specific area, we use addr from user directly, which
> may not be the PAGE start.
>
> We have some usage case to flush cache according to cache line.
> CPU - cache - ddr - gpu
> 1. For correctness, driver only flush used size, if align to PAGE_SIZE,
> other area may be flushed by mistake.
> 2. for efficiency, cache line align will be perfered.

I think that maybe flushing PAGE_SIZE is acceptable. ION/PMEM is always designed
for large memory sharing. Maybe you can monitor the partial flushing
user case, I doubt
they're always flushing several pages, not several cachelines.