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s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=0zVmmfKjsh0O6iTcBeLVuCbww8hMd82b9Le3k2jDVtU=; b=lAtIF0DPMzlv/XnNb01wEhroyH5NBWf7yiTR2it3qOpRcF/NGm+/8ArGCOpr4sRsbS GyPKOzWe2ZKewhq+U5Kp/prjVK/P46lW4ZNzkNJD7gFcwgCtI0ARZ/VthN96izvdbP2f 8wLpStoGkVbtSjOkadc2TxVe4PC276OVtkPszzvZ4sPv9C46z6GZA4APE2nRPIeya6vd rhjToXK4NiIvvz6W8fTqKfxMpA8+3lLEd1IflANxt9NJcWbhk72OwW3+0w86bDpkYB77 imB5TrxYSz5WAzl+SGxS2tMvNeoi2tytoQWYqgQU39HLPlN/vStFUAQ7cylT7JI40aXB kOtg== X-Gm-Message-State: AOAM530IPtAMBSJAz2BqPezTOztNUF4GlEb1RqMETYktX+Fyjw+EU+bN 5nJfTXdMDJuvF57vdmlywDc6p7C9b8NlfuCEEtaH+Q== X-Google-Smtp-Source: ABdhPJyEN/N8WiArAmLbZiGvWNJvbwnRfJLMyXEkrASw8j5gZV6393JjHpibblCKurC+9vhkAUpbaDe81QmpxRZ+PiE= X-Received: by 2002:a9f:25a7:: with SMTP id 36mr14751050uaf.129.1628511234750; Mon, 09 Aug 2021 05:13:54 -0700 (PDT) MIME-Version: 1.0 References: <20210730063309.8194-1-rashmi.a@intel.com> <20210730063309.8194-3-rashmi.a@intel.com> In-Reply-To: From: Ulf Hansson Date: Mon, 9 Aug 2021 14:13:18 +0200 Message-ID: Subject: Re: [PATCH 2/3] mmc: sdhci-of-arasan: Add intel Thunder Bay SOC support to the arasan eMMC driver To: "A, Rashmi" Cc: Vinod Koul , Michal Simek , linux-mmc , Linux ARM , Linux Kernel Mailing List , Kishon , Andy Shevchenko , "linux-phy@lists.infradead.org" , Mark Gross , "kris.pan@linux.intel.com" , "Zhou, Furong" , "Sangannavar, Mallikarjunappa" , "Hunter, Adrian" , "Vaidya, Mahesh R" , "Srikandan, Nandhini" , "Demakkanavar, Kenchappa" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210809_051356_368310_D7A7EA77 X-CRM114-Status: GOOD ( 18.01 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, 9 Aug 2021 at 13:17, A, Rashmi wrote: > > > > > -----Original Message----- > > From: Vinod Koul > > Sent: Monday, August 9, 2021 2:12 PM > > To: A, Rashmi > > Cc: Ulf Hansson ; Michal Simek > > ; linux-mmc ; Linux > > ARM ; Linux Kernel Mailing List > kernel@vger.kernel.org>; Kishon ; Andy Shevchenko > > ; linux-phy@lists.infradead.org; Mark > > Gross ; kris.pan@linux.intel.com; Zhou, Furong > > ; Sangannavar, Mallikarjunappa > > ; Hunter, Adrian > > ; Vaidya, Mahesh R > > ; Srikandan, Nandhini > > ; Demakkanavar, Kenchappa > > > > Subject: Re: [PATCH 2/3] mmc: sdhci-of-arasan: Add intel Thunder Bay SOC > > support to the arasan eMMC driver > > > > On 09-08-21, 05:16, A, Rashmi wrote: > > > > > > > > > > Rashmi, is it safe to apply this separately from the phy driver/dt changes? > > > > Then I can queue this via my mmc tree, if you like. > > > No, the phy driver/dt changes must go together with "mmc: sdhci-of- > > arasan: Add intel Thunder Bay SOC support to the arasan eMMC driver" > > patch. > > > > Why is that? > > > > What could happen, emmc driver will complain about phy not found and bail > > right? > This is right, but ideally both mmc:phy and mmc: sdhci-of-arasan driver code changes should go together If patches are well written and can be standalone, we (maintainers) ideally prefer to queue things on a per subsystem basis, because it's just easier. That said, I also noticed that a new compatible string was added, "intel,thunderbay-sdhci-5.1". This needs to be documented in Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml, in a separate patch, preceding $subject patch. Kind regards Uffe _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel