* [PATCH 4/4] arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board
2013-04-20 7:15 ` [PATCH 4/4] arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board Vinayak Kale
@ 2013-04-20 7:39 ` Arnd Bergmann
2013-04-20 9:19 ` Vinayak Kale
2013-04-22 11:14 ` Mark Rutland
` (2 subsequent siblings)
3 siblings, 1 reply; 20+ messages in thread
From: Arnd Bergmann @ 2013-04-20 7:39 UTC (permalink / raw)
To: linux-arm-kernel
On Saturday 20 April 2013 12:45:31 Vinayak Kale wrote:
> This patch adds initial DTS files required for APM Mustang board.
>
> Signed-off-by: Kumar Sankaran <ksankaran@apm.com>
> Signed-off-by: Loc Ho <lho@apm.com>
> Signed-off-by: Feng Kan <fkan@apm.com>
Looks ok, just one comment
> + soc {
> + compatible = "simple-bus";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + serial0: uart0 at 1c020000 {
> + device_type = "serial";
> + compatible = "ns16550";
> + reg = <0 0x1c020000 0x0 0x1000>;
> + reg-shift = <2>;
> + clock-frequency = <10000000>; /* Updated by bootloader */
> + interrupt-parent = <&gic>;
> + interrupts = <0x0 0x4c 0x4>;
> + };
> + };
> +};
The standard name for the uart is "serial", not "uart0". Please never use
numbers in the name part of the device, the idea is that you have the
same name for each device of the same kind and ambiguate them by the
address part or using a label. If you have multiple uarts on the SoC,
I would also recommend listing all of them here, and marking them
as status="disabled", and then have an entry in the board specific
.dts file to mark the ones that are connected to the outside like
&serial0 {
status = enabled;
};
Arnd
^ permalink raw reply [flat|nested] 20+ messages in thread* [PATCH 4/4] arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board
2013-04-20 7:39 ` Arnd Bergmann
@ 2013-04-20 9:19 ` Vinayak Kale
0 siblings, 0 replies; 20+ messages in thread
From: Vinayak Kale @ 2013-04-20 9:19 UTC (permalink / raw)
To: linux-arm-kernel
On Sat, Apr 20, 2013 at 1:09 PM, Arnd Bergmann <arnd@arndb.de> wrote:
> On Saturday 20 April 2013 12:45:31 Vinayak Kale wrote:
>> This patch adds initial DTS files required for APM Mustang board.
>>
>> Signed-off-by: Kumar Sankaran <ksankaran@apm.com>
>> Signed-off-by: Loc Ho <lho@apm.com>
>> Signed-off-by: Feng Kan <fkan@apm.com>
>
> Looks ok, just one comment
>
>> + soc {
>> + compatible = "simple-bus";
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> + ranges;
>> +
>> + serial0: uart0 at 1c020000 {
>> + device_type = "serial";
>> + compatible = "ns16550";
>> + reg = <0 0x1c020000 0x0 0x1000>;
>> + reg-shift = <2>;
>> + clock-frequency = <10000000>; /* Updated by bootloader */
>> + interrupt-parent = <&gic>;
>> + interrupts = <0x0 0x4c 0x4>;
>> + };
>> + };
>> +};
>
> The standard name for the uart is "serial", not "uart0". Please never use
> numbers in the name part of the device, the idea is that you have the
> same name for each device of the same kind and ambiguate them by the
> address part or using a label. If you have multiple uarts on the SoC,
> I would also recommend listing all of them here, and marking them
> as status="disabled", and then have an entry in the board specific
> .dts file to mark the ones that are connected to the outside like
>
> &serial0 {
> status = enabled;
> };
Okay.
>
> Arnd
Thanks
-Vinayak
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 4/4] arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board
2013-04-20 7:15 ` [PATCH 4/4] arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board Vinayak Kale
2013-04-20 7:39 ` Arnd Bergmann
@ 2013-04-22 11:14 ` Mark Rutland
2013-04-22 12:23 ` Vinayak Kale
2013-04-22 20:59 ` Rob Herring
2013-04-23 18:11 ` Olof Johansson
3 siblings, 1 reply; 20+ messages in thread
From: Mark Rutland @ 2013-04-22 11:14 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
I have a couple of minor comments on the dts:
> diff --git a/arch/arm64/boot/dts/storm.dtsi b/arch/arm64/boot/dts/storm.dtsi
> new file mode 100644
> index 0000000..8cab5d1
> --- /dev/null
> +++ b/arch/arm64/boot/dts/storm.dtsi
> @@ -0,0 +1,116 @@
> +/*
> + * dts file for AppliedMicro (APM) X-Gene Storm SOC
> + *
> + * Copyright (C) 2013, Applied Micro Circuits Corporation
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + */
> +
> +/ {
> + compatible = "apm,xgene,storm", "apm,xgene";
> + interrupt-parent = <&gic>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + cpus {
> + #address-cells = <1>;
The reg is 64-bit, so address-cells should be 2.
> + #size-cells = <0>;
> +
> + cpu at 0 {
> + device_type = "cpu";
> + compatible = "arm,armv8";
It might be good to also have a compatible string for the X-Gene's CPU
implementation, e.g.
compatible = "apm,xgene-cpu", "arm,armv8";
> + reg = <0x0 0x0000>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0x1 0x0000fff8>;
> + };
> + cpu at 1 {
> + device_type = "cpu";
> + compatible = "arm,armv8";
> + reg = <0x0 0x0001>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0x1 0x0000fff8>;
> + };
> + cpu at 2 {
> + device_type = "cpu";
> + compatible = "arm,armv8";
> + reg = <0x0 0x0100>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0x1 0x0000fff8>;
> + };
This should be cpu at 101 to match the reg property (and the following nodes
should be fixed up similarly).
> + cpu at 3 {
> + device_type = "cpu";
> + compatible = "arm,armv8";
> + reg = <0x0 0x0101>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0x1 0x0000fff8>;
> + };
> + cpu at 4 {
> + device_type = "cpu";
> + compatible = "arm,armv8";
> + reg = <0x0 0x0200>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0x1 0x0000fff8>;
> + };
> + cpu at 5 {
> + device_type = "cpu";
> + compatible = "arm,armv8";
> + reg = <0x0 0x0201>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0x1 0x0000fff8>;
> + };
> + cpu at 6 {
> + device_type = "cpu";
> + compatible = "arm,armv8";
> + reg = <0x0 0x0300>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0x1 0x0000fff8>;
> + };
> + cpu at 7 {
> + device_type = "cpu";
> + compatible = "arm,armv8";
> + reg = <0x0 0x0301>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0x1 0x0000fff8>;
> + };
> + };
[...]
Thanks,
Mark.
^ permalink raw reply [flat|nested] 20+ messages in thread* [PATCH 4/4] arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board
2013-04-22 11:14 ` Mark Rutland
@ 2013-04-22 12:23 ` Vinayak Kale
2013-04-22 12:59 ` Mark Rutland
0 siblings, 1 reply; 20+ messages in thread
From: Vinayak Kale @ 2013-04-22 12:23 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Apr 22, 2013 at 4:44 PM, Mark Rutland <mark.rutland@arm.com> wrote:
> Hi,
>
> I have a couple of minor comments on the dts:
>
>> diff --git a/arch/arm64/boot/dts/storm.dtsi b/arch/arm64/boot/dts/storm.dtsi
>> new file mode 100644
>> index 0000000..8cab5d1
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/storm.dtsi
>> @@ -0,0 +1,116 @@
>> +/*
>> + * dts file for AppliedMicro (APM) X-Gene Storm SOC
>> + *
>> + * Copyright (C) 2013, Applied Micro Circuits Corporation
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of
>> + * the License, or (at your option) any later version.
>> + */
>> +
>> +/ {
>> + compatible = "apm,xgene,storm", "apm,xgene";
>> + interrupt-parent = <&gic>;
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> +
>> + cpus {
>> + #address-cells = <1>;
>
> The reg is 64-bit, so address-cells should be 2.
>
Please see my comment below regarding 'reg' property & cpu node naming.
>> + #size-cells = <0>;
>> +
>> + cpu at 0 {
>> + device_type = "cpu";
>> + compatible = "arm,armv8";
>
> It might be good to also have a compatible string for the X-Gene's CPU
> implementation, e.g.
>
> compatible = "apm,xgene-cpu", "arm,armv8";
>
Okay, will add a compatible string for APM-Xgene.
>> + reg = <0x0 0x0000>;
>> + enable-method = "spin-table";
>> + cpu-release-addr = <0x1 0x0000fff8>;
>> + };
>> + cpu at 1 {
>> + device_type = "cpu";
>> + compatible = "arm,armv8";
>> + reg = <0x0 0x0001>;
>> + enable-method = "spin-table";
>> + cpu-release-addr = <0x1 0x0000fff8>;
>> + };
>> + cpu at 2 {
>> + device_type = "cpu";
>> + compatible = "arm,armv8";
>> + reg = <0x0 0x0100>;
>> + enable-method = "spin-table";
>> + cpu-release-addr = <0x1 0x0000fff8>;
>> + };
>
> This should be cpu at 101 to match the reg property (and the following nodes
> should be fixed up similarly).
>
I would like to keep the cpu numbering as is (0 to 7). It helps the
boot-loader to iterate over cpu nodes based on logical numbers to do
fix-ups. Also here 'reg' property is not holding an address instead it
contains value to be compared with mpidr_el1.
>> + cpu at 3 {
>> + device_type = "cpu";
>> + compatible = "arm,armv8";
>> + reg = <0x0 0x0101>;
>> + enable-method = "spin-table";
>> + cpu-release-addr = <0x1 0x0000fff8>;
>> + };
>> + cpu at 4 {
>> + device_type = "cpu";
>> + compatible = "arm,armv8";
>> + reg = <0x0 0x0200>;
>> + enable-method = "spin-table";
>> + cpu-release-addr = <0x1 0x0000fff8>;
>> + };
>> + cpu at 5 {
>> + device_type = "cpu";
>> + compatible = "arm,armv8";
>> + reg = <0x0 0x0201>;
>> + enable-method = "spin-table";
>> + cpu-release-addr = <0x1 0x0000fff8>;
>> + };
>> + cpu at 6 {
>> + device_type = "cpu";
>> + compatible = "arm,armv8";
>> + reg = <0x0 0x0300>;
>> + enable-method = "spin-table";
>> + cpu-release-addr = <0x1 0x0000fff8>;
>> + };
>> + cpu at 7 {
>> + device_type = "cpu";
>> + compatible = "arm,armv8";
>> + reg = <0x0 0x0301>;
>> + enable-method = "spin-table";
>> + cpu-release-addr = <0x1 0x0000fff8>;
>> + };
>> + };
>
> [...]
>
> Thanks,
> Mark.
^ permalink raw reply [flat|nested] 20+ messages in thread* [PATCH 4/4] arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board
2013-04-22 12:23 ` Vinayak Kale
@ 2013-04-22 12:59 ` Mark Rutland
2013-04-22 13:27 ` Vinayak Kale
0 siblings, 1 reply; 20+ messages in thread
From: Mark Rutland @ 2013-04-22 12:59 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Apr 22, 2013 at 01:23:51PM +0100, Vinayak Kale wrote:
> On Mon, Apr 22, 2013 at 4:44 PM, Mark Rutland <mark.rutland@arm.com> wrote:
> > Hi,
> >
> > I have a couple of minor comments on the dts:
> >
> >> diff --git a/arch/arm64/boot/dts/storm.dtsi b/arch/arm64/boot/dts/storm.dtsi
> >> new file mode 100644
> >> index 0000000..8cab5d1
> >> --- /dev/null
> >> +++ b/arch/arm64/boot/dts/storm.dtsi
> >> @@ -0,0 +1,116 @@
> >> +/*
> >> + * dts file for AppliedMicro (APM) X-Gene Storm SOC
> >> + *
> >> + * Copyright (C) 2013, Applied Micro Circuits Corporation
> >> + *
> >> + * This program is free software; you can redistribute it and/or
> >> + * modify it under the terms of the GNU General Public License as
> >> + * published by the Free Software Foundation; either version 2 of
> >> + * the License, or (at your option) any later version.
> >> + */
> >> +
> >> +/ {
> >> + compatible = "apm,xgene,storm", "apm,xgene";
> >> + interrupt-parent = <&gic>;
> >> + #address-cells = <2>;
> >> + #size-cells = <2>;
> >> +
> >> + cpus {
> >> + #address-cells = <1>;
> >
> > The reg is 64-bit, so address-cells should be 2.
> >
> Please see my comment below regarding 'reg' property & cpu node naming.
> >> + #size-cells = <0>;
> >> +
> >> + cpu at 0 {
> >> + device_type = "cpu";
> >> + compatible = "arm,armv8";
> >
> > It might be good to also have a compatible string for the X-Gene's CPU
> > implementation, e.g.
> >
> > compatible = "apm,xgene-cpu", "arm,armv8";
> >
> Okay, will add a compatible string for APM-Xgene.
> >> + reg = <0x0 0x0000>;
> >> + enable-method = "spin-table";
> >> + cpu-release-addr = <0x1 0x0000fff8>;
> >> + };
> >> + cpu at 1 {
> >> + device_type = "cpu";
> >> + compatible = "arm,armv8";
> >> + reg = <0x0 0x0001>;
> >> + enable-method = "spin-table";
> >> + cpu-release-addr = <0x1 0x0000fff8>;
> >> + };
> >> + cpu at 2 {
> >> + device_type = "cpu";
> >> + compatible = "arm,armv8";
> >> + reg = <0x0 0x0100>;
> >> + enable-method = "spin-table";
> >> + cpu-release-addr = <0x1 0x0000fff8>;
> >> + };
> >
> > This should be cpu at 101 to match the reg property (and the following nodes
> > should be fixed up similarly).
> >
> I would like to keep the cpu numbering as is (0 to 7). It helps the
> boot-loader to iterate over cpu nodes based on logical numbers to do
> fix-ups. Also here 'reg' property is not holding an address instead it
> contains value to be compared with mpidr_el1.
We use the address bits in a cpu node's reg property to hold the mpidr_el1
value. Regardless of the semantics of an address vs CPU id, the address bits in
the reg property take 2 cells, and hence #address-cells should be 2, as ePAPR
states:
"The #address-cells property defines the number of <u32> cells used to encode
the address field in a child node?s reg property."
Regarding the unit-address, ePAPR states:
"The unit-address must match the first address specified in the reg property of
the node."
We've tried to stick to this so far.
Thanks,
Mark.
^ permalink raw reply [flat|nested] 20+ messages in thread* [PATCH 4/4] arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board
2013-04-22 12:59 ` Mark Rutland
@ 2013-04-22 13:27 ` Vinayak Kale
0 siblings, 0 replies; 20+ messages in thread
From: Vinayak Kale @ 2013-04-22 13:27 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Apr 22, 2013 at 6:29 PM, Mark Rutland <mark.rutland@arm.com> wrote:
> On Mon, Apr 22, 2013 at 01:23:51PM +0100, Vinayak Kale wrote:
>> On Mon, Apr 22, 2013 at 4:44 PM, Mark Rutland <mark.rutland@arm.com> wrote:
>> > Hi,
>> >
>> > I have a couple of minor comments on the dts:
>> >
>> >> diff --git a/arch/arm64/boot/dts/storm.dtsi b/arch/arm64/boot/dts/storm.dtsi
>> >> new file mode 100644
>> >> index 0000000..8cab5d1
>> >> --- /dev/null
>> >> +++ b/arch/arm64/boot/dts/storm.dtsi
>> >> @@ -0,0 +1,116 @@
>> >> +/*
>> >> + * dts file for AppliedMicro (APM) X-Gene Storm SOC
>> >> + *
>> >> + * Copyright (C) 2013, Applied Micro Circuits Corporation
>> >> + *
>> >> + * This program is free software; you can redistribute it and/or
>> >> + * modify it under the terms of the GNU General Public License as
>> >> + * published by the Free Software Foundation; either version 2 of
>> >> + * the License, or (at your option) any later version.
>> >> + */
>> >> +
>> >> +/ {
>> >> + compatible = "apm,xgene,storm", "apm,xgene";
>> >> + interrupt-parent = <&gic>;
>> >> + #address-cells = <2>;
>> >> + #size-cells = <2>;
>> >> +
>> >> + cpus {
>> >> + #address-cells = <1>;
>> >
>> > The reg is 64-bit, so address-cells should be 2.
>> >
>> Please see my comment below regarding 'reg' property & cpu node naming.
>> >> + #size-cells = <0>;
>> >> +
>> >> + cpu at 0 {
>> >> + device_type = "cpu";
>> >> + compatible = "arm,armv8";
>> >
>> > It might be good to also have a compatible string for the X-Gene's CPU
>> > implementation, e.g.
>> >
>> > compatible = "apm,xgene-cpu", "arm,armv8";
>> >
>> Okay, will add a compatible string for APM-Xgene.
>> >> + reg = <0x0 0x0000>;
>> >> + enable-method = "spin-table";
>> >> + cpu-release-addr = <0x1 0x0000fff8>;
>> >> + };
>> >> + cpu at 1 {
>> >> + device_type = "cpu";
>> >> + compatible = "arm,armv8";
>> >> + reg = <0x0 0x0001>;
>> >> + enable-method = "spin-table";
>> >> + cpu-release-addr = <0x1 0x0000fff8>;
>> >> + };
>> >> + cpu at 2 {
>> >> + device_type = "cpu";
>> >> + compatible = "arm,armv8";
>> >> + reg = <0x0 0x0100>;
>> >> + enable-method = "spin-table";
>> >> + cpu-release-addr = <0x1 0x0000fff8>;
>> >> + };
>> >
>> > This should be cpu at 101 to match the reg property (and the following nodes
>> > should be fixed up similarly).
>> >
>> I would like to keep the cpu numbering as is (0 to 7). It helps the
>> boot-loader to iterate over cpu nodes based on logical numbers to do
>> fix-ups. Also here 'reg' property is not holding an address instead it
>> contains value to be compared with mpidr_el1.
>
> We use the address bits in a cpu node's reg property to hold the mpidr_el1
> value. Regardless of the semantics of an address vs CPU id, the address bits in
> the reg property take 2 cells, and hence #address-cells should be 2, as ePAPR
> states:
>
> "The #address-cells property defines the number of <u32> cells used to encode
> the address field in a child node?s reg property."
>
> Regarding the unit-address, ePAPR states:
>
> "The unit-address must match the first address specified in the reg property of
> the node."
>
> We've tried to stick to this so far.
>
Okay, will modify accordingly.
> Thanks,
> Mark.
Thanks
-Vinayak
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 4/4] arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board
2013-04-20 7:15 ` [PATCH 4/4] arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board Vinayak Kale
2013-04-20 7:39 ` Arnd Bergmann
2013-04-22 11:14 ` Mark Rutland
@ 2013-04-22 20:59 ` Rob Herring
2013-04-23 5:27 ` Vinayak Kale
2013-04-23 18:11 ` Olof Johansson
3 siblings, 1 reply; 20+ messages in thread
From: Rob Herring @ 2013-04-22 20:59 UTC (permalink / raw)
To: linux-arm-kernel
On 04/20/2013 02:15 AM, Vinayak Kale wrote:
> This patch adds initial DTS files required for APM Mustang board.
>
> Signed-off-by: Kumar Sankaran <ksankaran@apm.com>
> Signed-off-by: Loc Ho <lho@apm.com>
> Signed-off-by: Feng Kan <fkan@apm.com>
> ---
> arch/arm64/boot/dts/Makefile | 1 +
> arch/arm64/boot/dts/mustang.dts | 28 +++++++++
> arch/arm64/boot/dts/storm.dtsi | 116 +++++++++++++++++++++++++++++++++++++++
Can you add "apm" to these filenames.
> 3 files changed, 145 insertions(+), 0 deletions(-)
> create mode 100644 arch/arm64/boot/dts/mustang.dts
> create mode 100644 arch/arm64/boot/dts/storm.dtsi
>
> diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
> index 68457e9..faeab34 100644
> --- a/arch/arm64/boot/dts/Makefile
> +++ b/arch/arm64/boot/dts/Makefile
> @@ -1,4 +1,5 @@
> dtb-$(CONFIG_ARCH_VEXPRESS) += rtsm_ve-aemv8a.dtb foundation-v8.dtb
> +dtb-$(CONFIG_ARCH_XGENE) += mustang.dtb
>
> targets += dtbs
> targets += $(dtb-y)
> diff --git a/arch/arm64/boot/dts/mustang.dts b/arch/arm64/boot/dts/mustang.dts
> new file mode 100644
> index 0000000..a061c99
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mustang.dts
> @@ -0,0 +1,28 @@
> +/*
> + * dts file for AppliedMicro (APM) Mustang Board
> + *
> + * Copyright (C) 2013, Applied Micro Circuits Corporation
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + */
> +
> +/dts-v1/;
> +
> +/include/ "storm.dtsi"
> +
> +/ {
> + model = "mustang";
> +
> + /* chosen */
Wow, that's a useful comment.
> + chosen {
> + linux,stdout-path = &serial0;
I don't think this is needed if you only have a single uart.
> + };
> +
> + memory {
> + device_type = "memory";
> + reg = < 0x1 0x00000000 0x0 0x80000000 >; /* Updated by bootloader */
> + };
> +};
> diff --git a/arch/arm64/boot/dts/storm.dtsi b/arch/arm64/boot/dts/storm.dtsi
> new file mode 100644
> index 0000000..8cab5d1
> --- /dev/null
> +++ b/arch/arm64/boot/dts/storm.dtsi
> @@ -0,0 +1,116 @@
> +/*
> + * dts file for AppliedMicro (APM) X-Gene Storm SOC
> + *
> + * Copyright (C) 2013, Applied Micro Circuits Corporation
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + */
> +
> +/ {
> + compatible = "apm,xgene,storm", "apm,xgene";
Need to add documentation for the binding and the vendor prefix if it is
not already there.
> + interrupt-parent = <&gic>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu at 0 {
> + device_type = "cpu";
> + compatible = "arm,armv8";
> + reg = <0x0 0x0000>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0x1 0x0000fff8>;
> + };
> + cpu at 1 {
> + device_type = "cpu";
> + compatible = "arm,armv8";
> + reg = <0x0 0x0001>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0x1 0x0000fff8>;
> + };
> + cpu at 2 {
> + device_type = "cpu";
> + compatible = "arm,armv8";
> + reg = <0x0 0x0100>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0x1 0x0000fff8>;
> + };
> + cpu at 3 {
> + device_type = "cpu";
> + compatible = "arm,armv8";
> + reg = <0x0 0x0101>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0x1 0x0000fff8>;
> + };
> + cpu at 4 {
> + device_type = "cpu";
> + compatible = "arm,armv8";
> + reg = <0x0 0x0200>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0x1 0x0000fff8>;
> + };
> + cpu at 5 {
> + device_type = "cpu";
> + compatible = "arm,armv8";
> + reg = <0x0 0x0201>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0x1 0x0000fff8>;
> + };
> + cpu at 6 {
> + device_type = "cpu";
> + compatible = "arm,armv8";
> + reg = <0x0 0x0300>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0x1 0x0000fff8>;
> + };
> + cpu at 7 {
> + device_type = "cpu";
> + compatible = "arm,armv8";
> + reg = <0x0 0x0301>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0x1 0x0000fff8>;
> + };
> + };
> +
> + gic: interrupt-controller at 78010000 {
> + compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
> + #interrupt-cells = <3>;
> + interrupt-controller;
> + reg = <0x0 0x78010000 0x0 0x1000>, /* GIC Dist */
> + <0x0 0x78020000 0x0 0x1000>, /* GIC CPU */
> + <0x0 0x78040000 0x0 0x2000>, /* GIC VCPU Control */
> + <0x0 0x78060000 0x0 0x2000>; /* GIC VCPU */
> + interrupts = <1 9 0xf04>; /* GIC Maintenence IRQ */
> + };
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupts = <1 0 0xff01>, /* Secure Phys IRQ */
> + <1 13 0xff01>, /* Non-secure Phys IRQ */
> + <1 14 0xff01>, /* Virt IRQ */
> + <1 15 0xff01>; /* Hyp IRQ */
> + clock-frequency = <50000000>;
> + };
> +
> + soc {
> + compatible = "simple-bus";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + serial0: uart0 at 1c020000 {
> + device_type = "serial";
> + compatible = "ns16550";
> + reg = <0 0x1c020000 0x0 0x1000>;
> + reg-shift = <2>;
> + clock-frequency = <10000000>; /* Updated by bootloader */
> + interrupt-parent = <&gic>;
> + interrupts = <0x0 0x4c 0x4>;
> + };
> + };
> +};
>
^ permalink raw reply [flat|nested] 20+ messages in thread* [PATCH 4/4] arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board
2013-04-22 20:59 ` Rob Herring
@ 2013-04-23 5:27 ` Vinayak Kale
0 siblings, 0 replies; 20+ messages in thread
From: Vinayak Kale @ 2013-04-23 5:27 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Apr 23, 2013 at 2:29 AM, Rob Herring <robherring2@gmail.com> wrote:
> On 04/20/2013 02:15 AM, Vinayak Kale wrote:
>> This patch adds initial DTS files required for APM Mustang board.
>>
>> Signed-off-by: Kumar Sankaran <ksankaran@apm.com>
>> Signed-off-by: Loc Ho <lho@apm.com>
>> Signed-off-by: Feng Kan <fkan@apm.com>
>> ---
>> arch/arm64/boot/dts/Makefile | 1 +
>> arch/arm64/boot/dts/mustang.dts | 28 +++++++++
>> arch/arm64/boot/dts/storm.dtsi | 116 +++++++++++++++++++++++++++++++++++++++
>
> Can you add "apm" to these filenames.
>
Okay, I'll add 'apm-' prefix to dts filenames.
>> 3 files changed, 145 insertions(+), 0 deletions(-)
>> create mode 100644 arch/arm64/boot/dts/mustang.dts
>> create mode 100644 arch/arm64/boot/dts/storm.dtsi
>>
>> diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
>> index 68457e9..faeab34 100644
>> --- a/arch/arm64/boot/dts/Makefile
>> +++ b/arch/arm64/boot/dts/Makefile
>> @@ -1,4 +1,5 @@
>> dtb-$(CONFIG_ARCH_VEXPRESS) += rtsm_ve-aemv8a.dtb foundation-v8.dtb
>> +dtb-$(CONFIG_ARCH_XGENE) += mustang.dtb
>>
>> targets += dtbs
>> targets += $(dtb-y)
>> diff --git a/arch/arm64/boot/dts/mustang.dts b/arch/arm64/boot/dts/mustang.dts
>> new file mode 100644
>> index 0000000..a061c99
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/mustang.dts
>> @@ -0,0 +1,28 @@
>> +/*
>> + * dts file for AppliedMicro (APM) Mustang Board
>> + *
>> + * Copyright (C) 2013, Applied Micro Circuits Corporation
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of
>> + * the License, or (at your option) any later version.
>> + */
>> +
>> +/dts-v1/;
>> +
>> +/include/ "storm.dtsi"
>> +
>> +/ {
>> + model = "mustang";
>> +
>> + /* chosen */
>
> Wow, that's a useful comment.
>
>> + chosen {
>> + linux,stdout-path = &serial0;
>
> I don't think this is needed if you only have a single uart.
>
In subsequent patches we will add other serial nodes in the dts.
>> + };
>> +
>> + memory {
>> + device_type = "memory";
>> + reg = < 0x1 0x00000000 0x0 0x80000000 >; /* Updated by bootloader */
>> + };
>> +};
>> diff --git a/arch/arm64/boot/dts/storm.dtsi b/arch/arm64/boot/dts/storm.dtsi
>> new file mode 100644
>> index 0000000..8cab5d1
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/storm.dtsi
>> @@ -0,0 +1,116 @@
>> +/*
>> + * dts file for AppliedMicro (APM) X-Gene Storm SOC
>> + *
>> + * Copyright (C) 2013, Applied Micro Circuits Corporation
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of
>> + * the License, or (at your option) any later version.
>> + */
>> +
>> +/ {
>> + compatible = "apm,xgene,storm", "apm,xgene";
>
> Need to add documentation for the binding and the vendor prefix if it is
> not already there.
>
>> + interrupt-parent = <&gic>;
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> +
>> + cpus {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + cpu at 0 {
>> + device_type = "cpu";
>> + compatible = "arm,armv8";
>> + reg = <0x0 0x0000>;
>> + enable-method = "spin-table";
>> + cpu-release-addr = <0x1 0x0000fff8>;
>> + };
>> + cpu at 1 {
>> + device_type = "cpu";
>> + compatible = "arm,armv8";
>> + reg = <0x0 0x0001>;
>> + enable-method = "spin-table";
>> + cpu-release-addr = <0x1 0x0000fff8>;
>> + };
>> + cpu at 2 {
>> + device_type = "cpu";
>> + compatible = "arm,armv8";
>> + reg = <0x0 0x0100>;
>> + enable-method = "spin-table";
>> + cpu-release-addr = <0x1 0x0000fff8>;
>> + };
>> + cpu at 3 {
>> + device_type = "cpu";
>> + compatible = "arm,armv8";
>> + reg = <0x0 0x0101>;
>> + enable-method = "spin-table";
>> + cpu-release-addr = <0x1 0x0000fff8>;
>> + };
>> + cpu at 4 {
>> + device_type = "cpu";
>> + compatible = "arm,armv8";
>> + reg = <0x0 0x0200>;
>> + enable-method = "spin-table";
>> + cpu-release-addr = <0x1 0x0000fff8>;
>> + };
>> + cpu at 5 {
>> + device_type = "cpu";
>> + compatible = "arm,armv8";
>> + reg = <0x0 0x0201>;
>> + enable-method = "spin-table";
>> + cpu-release-addr = <0x1 0x0000fff8>;
>> + };
>> + cpu at 6 {
>> + device_type = "cpu";
>> + compatible = "arm,armv8";
>> + reg = <0x0 0x0300>;
>> + enable-method = "spin-table";
>> + cpu-release-addr = <0x1 0x0000fff8>;
>> + };
>> + cpu at 7 {
>> + device_type = "cpu";
>> + compatible = "arm,armv8";
>> + reg = <0x0 0x0301>;
>> + enable-method = "spin-table";
>> + cpu-release-addr = <0x1 0x0000fff8>;
>> + };
>> + };
>> +
>> + gic: interrupt-controller at 78010000 {
>> + compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
>> + #interrupt-cells = <3>;
>> + interrupt-controller;
>> + reg = <0x0 0x78010000 0x0 0x1000>, /* GIC Dist */
>> + <0x0 0x78020000 0x0 0x1000>, /* GIC CPU */
>> + <0x0 0x78040000 0x0 0x2000>, /* GIC VCPU Control */
>> + <0x0 0x78060000 0x0 0x2000>; /* GIC VCPU */
>> + interrupts = <1 9 0xf04>; /* GIC Maintenence IRQ */
>> + };
>> +
>> + timer {
>> + compatible = "arm,armv8-timer";
>> + interrupts = <1 0 0xff01>, /* Secure Phys IRQ */
>> + <1 13 0xff01>, /* Non-secure Phys IRQ */
>> + <1 14 0xff01>, /* Virt IRQ */
>> + <1 15 0xff01>; /* Hyp IRQ */
>> + clock-frequency = <50000000>;
>> + };
>> +
>> + soc {
>> + compatible = "simple-bus";
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> + ranges;
>> +
>> + serial0: uart0 at 1c020000 {
>> + device_type = "serial";
>> + compatible = "ns16550";
>> + reg = <0 0x1c020000 0x0 0x1000>;
>> + reg-shift = <2>;
>> + clock-frequency = <10000000>; /* Updated by bootloader */
>> + interrupt-parent = <&gic>;
>> + interrupts = <0x0 0x4c 0x4>;
>> + };
>> + };
>> +};
>>
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 4/4] arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board
2013-04-20 7:15 ` [PATCH 4/4] arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board Vinayak Kale
` (2 preceding siblings ...)
2013-04-22 20:59 ` Rob Herring
@ 2013-04-23 18:11 ` Olof Johansson
2013-04-24 6:21 ` Vinayak Kale
3 siblings, 1 reply; 20+ messages in thread
From: Olof Johansson @ 2013-04-23 18:11 UTC (permalink / raw)
To: linux-arm-kernel
On Sat, Apr 20, 2013 at 12:45:31PM +0530, Vinayak Kale wrote:
> + gic: interrupt-controller at 78010000 {
> + compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
> + #interrupt-cells = <3>;
> + interrupt-controller;
> + reg = <0x0 0x78010000 0x0 0x1000>, /* GIC Dist */
> + <0x0 0x78020000 0x0 0x1000>, /* GIC CPU */
> + <0x0 0x78040000 0x0 0x2000>, /* GIC VCPU Control */
> + <0x0 0x78060000 0x0 0x2000>; /* GIC VCPU */
> + interrupts = <1 9 0xf04>; /* GIC Maintenence IRQ */
> + };
Others have commented on other compatible fields, so it's my turn. :-)
Is this the exact same GIC that's used with A15? I don't think it is? It might
make more sense to use a new compatible field and add it to the driver.
Also, other platforms have removed the a9 fallback, so even if you happen to
have an a15-compatible gic, in this case you should at least take out the a9
string.
-Olof
^ permalink raw reply [flat|nested] 20+ messages in thread* [PATCH 4/4] arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board
2013-04-23 18:11 ` Olof Johansson
@ 2013-04-24 6:21 ` Vinayak Kale
0 siblings, 0 replies; 20+ messages in thread
From: Vinayak Kale @ 2013-04-24 6:21 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Apr 23, 2013 at 11:41 PM, Olof Johansson <olof@lixom.net> wrote:
> On Sat, Apr 20, 2013 at 12:45:31PM +0530, Vinayak Kale wrote:
>
>> + gic: interrupt-controller at 78010000 {
>> + compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
>> + #interrupt-cells = <3>;
>> + interrupt-controller;
>> + reg = <0x0 0x78010000 0x0 0x1000>, /* GIC Dist */
>> + <0x0 0x78020000 0x0 0x1000>, /* GIC CPU */
>> + <0x0 0x78040000 0x0 0x2000>, /* GIC VCPU Control */
>> + <0x0 0x78060000 0x0 0x2000>; /* GIC VCPU */
>> + interrupts = <1 9 0xf04>; /* GIC Maintenence IRQ */
>> + };
>
> Others have commented on other compatible fields, so it's my turn. :-)
>
> Is this the exact same GIC that's used with A15? I don't think it is? It might
> make more sense to use a new compatible field and add it to the driver.
>
> Also, other platforms have removed the a9 fallback, so even if you happen to
> have an a15-compatible gic, in this case you should at least take out the a9
> string.
>
Okay, will remove a9-gic string. Our's is a15-compatible gic, will use
a15 string.
>
> -Olof
Thanks
-Vinayak
^ permalink raw reply [flat|nested] 20+ messages in thread