[PATCH 1/3] arm64: dts: ti: k3-am62p: Fix memory ranges for GPU

[PATCH 1/3] arm64: dts: ti: k3-am62p: Fix memory ranges for GPU

[rs]

From: Randolph Sapp <rs@ti.com>

Update the memory region listed in the k3-am62p.dtsi for the BXS-4-64
GPU to match the Main Memory Map described in the TRM [1].

[1] https://www.ti.com/lit/ug/spruj83b/spruj83b.pdf

Fixes: 29075cc09f43 ("arm64: dts: ti: Introduce AM62P5 family of SoCs")
Signed-off-by: Randolph Sapp <rs@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am62p.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am62p.dtsi b/arch/arm64/boot/dts/ti/k3-am62p.dtsi
index 75a15c368c11..dd24c40c7965 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p.dtsi
@@ -59,7 +59,7 @@ cbass_main: bus@f0000 {
 			 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
 			 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
 			 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
-			 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
+			 <0x00 0x0fd80000 0x00 0x0fd80000 0x00 0x00080000>, /* GPU */
 			 <0x00 0x20000000 0x00 0x20000000 0x00 0x0a008000>, /* Third peripheral window */
 			 <0x00 0x30040000 0x00 0x30040000 0x00 0x00080000>, /* PRUSS-M */
 			 <0x00 0x30101000 0x00 0x30101000 0x00 0x00010100>, /* CSI window */
-- 
2.50.1

[PATCH 2/3] arm64: dts: ti: k3-am62p-j722s: enable the bxs-4-64

[rs]

From: Randolph Sapp <rs@ti.com>

Add the relevant device tree node for Imagination's BXS-4-64 GPU.

These devices specifically do not set the dma-coherent bit because they
do not use the same MSMC configuration as other BXS-4-64 enabled TI
platforms.

Signed-off-by: Randolph Sapp <rs@ti.com>
---
 .../boot/dts/ti/k3-am62p-j722s-common-main.dtsi     | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
index 2e5e25a8ca86..a51db8f9dff8 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
@@ -690,6 +690,19 @@ ospi0: spi@fc40000 {
 		};
 	};
 
+	gpu: gpu@fd80000 {
+		compatible = "ti,j721s2-gpu", "img,img-bxs-4-64", "img,img-rogue";
+		reg = <0x00 0x0fd80000 0x00 0x80000>;
+		clocks = <&k3_clks 237 1>;
+		clock-names = "core";
+		assigned-clocks = <&k3_clks 237 1>;
+		assigned-clock-rates = <800000000>;
+		interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
+		power-domains = <&k3_pds 237 TI_SCI_PD_EXCLUSIVE>,
+				<&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;
+		power-domain-names = "a", "b";
+	};
+
 	cpsw3g: ethernet@8000000 {
 		compatible = "ti,am642-cpsw-nuss";
 		#address-cells = <2>;
-- 
2.50.1

[PATCH 3/3] arm64: dts: ti: k3-j784s4-j742s2: enable the bxs-4-64

[rs]

From: Randolph Sapp <rs@ti.com>

Add the relevant device tree node for Imagination's BXS-4-64 GPU.

These devices uses a similar MSMC configuration to the J721S2. As such,
they also require the use of the dma-coherent attribute.

Signed-off-by: Randolph Sapp <rs@ti.com>
---
 .../boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi  | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
index 7c5b0c69897d..a44ca34dda62 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
@@ -2691,4 +2691,18 @@ bist_main14: bist@33c0000 {
 		bootph-pre-ram;
 		ti,sci-dev-id = <234>;
 	};
+
+	gpu: gpu@4e20000000 {
+		compatible = "ti,j721s2-gpu", "img,img-bxs-4-64", "img,img-rogue";
+		reg = <0x4e 0x20000000 0x00 0x80000>;
+		clocks = <&k3_clks 181 1>;
+		clock-names = "core";
+		assigned-clocks = <&k3_clks 181 1>;
+		assigned-clock-rates = <800000000>;
+		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+		power-domains = <&k3_pds 181 TI_SCI_PD_EXCLUSIVE>,
+				<&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
+		power-domain-names = "a", "b";
+		dma-coherent;
+	};
 };
-- 
2.50.1

Re: [PATCH 2/3] arm64: dts: ti: k3-am62p-j722s: enable the bxs-4-64

[Nishanth Menon]

On 18:25-20250808, rs@ti.com wrote:
> From: Randolph Sapp <rs@ti.com>
> 
> Add the relevant device tree node for Imagination's BXS-4-64 GPU.
> 
> These devices specifically do not set the dma-coherent bit because they
> do not use the same MSMC configuration as other BXS-4-64 enabled TI
> platforms.
> 
> Signed-off-by: Randolph Sapp <rs@ti.com>
> ---
>  .../boot/dts/ti/k3-am62p-j722s-common-main.dtsi     | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
> index 2e5e25a8ca86..a51db8f9dff8 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
> @@ -690,6 +690,19 @@ ospi0: spi@fc40000 {
>  		};
>  	};
>  
> +	gpu: gpu@fd80000 {
> +		compatible = "ti,j721s2-gpu", "img,img-bxs-4-64", "img,img-rogue";

Note the discussion in https://lore.kernel.org/linux-arm-kernel/DBE4UO2RGAYX.17V1DAF8MQYJM@kernel.org/

> +		reg = <0x00 0x0fd80000 0x00 0x80000>;
> +		clocks = <&k3_clks 237 1>;
> +		clock-names = "core";
> +		assigned-clocks = <&k3_clks 237 1>;
> +		assigned-clock-rates = <800000000>;
> +		interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
> +		power-domains = <&k3_pds 237 TI_SCI_PD_EXCLUSIVE>,
> +				<&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;
> +		power-domain-names = "a", "b";
> +	};
> +
>  	cpsw3g: ethernet@8000000 {
>  		compatible = "ti,am642-cpsw-nuss";
>  		#address-cells = <2>;
> -- 
> 2.50.1
> 

Is the issue that Michael reported
https://lore.kernel.org/linux-arm-kernel/20250716134717.4085567-3-mwalle@kernel.org/
resolved?

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D
https://ti.com/opensource

Re: [PATCH 3/3] arm64: dts: ti: k3-j784s4-j742s2: enable the bxs-4-64

[Nishanth Menon]

On 18:25-20250808, rs@ti.com wrote:
> From: Randolph Sapp <rs@ti.com>
> 
> Add the relevant device tree node for Imagination's BXS-4-64 GPU.
> 
> These devices uses a similar MSMC configuration to the J721S2. As such,
> they also require the use of the dma-coherent attribute.
> 
> Signed-off-by: Randolph Sapp <rs@ti.com>
> ---
>  .../boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi  | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
> index 7c5b0c69897d..a44ca34dda62 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
> @@ -2691,4 +2691,18 @@ bist_main14: bist@33c0000 {
>  		bootph-pre-ram;
>  		ti,sci-dev-id = <234>;
>  	};
> +
> +	gpu: gpu@4e20000000 {
> +		compatible = "ti,j721s2-gpu", "img,img-bxs-4-64", "img,img-rogue";

Following  https://lore.kernel.org/linux-arm-kernel/DBE4UO2RGAYX.17V1DAF8MQYJM@kernel.org/
Is it worth having ti,j784s4-gpu here? Are there any SoC specific quirks
that driver will need to handle?

> +		reg = <0x4e 0x20000000 0x00 0x80000>;
> +		clocks = <&k3_clks 181 1>;
> +		clock-names = "core";
> +		assigned-clocks = <&k3_clks 181 1>;
> +		assigned-clock-rates = <800000000>;
> +		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
> +		power-domains = <&k3_pds 181 TI_SCI_PD_EXCLUSIVE>,
> +				<&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
> +		power-domain-names = "a", "b";
> +		dma-coherent;
> +	};
>  };
> -- 
> 2.50.1
> 

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D
https://ti.com/opensource

Re: [PATCH 2/3] arm64: dts: ti: k3-am62p-j722s: enable the bxs-4-64

[Randolph Sapp]

On Wed Aug 13, 2025 at 10:17 AM CDT, Nishanth Menon wrote:
> On 18:25-20250808, rs@ti.com wrote:
>> From: Randolph Sapp <rs@ti.com>
>> 
>> Add the relevant device tree node for Imagination's BXS-4-64 GPU.
>> 
>> These devices specifically do not set the dma-coherent bit because they
>> do not use the same MSMC configuration as other BXS-4-64 enabled TI
>> platforms.
>> 
>> Signed-off-by: Randolph Sapp <rs@ti.com>
>> ---
>>  .../boot/dts/ti/k3-am62p-j722s-common-main.dtsi     | 13 +++++++++++++
>>  1 file changed, 13 insertions(+)
>> 
>> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
>> index 2e5e25a8ca86..a51db8f9dff8 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
>> @@ -690,6 +690,19 @@ ospi0: spi@fc40000 {
>>  		};
>>  	};
>>  
>> +	gpu: gpu@fd80000 {
>> +		compatible = "ti,j721s2-gpu", "img,img-bxs-4-64", "img,img-rogue";
>
> Note the discussion in https://lore.kernel.org/linux-arm-kernel/DBE4UO2RGAYX.17V1DAF8MQYJM@kernel.org/
>
>> +		reg = <0x00 0x0fd80000 0x00 0x80000>;
>> +		clocks = <&k3_clks 237 1>;
>> +		clock-names = "core";
>> +		assigned-clocks = <&k3_clks 237 1>;
>> +		assigned-clock-rates = <800000000>;
>> +		interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
>> +		power-domains = <&k3_pds 237 TI_SCI_PD_EXCLUSIVE>,
>> +				<&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;
>> +		power-domain-names = "a", "b";
>> +	};
>> +
>>  	cpsw3g: ethernet@8000000 {
>>  		compatible = "ti,am642-cpsw-nuss";
>>  		#address-cells = <2>;
>> -- 
>> 2.50.1
>> 
>
> Is the issue that Michael reported
> https://lore.kernel.org/linux-arm-kernel/20250716134717.4085567-3-mwalle@kernel.org/
> resolved?

Define resolved. If by resolved you mean using the same hack we have had on the
out of tree module for years, then yes it is resolved.

Re: [PATCH 3/3] arm64: dts: ti: k3-j784s4-j742s2: enable the bxs-4-64

[Randolph Sapp]

On Wed Aug 13, 2025 at 10:18 AM CDT, Nishanth Menon wrote:
> On 18:25-20250808, rs@ti.com wrote:
>> From: Randolph Sapp <rs@ti.com>
>> 
>> Add the relevant device tree node for Imagination's BXS-4-64 GPU.
>> 
>> These devices uses a similar MSMC configuration to the J721S2. As such,
>> they also require the use of the dma-coherent attribute.
>> 
>> Signed-off-by: Randolph Sapp <rs@ti.com>
>> ---
>>  .../boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi  | 14 ++++++++++++++
>>  1 file changed, 14 insertions(+)
>> 
>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
>> index 7c5b0c69897d..a44ca34dda62 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
>> @@ -2691,4 +2691,18 @@ bist_main14: bist@33c0000 {
>>  		bootph-pre-ram;
>>  		ti,sci-dev-id = <234>;
>>  	};
>> +
>> +	gpu: gpu@4e20000000 {
>> +		compatible = "ti,j721s2-gpu", "img,img-bxs-4-64", "img,img-rogue";
>
> Following  https://lore.kernel.org/linux-arm-kernel/DBE4UO2RGAYX.17V1DAF8MQYJM@kernel.org/
> Is it worth having ti,j784s4-gpu here? Are there any SoC specific quirks
> that driver will need to handle?

No SoC specific quirks, aside from those already being tracked through the
dma-coherent attribute. If we actually want to register SoC specific
compatibility entries as advised by the kernel docs, just let me know. I've seen
this opinion toggle a few times.

>> +		reg = <0x4e 0x20000000 0x00 0x80000>;
>> +		clocks = <&k3_clks 181 1>;
>> +		clock-names = "core";
>> +		assigned-clocks = <&k3_clks 181 1>;
>> +		assigned-clock-rates = <800000000>;
>> +		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
>> +		power-domains = <&k3_pds 181 TI_SCI_PD_EXCLUSIVE>,
>> +				<&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
>> +		power-domain-names = "a", "b";
>> +		dma-coherent;
>> +	};
>>  };
>> -- 
>> 2.50.1
>> 

Re: [PATCH 2/3] arm64: dts: ti: k3-am62p-j722s: enable the bxs-4-64

[Nishanth Menon]

On 12:56-20250813, Randolph Sapp wrote:
> On Wed Aug 13, 2025 at 10:17 AM CDT, Nishanth Menon wrote:
> > On 18:25-20250808, rs@ti.com wrote:
> >> From: Randolph Sapp <rs@ti.com>
> >> 
> >> Add the relevant device tree node for Imagination's BXS-4-64 GPU.
> >> 
> >> These devices specifically do not set the dma-coherent bit because they
> >> do not use the same MSMC configuration as other BXS-4-64 enabled TI
> >> platforms.
> >> 
> >> Signed-off-by: Randolph Sapp <rs@ti.com>
> >> ---
> >>  .../boot/dts/ti/k3-am62p-j722s-common-main.dtsi     | 13 +++++++++++++
> >>  1 file changed, 13 insertions(+)
> >> 
> >> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
> >> index 2e5e25a8ca86..a51db8f9dff8 100644
> >> --- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
> >> +++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
> >> @@ -690,6 +690,19 @@ ospi0: spi@fc40000 {
> >>  		};
> >>  	};
> >>  
> >> +	gpu: gpu@fd80000 {
> >> +		compatible = "ti,j721s2-gpu", "img,img-bxs-4-64", "img,img-rogue";
> >
> > Note the discussion in https://lore.kernel.org/linux-arm-kernel/DBE4UO2RGAYX.17V1DAF8MQYJM@kernel.org/
> >
> >> +		reg = <0x00 0x0fd80000 0x00 0x80000>;
> >> +		clocks = <&k3_clks 237 1>;
> >> +		clock-names = "core";
> >> +		assigned-clocks = <&k3_clks 237 1>;
> >> +		assigned-clock-rates = <800000000>;
> >> +		interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
> >> +		power-domains = <&k3_pds 237 TI_SCI_PD_EXCLUSIVE>,
> >> +				<&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;
> >> +		power-domain-names = "a", "b";
> >> +	};
> >> +
> >>  	cpsw3g: ethernet@8000000 {
> >>  		compatible = "ti,am642-cpsw-nuss";
> >>  		#address-cells = <2>;
> >> -- 
> >> 2.50.1
> >> 
> >
> > Is the issue that Michael reported
> > https://lore.kernel.org/linux-arm-kernel/20250716134717.4085567-3-mwalle@kernel.org/
> > resolved?
> 
> Define resolved. If by resolved you mean using the same hack we have had on the
> out of tree module for years, then yes it is resolved.

Please share a bootlog with gpu and linux-next kernel with just this series
applied? Please provide complete lsmod and cat /proc/interrupts for
reference.

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D
https://ti.com/opensource

Re: [PATCH 3/3] arm64: dts: ti: k3-j784s4-j742s2: enable the bxs-4-64

[Nishanth Menon]

On 12:58-20250813, Randolph Sapp wrote:
> On Wed Aug 13, 2025 at 10:18 AM CDT, Nishanth Menon wrote:
> > On 18:25-20250808, rs@ti.com wrote:
> >> From: Randolph Sapp <rs@ti.com>
> >> 
> >> Add the relevant device tree node for Imagination's BXS-4-64 GPU.
> >> 
> >> These devices uses a similar MSMC configuration to the J721S2. As such,
> >> they also require the use of the dma-coherent attribute.
> >> 
> >> Signed-off-by: Randolph Sapp <rs@ti.com>
> >> ---
> >>  .../boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi  | 14 ++++++++++++++
> >>  1 file changed, 14 insertions(+)
> >> 
> >> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
> >> index 7c5b0c69897d..a44ca34dda62 100644
> >> --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
> >> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
> >> @@ -2691,4 +2691,18 @@ bist_main14: bist@33c0000 {
> >>  		bootph-pre-ram;
> >>  		ti,sci-dev-id = <234>;
> >>  	};
> >> +
> >> +	gpu: gpu@4e20000000 {
> >> +		compatible = "ti,j721s2-gpu", "img,img-bxs-4-64", "img,img-rogue";
> >
> > Following  https://lore.kernel.org/linux-arm-kernel/DBE4UO2RGAYX.17V1DAF8MQYJM@kernel.org/
> > Is it worth having ti,j784s4-gpu here? Are there any SoC specific quirks
> > that driver will need to handle?
> 
> No SoC specific quirks, aside from those already being tracked through the
> dma-coherent attribute. If we actually want to register SoC specific
> compatibility entries as advised by the kernel docs, just let me know. I've seen
> this opinion toggle a few times.
> 

Please provide bootlogs on linux-next with just this series applied.
IMHO, based on what I see at the moment on GPU, it might be a good idea
to have SoC specific compatibility entries.

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D
https://ti.com/opensource

Re: [PATCH 2/3] arm64: dts: ti: k3-am62p-j722s: enable the bxs-4-64

[Nishanth Menon]

On 12:56-20250813, Randolph Sapp wrote:
[...]

> >> +		reg = <0x00 0x0fd80000 0x00 0x80000>;
> >> +		clocks = <&k3_clks 237 1>;
> >> +		clock-names = "core";
> >> +		assigned-clocks = <&k3_clks 237 1>;
> >> +		assigned-clock-rates = <800000000>;

btw, as per https://www.ti.com/lit/ds/symlink/tda4aen-q1.pdf (page 86)
720MHz when vdd_core is 0.75v (default)
and 800MHz when vdd_core is 0.85v

0.85v is set in the board dts and higher OPPs are enabled depending on
board capability.

You might want to check the assigned-clock-rates based on data sheet,
default should'nt need a assigned-clock-rate.

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D
https://ti.com/opensource

Re: [PATCH 2/3] arm64: dts: ti: k3-am62p-j722s: enable the bxs-4-64

[Randolph Sapp]

On Wed Aug 13, 2025 at 1:42 PM CDT, Nishanth Menon wrote:
> On 12:56-20250813, Randolph Sapp wrote:
> [...]
>
>> >> +		reg = <0x00 0x0fd80000 0x00 0x80000>;
>> >> +		clocks = <&k3_clks 237 1>;
>> >> +		clock-names = "core";
>> >> +		assigned-clocks = <&k3_clks 237 1>;
>> >> +		assigned-clock-rates = <800000000>;
>
> btw, as per https://www.ti.com/lit/ds/symlink/tda4aen-q1.pdf (page 86)
> 720MHz when vdd_core is 0.75v (default)
> and 800MHz when vdd_core is 0.85v
>
> 0.85v is set in the board dts and higher OPPs are enabled depending on
> board capability.
>
> You might want to check the assigned-clock-rates based on data sheet,
> default should'nt need a assigned-clock-rate.

Are you suggesting that we set assigned-clock-rates in the board dts instead, or
do you just want to do away with assigned-clock-rates in general and eat the
perf difference?

Re: [PATCH 2/3] arm64: dts: ti: k3-am62p-j722s: enable the bxs-4-64

[Nishanth Menon]

On 15:40-20250814, Randolph Sapp wrote:
> On Wed Aug 13, 2025 at 1:42 PM CDT, Nishanth Menon wrote:
> > On 12:56-20250813, Randolph Sapp wrote:
> > [...]
> >
> >> >> +		reg = <0x00 0x0fd80000 0x00 0x80000>;
> >> >> +		clocks = <&k3_clks 237 1>;
> >> >> +		clock-names = "core";
> >> >> +		assigned-clocks = <&k3_clks 237 1>;
> >> >> +		assigned-clock-rates = <800000000>;
> >
> > btw, as per https://www.ti.com/lit/ds/symlink/tda4aen-q1.pdf (page 86)
> > 720MHz when vdd_core is 0.75v (default)
> > and 800MHz when vdd_core is 0.85v
> >
> > 0.85v is set in the board dts and higher OPPs are enabled depending on
> > board capability.
> >
> > You might want to check the assigned-clock-rates based on data sheet,
> > default should'nt need a assigned-clock-rate.
> 
> Are you suggesting that we set assigned-clock-rates in the board dts instead, or
> do you just want to do away with assigned-clock-rates in general and eat the
> perf difference?

The higher frequency is possible unless you know that the board is setup
for the higher voltage. So, set it board device tree file.

Look at what we did with OPP-High support on AM625 for example. That
frequency can only be reliably achieved if vdd_core is 0.85v. And base
SoC dtsi must assume safe default (min voltage of 0.75v) as the node is
enabled by default.

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D
https://ti.com/opensource

Re: [PATCH 3/3] arm64: dts: ti: k3-j784s4-j742s2: enable the bxs-4-64

[Michael Walle]

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Hi,

On Wed Aug 13, 2025 at 8:13 PM CEST, Nishanth Menon wrote:
> On 12:58-20250813, Randolph Sapp wrote:
> > On Wed Aug 13, 2025 at 10:18 AM CDT, Nishanth Menon wrote:
> > > On 18:25-20250808, rs@ti.com wrote:
> > >> From: Randolph Sapp <rs@ti.com>
> > >> 
> > >> Add the relevant device tree node for Imagination's BXS-4-64 GPU.
> > >> 
> > >> These devices uses a similar MSMC configuration to the J721S2. As such,
> > >> they also require the use of the dma-coherent attribute.
> > >> 
> > >> Signed-off-by: Randolph Sapp <rs@ti.com>
> > >> ---
> > >>  .../boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi  | 14 ++++++++++++++
> > >>  1 file changed, 14 insertions(+)
> > >> 
> > >> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
> > >> index 7c5b0c69897d..a44ca34dda62 100644
> > >> --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
> > >> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
> > >> @@ -2691,4 +2691,18 @@ bist_main14: bist@33c0000 {
> > >>  		bootph-pre-ram;
> > >>  		ti,sci-dev-id = <234>;
> > >>  	};
> > >> +
> > >> +	gpu: gpu@4e20000000 {
> > >> +		compatible = "ti,j721s2-gpu", "img,img-bxs-4-64", "img,img-rogue";
> > >
> > > Following  https://lore.kernel.org/linux-arm-kernel/DBE4UO2RGAYX.17V1DAF8MQYJM@kernel.org/
> > > Is it worth having ti,j784s4-gpu here? Are there any SoC specific quirks
> > > that driver will need to handle?
> > 
> > No SoC specific quirks, aside from those already being tracked through the
> > dma-coherent attribute. If we actually want to register SoC specific
> > compatibility entries as advised by the kernel docs, just let me know. I've seen
> > this opinion toggle a few times.
> > 
>
> Please provide bootlogs on linux-next with just this series applied.
> IMHO, based on what I see at the moment on GPU, it might be a good idea
> to have SoC specific compatibility entries.

IMHO, that's *always* a good idea, even if the IP is the very same
as the integration might be different.

Apart from that, we now have two series which partly overlap.
Should I repost mine, as that's more than just the DT entry? (Which
doesn't work as is, I'd guess.)

-michael

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Re: [PATCH 3/3] arm64: dts: ti: k3-j784s4-j742s2: enable the bxs-4-64

[Randolph Sapp]

On Mon Aug 18, 2025 at 1:22 AM CDT, Michael Walle wrote:
> Hi,
>
> On Wed Aug 13, 2025 at 8:13 PM CEST, Nishanth Menon wrote:
>> On 12:58-20250813, Randolph Sapp wrote:
>> > On Wed Aug 13, 2025 at 10:18 AM CDT, Nishanth Menon wrote:
>> > > On 18:25-20250808, rs@ti.com wrote:
>> > >> From: Randolph Sapp <rs@ti.com>
>> > >> 
>> > >> Add the relevant device tree node for Imagination's BXS-4-64 GPU.
>> > >> 
>> > >> These devices uses a similar MSMC configuration to the J721S2. As such,
>> > >> they also require the use of the dma-coherent attribute.
>> > >> 
>> > >> Signed-off-by: Randolph Sapp <rs@ti.com>
>> > >> ---
>> > >>  .../boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi  | 14 ++++++++++++++
>> > >>  1 file changed, 14 insertions(+)
>> > >> 
>> > >> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
>> > >> index 7c5b0c69897d..a44ca34dda62 100644
>> > >> --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
>> > >> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
>> > >> @@ -2691,4 +2691,18 @@ bist_main14: bist@33c0000 {
>> > >>  		bootph-pre-ram;
>> > >>  		ti,sci-dev-id = <234>;
>> > >>  	};
>> > >> +
>> > >> +	gpu: gpu@4e20000000 {
>> > >> +		compatible = "ti,j721s2-gpu", "img,img-bxs-4-64", "img,img-rogue";
>> > >
>> > > Following  https://lore.kernel.org/linux-arm-kernel/DBE4UO2RGAYX.17V1DAF8MQYJM@kernel.org/
>> > > Is it worth having ti,j784s4-gpu here? Are there any SoC specific quirks
>> > > that driver will need to handle?
>> > 
>> > No SoC specific quirks, aside from those already being tracked through the
>> > dma-coherent attribute. If we actually want to register SoC specific
>> > compatibility entries as advised by the kernel docs, just let me know. I've seen
>> > this opinion toggle a few times.
>> > 
>>
>> Please provide bootlogs on linux-next with just this series applied.
>> IMHO, based on what I see at the moment on GPU, it might be a good idea
>> to have SoC specific compatibility entries.
>
> IMHO, that's *always* a good idea, even if the IP is the very same
> as the integration might be different.
>
> Apart from that, we now have two series which partly overlap.
> Should I repost mine, as that's more than just the DT entry? (Which
> doesn't work as is, I'd guess.)
>
> -michael

Ah, I don't see that series on the linux-arm-kernel list. If you can forward me
that I can work around whatever you've got.

Re: [PATCH 3/3] arm64: dts: ti: k3-j784s4-j742s2: enable the bxs-4-64

[Michael Walle]

Hi,

>> Apart from that, we now have two series which partly overlap.
>> Should I repost mine, as that's more than just the DT entry? (Which
>> doesn't work as is, I'd guess.)
> 
> Ah, I don't see that series on the linux-arm-kernel list. If you can 
> forward me
> that I can work around whatever you've got.

That was the one Nishanth mentioned earlier:
https://lore.kernel.org/linux-arm-kernel/20250716134717.4085567-1-mwalle@kernel.org/

Also this:
https://lore.kernel.org/all/DC5KCSEUZQUJ.3KPENNUQBUFM8@kernel.org/

-michael

Re: [PATCH 3/3] arm64: dts: ti: k3-j784s4-j742s2: enable the bxs-4-64

[Randolph Sapp]

On Tue Aug 19, 2025 at 1:38 AM CDT, Michael Walle wrote:
> Hi,
>
>>> Apart from that, we now have two series which partly overlap.
>>> Should I repost mine, as that's more than just the DT entry? (Which
>>> doesn't work as is, I'd guess.)
>> 
>> Ah, I don't see that series on the linux-arm-kernel list. If you can 
>> forward me
>> that I can work around whatever you've got.
>
> That was the one Nishanth mentioned earlier:
> https://lore.kernel.org/linux-arm-kernel/20250716134717.4085567-1-mwalle@kernel.org/
>
> Also this:
> https://lore.kernel.org/all/DC5KCSEUZQUJ.3KPENNUQBUFM8@kernel.org/
>
> -michael

Ah, alright. I'll hold off on this series until the AM62P related sections you
were proposing are picked up.

Re: [PATCH 3/3] arm64: dts: ti: k3-j784s4-j742s2: enable the bxs-4-64

[Nishanth Menon]

On 15:47-20250819, Randolph Sapp wrote:
> On Tue Aug 19, 2025 at 1:38 AM CDT, Michael Walle wrote:
> > Hi,
> >
> >>> Apart from that, we now have two series which partly overlap.
> >>> Should I repost mine, as that's more than just the DT entry? (Which
> >>> doesn't work as is, I'd guess.)
> >> 
> >> Ah, I don't see that series on the linux-arm-kernel list. If you can 
> >> forward me
> >> that I can work around whatever you've got.
> >
> > That was the one Nishanth mentioned earlier:
> > https://lore.kernel.org/linux-arm-kernel/20250716134717.4085567-1-mwalle@kernel.org/
> >
> > Also this:
> > https://lore.kernel.org/all/DC5KCSEUZQUJ.3KPENNUQBUFM8@kernel.org/
> >
> > -michael
> 
> Ah, alright. I'll hold off on this series until the AM62P related sections you
> were proposing are picked up.

Are all SoCs impacted by this need? just hold off the am62p changes,
perhaps?

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D
https://ti.com/opensource