[PATCH RFC 0/8] Exynos850 CPU hotplug support and pmu_intr_gen cleanup

[PATCH RFC 0/8] Exynos850 CPU hotplug support and pmu_intr_gen cleanup

[Alexey Klimov]

This is RFC series in order to understand if it is the correct
direction in order of moving forward enabling support for CPU
hotplug on Exynos850-based platforms.
First steps are generalisations of similar routines and device
tree things for gs101 to make them more "Exynos" friendly and
last commits add actual support.

Tested on Exynos850 WinLink E850-96 board.

Some commits need to be squashed together probably but at this point
they allow to better understand the thinking process.
I was thinking to merge deprecation of google,pmu-intr-gen-syscon
into the previous commit and renaming of GS101_INTR_* registers
should not be a separate patch.

The {offline,online} calls should probably be moved into a 
SoC's DT match data since they look to be SoC-specific at this
point if we don't bump into any surprises here.
Please also advice if, for instance, gs101 calls should be moved
into gs101-pmu.c or exynos850 calls should go into separate file.

Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
---
Alexey Klimov (8):
      dt-bindings: soc: move and rename google,gs101-pmu-intr-gen schema under soc/samsung/
      dt-bindings: soc: samsung: exynos850-pmu-intr-gen: add Exynos850 compatible
      dt-bindings: soc: samsung: exynos-pmu: add samsung,pmu-intr-gen phandle
      dt-bindings: soc: samsung: exynos-pmu: deprecate google,pmu-intr-gen-syscon
      soc: samsung: exynos-pmu: rename GS101_INTR_* regs to EXYNOS_INTR_*
      soc: samsung: exynos-pmu: generalise GS101 PMU intr gen for Exynos SoCs
      soc: samsung: exynos-pmu: add Exynos850 CPU hotplug support
      arm64: dts: exynos850: add PMU interrupt generation node

 .../bindings/soc/samsung/exynos-pmu.yaml           |  24 ++++
 .../samsung,exynos850-pmu-intr-gen.yaml}           |   8 +-
 arch/arm64/boot/dts/exynos/exynos850.dtsi          |   6 +
 drivers/soc/samsung/exynos-pmu.c                   | 137 +++++++++++++++++----
 include/linux/soc/samsung/exynos-regs-pmu.h        |  15 ++-
 5 files changed, 155 insertions(+), 35 deletions(-)
---
base-commit: d4906ae14a5f136ceb671bb14cedbf13fa560da6
change-id: 20260226-exynos850-cpuhotplug-69f1976eefa8

Best regards,
-- 
Alexey Klimov <alexey.klimov@linaro.org>

[PATCH RFC 1/8] dt-bindings: soc: move and rename google,gs101-pmu-intr-gen schema under soc/samsung/

[Alexey Klimov]

The GS101 PMU interrupts generation block is actually a standard Samsung
Exynos IP block found in older SoCs like the Exynos 850 and others and
not exclusive to Google SoCs. Thus, renaming to
samsung,exynos850-pmu-intr-gen, moving the schema file to soc/samsung
directory to reflect its origin, since Exynos850 predates GS101 SoCs,
and preparing for adding Exynos850 description.

Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
---
 .../samsung,exynos850-pmu-intr-gen.yaml}                              | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml
similarity index 80%
rename from Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml
rename to Documentation/devicetree/bindings/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml
index 2be022ca6a7d..f9b40f3fd165 100644
--- a/Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml
+++ b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml
@@ -1,10 +1,10 @@
 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
 %YAML 1.2
 ---
-$id: http://devicetree.org/schemas/soc/google/google,gs101-pmu-intr-gen.yaml#
+$id: http://devicetree.org/schemas/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Google Power Management Unit (PMU) Interrupt Generation
+title: Samsung Power Management Unit (PMU) Interrupt Generation
 
 description: |
   PMU interrupt generator for handshaking between PMU through interrupts.

-- 
2.51.0

Re: [PATCH RFC 1/8] dt-bindings: soc: move and rename google,gs101-pmu-intr-gen schema under soc/samsung/

[Peter Griffin]

Hi Alexey,

On Thu, 26 Feb 2026 at 15:47, Alexey Klimov <alexey.klimov@linaro.org> wrote:
>
> The GS101 PMU interrupts generation block is actually a standard Samsung
> Exynos IP block found in older SoCs like the Exynos 850 and others and
> not exclusive to Google SoCs. Thus, renaming to
> samsung,exynos850-pmu-intr-gen, moving the schema file to soc/samsung
> directory to reflect its origin, since Exynos850 predates GS101 SoCs,
> and preparing for adding Exynos850 description.
>
> Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
> ---

I'll leave it to Krzysztof to decide if renaming/moving makes sense
and if there are any guidelines/rules around this. From my PoV it
seems likely that there will be many more Samsung Exynos based SoCs
with this IP than Google designed ones (Google SoCs I'm aware of with
the IP being gs101, gs201, zuma and zuma pro).

regards,

Peter

>  .../samsung,exynos850-pmu-intr-gen.yaml}                              | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml
> similarity index 80%
> rename from Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml
> rename to Documentation/devicetree/bindings/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml
> index 2be022ca6a7d..f9b40f3fd165 100644
> --- a/Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml
> +++ b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml
> @@ -1,10 +1,10 @@
>  # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>  %YAML 1.2
>  ---
> -$id: http://devicetree.org/schemas/soc/google/google,gs101-pmu-intr-gen.yaml#
> +$id: http://devicetree.org/schemas/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml#
>  $schema: http://devicetree.org/meta-schemas/core.yaml#
>
> -title: Google Power Management Unit (PMU) Interrupt Generation
> +title: Samsung Power Management Unit (PMU) Interrupt Generation
>
>  description: |
>    PMU interrupt generator for handshaking between PMU through interrupts.
>
> --
> 2.51.0
>

Re: [PATCH RFC 1/8] dt-bindings: soc: move and rename google,gs101-pmu-intr-gen schema under soc/samsung/

[Krzysztof Kozlowski]

On 26/02/2026 16:47, Alexey Klimov wrote:
> The GS101 PMU interrupts generation block is actually a standard Samsung
> Exynos IP block found in older SoCs like the Exynos 850 and others and
> not exclusive to Google SoCs. Thus, renaming to
> samsung,exynos850-pmu-intr-gen, moving the schema file to soc/samsung
> directory to reflect its origin, since Exynos850 predates GS101 SoCs,
> and preparing for adding Exynos850 description.
> 
> Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
> ---
>  .../samsung,exynos850-pmu-intr-gen.yaml}                              | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml
> similarity index 80%
> rename from Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml
> rename to Documentation/devicetree/bindings/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml
> index 2be022ca6a7d..f9b40f3fd165 100644
> --- a/Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml
> +++ b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml
> @@ -1,10 +1,10 @@
>  # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>  %YAML 1.2
>  ---
> -$id: http://devicetree.org/schemas/soc/google/google,gs101-pmu-intr-gen.yaml#
> +$id: http://devicetree.org/schemas/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml#
>  $schema: http://devicetree.org/meta-schemas/core.yaml#
>  
> -title: Google Power Management Unit (PMU) Interrupt Generation
> +title: Samsung Power Management Unit (PMU) Interrupt Generation

Rename is fine if you add here compatible, otherwise the name does not
match the compatible.

Best regards,
Krzysztof

Re: [PATCH RFC 1/8] dt-bindings: soc: move and rename google,gs101-pmu-intr-gen schema under soc/samsung/

[Alexey Klimov]

On Sat Mar 7, 2026 at 5:03 PM GMT, Krzysztof Kozlowski wrote:
> On 26/02/2026 16:47, Alexey Klimov wrote:
>> The GS101 PMU interrupts generation block is actually a standard Samsung
>> Exynos IP block found in older SoCs like the Exynos 850 and others and
>> not exclusive to Google SoCs. Thus, renaming to
>> samsung,exynos850-pmu-intr-gen, moving the schema file to soc/samsung
>> directory to reflect its origin, since Exynos850 predates GS101 SoCs,
>> and preparing for adding Exynos850 description.
>> 
>> Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
>> ---
>>  .../samsung,exynos850-pmu-intr-gen.yaml}                              | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>> 
>> diff --git a/Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml
>> similarity index 80%
>> rename from Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml
>> rename to Documentation/devicetree/bindings/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml
>> index 2be022ca6a7d..f9b40f3fd165 100644
>> --- a/Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml
>> +++ b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml
>> @@ -1,10 +1,10 @@
>>  # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>>  %YAML 1.2
>>  ---
>> -$id: http://devicetree.org/schemas/soc/google/google,gs101-pmu-intr-gen.yaml#
>> +$id: http://devicetree.org/schemas/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml#
>>  $schema: http://devicetree.org/meta-schemas/core.yaml#
>>  
>> -title: Google Power Management Unit (PMU) Interrupt Generation
>> +title: Samsung Power Management Unit (PMU) Interrupt Generation
>
> Rename is fine if you add here compatible, otherwise the name does not
> match the compatible.

Thanks, I'll rearrange commits then to make it sane in the next submission.

BR,
Alexey

Re: [PATCH RFC 1/8] dt-bindings: soc: move and rename google,gs101-pmu-intr-gen schema under soc/samsung/

[Krzysztof Kozlowski]

On 23/03/2026 16:42, Alexey Klimov wrote:
> On Sat Mar 7, 2026 at 5:03 PM GMT, Krzysztof Kozlowski wrote:
>> On 26/02/2026 16:47, Alexey Klimov wrote:
>>> The GS101 PMU interrupts generation block is actually a standard Samsung
>>> Exynos IP block found in older SoCs like the Exynos 850 and others and
>>> not exclusive to Google SoCs. Thus, renaming to
>>> samsung,exynos850-pmu-intr-gen, moving the schema file to soc/samsung
>>> directory to reflect its origin, since Exynos850 predates GS101 SoCs,
>>> and preparing for adding Exynos850 description.
>>>
>>> Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
>>> ---
>>>  .../samsung,exynos850-pmu-intr-gen.yaml}                              | 4 ++--
>>>  1 file changed, 2 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml
>>> similarity index 80%
>>> rename from Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml
>>> rename to Documentation/devicetree/bindings/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml
>>> index 2be022ca6a7d..f9b40f3fd165 100644
>>> --- a/Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml
>>> +++ b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml
>>> @@ -1,10 +1,10 @@
>>>  # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>>>  %YAML 1.2
>>>  ---
>>> -$id: http://devicetree.org/schemas/soc/google/google,gs101-pmu-intr-gen.yaml#
>>> +$id: http://devicetree.org/schemas/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml#
>>>  $schema: http://devicetree.org/meta-schemas/core.yaml#
>>>  
>>> -title: Google Power Management Unit (PMU) Interrupt Generation
>>> +title: Samsung Power Management Unit (PMU) Interrupt Generation
>>
>> Rename is fine if you add here compatible, otherwise the name does not
>> match the compatible.
> 
> Thanks, I'll rearrange commits then to make it sane in the next submission.

If you re-order then the case will be the same. Filename will not match
compatible. IOW, rename is not a logical change on its own.

Best regards,
Krzysztof

Re: [PATCH RFC 1/8] dt-bindings: soc: move and rename google,gs101-pmu-intr-gen schema under soc/samsung/

[Alexey Klimov]

On Mon Mar 23, 2026 at 4:03 PM GMT, Krzysztof Kozlowski wrote:
> On 23/03/2026 16:42, Alexey Klimov wrote:
>> On Sat Mar 7, 2026 at 5:03 PM GMT, Krzysztof Kozlowski wrote:
>>> On 26/02/2026 16:47, Alexey Klimov wrote:
>>>> The GS101 PMU interrupts generation block is actually a standard Samsung
>>>> Exynos IP block found in older SoCs like the Exynos 850 and others and
>>>> not exclusive to Google SoCs. Thus, renaming to
>>>> samsung,exynos850-pmu-intr-gen, moving the schema file to soc/samsung
>>>> directory to reflect its origin, since Exynos850 predates GS101 SoCs,
>>>> and preparing for adding Exynos850 description.
>>>>
>>>> Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
>>>> ---
>>>>  .../samsung,exynos850-pmu-intr-gen.yaml}                              | 4 ++--
>>>>  1 file changed, 2 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml
>>>> similarity index 80%
>>>> rename from Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml
>>>> rename to Documentation/devicetree/bindings/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml
>>>> index 2be022ca6a7d..f9b40f3fd165 100644
>>>> --- a/Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml
>>>> +++ b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml
>>>> @@ -1,10 +1,10 @@
>>>>  # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>>>>  %YAML 1.2
>>>>  ---
>>>> -$id: http://devicetree.org/schemas/soc/google/google,gs101-pmu-intr-gen.yaml#
>>>> +$id: http://devicetree.org/schemas/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml#
>>>>  $schema: http://devicetree.org/meta-schemas/core.yaml#
>>>>  
>>>> -title: Google Power Management Unit (PMU) Interrupt Generation
>>>> +title: Samsung Power Management Unit (PMU) Interrupt Generation
>>>
>>> Rename is fine if you add here compatible, otherwise the name does not
>>> match the compatible.
>> 
>> Thanks, I'll rearrange commits then to make it sane in the next submission.
>
> If you re-order then the case will be the same. Filename will not match
> compatible. IOW, rename is not a logical change on its own.

I probably should have used another word for this.
I am not going to *just* re-order.

Thanks,
Alexey

[PATCH RFC 2/8] dt-bindings: soc: samsung: exynos850-pmu-intr-gen: add Exynos850 compatible

[Alexey Klimov]

Add samsung,exynos850-pmu-intr-gen compatible to the bindings
documentation. PMU interrupts generator block support is
required to enable power management related functionality
like CPU hotplug, sleep states, etc.

Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
---
 .../bindings/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml          | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml
index f9b40f3fd165..df23467d0e0e 100644
--- a/Documentation/devicetree/bindings/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml
+++ b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos850-pmu-intr-gen.yaml
@@ -15,7 +15,9 @@ maintainers:
 properties:
   compatible:
     items:
-      - const: google,gs101-pmu-intr-gen
+      - enum:
+          - google,gs101-pmu-intr-gen
+          - samsung,exynos850-pmu-intr-gen
       - const: syscon
 
   reg:

-- 
2.51.0

[PATCH RFC 3/8] dt-bindings: soc: samsung: exynos-pmu: add samsung,pmu-intr-gen phandle

[Alexey Klimov]

Some Exynos-based SoCs, for instance Exynos850, require access
to the pmu interrupt generation register region which is exposed
as a syscon. Update the exynos-pmu bindings documentation to
reflect this.

Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
---
 .../devicetree/bindings/soc/samsung/exynos-pmu.yaml    | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml
index 76ce7e98c10f..92acdfd5d44e 100644
--- a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml
+++ b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml
@@ -110,6 +110,11 @@ properties:
     description:
       Node for reboot method
 
+  samsung,pmu-intr-gen-syscon:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description:
+      Phandle to PMU interrupt generation interface.
+
   google,pmu-intr-gen-syscon:
     $ref: /schemas/types.yaml#/definitions/phandle
     description:
@@ -189,6 +194,19 @@ allOf:
       properties:
         google,pmu-intr-gen-syscon: false
 
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - samsung,exynos850-pmu
+    then:
+      required:
+        - samsung,pmu-intr-gen-syscon
+    else:
+      properties:
+        samsung,pmu-intr-gen-syscon: false
+
 examples:
   - |
     #include <dt-bindings/clock/exynos5250.h>

-- 
2.51.0

[PATCH RFC 4/8] dt-bindings: soc: samsung: exynos-pmu: deprecate google,pmu-intr-gen-syscon

[Alexey Klimov]

The generic property samsung,pmu-intr-gen-syscon should be used
by default for Samsung Exynos PMU hardware blocks. Update binding
document to add deprecated flag for google,pmu-intr-gen-syscon
property.
While at this, also add dependency to not allow usage of both
above mentioned properties in the same time.

Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
---
 Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml
index 92acdfd5d44e..1ff1a8729989 100644
--- a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml
+++ b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml
@@ -119,6 +119,7 @@ properties:
     $ref: /schemas/types.yaml#/definitions/phandle
     description:
       Phandle to PMU interrupt generation interface.
+    deprecated: true
 
 required:
   - compatible
@@ -207,6 +208,11 @@ allOf:
       properties:
         samsung,pmu-intr-gen-syscon: false
 
+dependencies:
+  google,pmu-intr-gen-syscon:
+    not:
+      required: ['samsung,pmu-intr-gen-syscon']
+
 examples:
   - |
     #include <dt-bindings/clock/exynos5250.h>

-- 
2.51.0

[PATCH RFC 5/8] soc: samsung: exynos-pmu: rename GS101_INTR_* regs to EXYNOS_INTR_*

[Alexey Klimov]

The PMU interrupt generation block is not exclusive to gs101 SoCs and
is present on few Exynos-based platforms. Rename registers of this
hardware block prefixed with GS101_INTR to be prefixed with EXYNOS_INTR.

Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
---
 drivers/soc/samsung/exynos-pmu.c            | 16 ++++++++--------
 include/linux/soc/samsung/exynos-regs-pmu.h | 10 +++++-----
 2 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/drivers/soc/samsung/exynos-pmu.c b/drivers/soc/samsung/exynos-pmu.c
index d58376c38179..92870e6ffc1c 100644
--- a/drivers/soc/samsung/exynos-pmu.c
+++ b/drivers/soc/samsung/exynos-pmu.c
@@ -244,12 +244,12 @@ static int __gs101_cpu_pmu_online(unsigned int cpu)
 
 	mask = BIT(cpu);
 
-	regmap_update_bits(pmu_context->pmuintrgen, GS101_GRP2_INTR_BID_ENABLE,
+	regmap_update_bits(pmu_context->pmuintrgen, EXYNOS_GRP2_INTR_BID_ENABLE,
 			   mask, (0 << cpu));
 
-	regmap_read(pmu_context->pmuintrgen, GS101_GRP2_INTR_BID_UPEND, &reg);
+	regmap_read(pmu_context->pmuintrgen, EXYNOS_GRP2_INTR_BID_UPEND, &reg);
 
-	regmap_write(pmu_context->pmuintrgen, GS101_GRP2_INTR_BID_CLEAR,
+	regmap_write(pmu_context->pmuintrgen, EXYNOS_GRP2_INTR_BID_CLEAR,
 		     reg & mask);
 
 	return 0;
@@ -304,16 +304,16 @@ static int __gs101_cpu_pmu_offline(unsigned int cpu)
 		     CPU_INFORM_C2);
 
 	mask = BIT(cpu);
-	regmap_update_bits(pmu_context->pmuintrgen, GS101_GRP2_INTR_BID_ENABLE,
+	regmap_update_bits(pmu_context->pmuintrgen, EXYNOS_GRP2_INTR_BID_ENABLE,
 			   mask, BIT(cpu));
 
-	regmap_read(pmu_context->pmuintrgen, GS101_GRP1_INTR_BID_UPEND, &reg);
-	regmap_write(pmu_context->pmuintrgen, GS101_GRP1_INTR_BID_CLEAR,
+	regmap_read(pmu_context->pmuintrgen, EXYNOS_GRP1_INTR_BID_UPEND, &reg);
+	regmap_write(pmu_context->pmuintrgen, EXYNOS_GRP1_INTR_BID_CLEAR,
 		     reg & mask);
 
 	mask = (BIT(cpu + 8));
-	regmap_read(pmu_context->pmuintrgen, GS101_GRP1_INTR_BID_UPEND, &reg);
-	regmap_write(pmu_context->pmuintrgen, GS101_GRP1_INTR_BID_CLEAR,
+	regmap_read(pmu_context->pmuintrgen, EXYNOS_GRP1_INTR_BID_UPEND, &reg);
+	regmap_write(pmu_context->pmuintrgen, EXYNOS_GRP1_INTR_BID_CLEAR,
 		     reg & mask);
 
 	return 0;
diff --git a/include/linux/soc/samsung/exynos-regs-pmu.h b/include/linux/soc/samsung/exynos-regs-pmu.h
index db8a7ca81080..9c4d3da41dbf 100644
--- a/include/linux/soc/samsung/exynos-regs-pmu.h
+++ b/include/linux/soc/samsung/exynos-regs-pmu.h
@@ -1009,11 +1009,11 @@
 #define GS101_PHY_CTRL_UFS                      0x3ec8
 
 /* PMU INTR GEN */
-#define GS101_GRP1_INTR_BID_UPEND				(0x0108)
-#define GS101_GRP1_INTR_BID_CLEAR				(0x010c)
-#define GS101_GRP2_INTR_BID_ENABLE				(0x0200)
-#define GS101_GRP2_INTR_BID_UPEND				(0x0208)
-#define GS101_GRP2_INTR_BID_CLEAR				(0x020c)
+#define EXYNOS_GRP1_INTR_BID_UPEND				(0x0108)
+#define EXYNOS_GRP1_INTR_BID_CLEAR				(0x010c)
+#define EXYNOS_GRP2_INTR_BID_ENABLE				(0x0200)
+#define EXYNOS_GRP2_INTR_BID_UPEND				(0x0208)
+#define EXYNOS_GRP2_INTR_BID_CLEAR				(0x020c)
 
 /* exynosautov920 */
 #define EXYNOSAUTOV920_PHY_CTRL_USB20				(0x0710)

-- 
2.51.0

[PATCH RFC 6/8] soc: samsung: exynos-pmu: generalise GS101 PMU intr gen for Exynos SoCs

[Alexey Klimov]

The GS101 PMU interrupts generation block is not exclusive to Google
GS101 SoCs and is a standard Exynos IP block found in different older
SoCs like Exynos850 and others.
To prepare for the addition of Exynos850 PMU interrupts generation block
and cpu hotplug support we need to generalise (Exynosize or Exynosify)
names and calls related to CPU hotplug and CPU idle.
pmu_context struct has now calls to offline and online procedures which are
SoC specific (and maybe even firmware-specific for any given board),
and one of this set of {offline,online} calls becomes GS101-specific.
This allows adding calls for other boards later.

Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
---
 drivers/soc/samsung/exynos-pmu.c | 39 ++++++++++++++++++++++-----------------
 1 file changed, 22 insertions(+), 17 deletions(-)

diff --git a/drivers/soc/samsung/exynos-pmu.c b/drivers/soc/samsung/exynos-pmu.c
index 92870e6ffc1c..0967fa56708a 100644
--- a/drivers/soc/samsung/exynos-pmu.c
+++ b/drivers/soc/samsung/exynos-pmu.c
@@ -36,6 +36,8 @@ struct exynos_pmu_context {
 	 */
 	raw_spinlock_t cpupm_lock;
 	unsigned long *in_cpuhp;
+	int (*cpu_pmu_offline)(unsigned int cpu);
+	int (*cpu_pmu_online)(unsigned int cpu);
 	bool sys_insuspend;
 	bool sys_inreboot;
 };
@@ -256,7 +258,7 @@ static int __gs101_cpu_pmu_online(unsigned int cpu)
 }
 
 /* Called from CPU PM notifier (CPUIdle code path) with IRQs disabled */
-static int gs101_cpu_pmu_online(void)
+static int exynos_cpu_pmu_online(void)
 {
 	int cpu;
 
@@ -268,20 +270,20 @@ static int gs101_cpu_pmu_online(void)
 	}
 
 	cpu = smp_processor_id();
-	__gs101_cpu_pmu_online(cpu);
+	pmu_context->cpu_pmu_online(cpu);
 	raw_spin_unlock(&pmu_context->cpupm_lock);
 
 	return NOTIFY_OK;
 }
 
 /* Called from CPU hot plug callback with IRQs enabled */
-static int gs101_cpuhp_pmu_online(unsigned int cpu)
+static int exynos_cpuhp_pmu_online(unsigned int cpu)
 {
 	unsigned long flags;
 
 	raw_spin_lock_irqsave(&pmu_context->cpupm_lock, flags);
 
-	__gs101_cpu_pmu_online(cpu);
+	pmu_context->cpu_pmu_online(cpu);
 	/*
 	 * Mark this CPU as having finished the hotplug.
 	 * This means this CPU can now enter C2 idle state.
@@ -320,7 +322,7 @@ static int __gs101_cpu_pmu_offline(unsigned int cpu)
 }
 
 /* Called from CPU PM notifier (CPUIdle code path) with IRQs disabled */
-static int gs101_cpu_pmu_offline(void)
+static int exynos_cpu_pmu_offline(void)
 {
 	int cpu;
 
@@ -338,14 +340,14 @@ static int gs101_cpu_pmu_offline(void)
 		return NOTIFY_OK;
 	}
 
-	__gs101_cpu_pmu_offline(cpu);
+	pmu_context->cpu_pmu_offline(cpu);
 	raw_spin_unlock(&pmu_context->cpupm_lock);
 
 	return NOTIFY_OK;
 }
 
 /* Called from CPU hot plug callback with IRQs enabled */
-static int gs101_cpuhp_pmu_offline(unsigned int cpu)
+static int exynos_cpuhp_pmu_offline(unsigned int cpu)
 {
 	unsigned long flags;
 
@@ -355,29 +357,29 @@ static int gs101_cpuhp_pmu_offline(unsigned int cpu)
 	 * ACPM the CPU entering hotplug should not enter C2 idle state.
 	 */
 	set_bit(cpu, pmu_context->in_cpuhp);
-	__gs101_cpu_pmu_offline(cpu);
+	pmu_context->cpu_pmu_offline(cpu);
 
 	raw_spin_unlock_irqrestore(&pmu_context->cpupm_lock, flags);
 
 	return 0;
 }
 
-static int gs101_cpu_pm_notify_callback(struct notifier_block *self,
+static int exynos_cpu_pm_notify_callback(struct notifier_block *self,
 					unsigned long action, void *v)
 {
 	switch (action) {
 	case CPU_PM_ENTER:
-		return gs101_cpu_pmu_offline();
+		return exynos_cpu_pmu_offline();
 
 	case CPU_PM_EXIT:
-		return gs101_cpu_pmu_online();
+		return exynos_cpu_pmu_online();
 	}
 
 	return NOTIFY_OK;
 }
 
-static struct notifier_block gs101_cpu_pm_notifier = {
-	.notifier_call = gs101_cpu_pm_notify_callback,
+static struct notifier_block exynos_cpu_pm_notifier = {
+	.notifier_call = exynos_cpu_pm_notify_callback,
 	/*
 	 * We want to be called first, as the ACPM hint and handshake is what
 	 * puts the CPU into C2.
@@ -425,6 +427,9 @@ static int setup_cpuhp_and_cpuidle(struct device *dev)
 		return 0;
 	}
 
+	pmu_context->cpu_pmu_online = __gs101_cpu_pmu_online;
+	pmu_context->cpu_pmu_offline = __gs101_cpu_pmu_offline;
+
 	/*
 	 * To avoid lockdep issues (CPU PM notifiers use raw spinlocks) create
 	 * a mmio regmap for pmu-intr-gen that uses raw spinlocks instead of
@@ -458,17 +463,17 @@ static int setup_cpuhp_and_cpuidle(struct device *dev)
 
 	/* set PMU to power on */
 	for_each_online_cpu(cpu)
-		gs101_cpuhp_pmu_online(cpu);
+		exynos_cpuhp_pmu_online(cpu);
 
 	/* register CPU hotplug callbacks */
 	cpuhp_setup_state(CPUHP_BP_PREPARE_DYN,	"soc/exynos-pmu:prepare",
-			  gs101_cpuhp_pmu_online, NULL);
+			  exynos_cpuhp_pmu_online, NULL);
 
 	cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "soc/exynos-pmu:online",
-			  NULL, gs101_cpuhp_pmu_offline);
+			  NULL, exynos_cpuhp_pmu_offline);
 
 	/* register CPU PM notifiers for cpuidle */
-	cpu_pm_register_notifier(&gs101_cpu_pm_notifier);
+	cpu_pm_register_notifier(&exynos_cpu_pm_notifier);
 	register_reboot_notifier(&exynos_cpupm_reboot_nb);
 	return 0;
 }

-- 
2.51.0

[PATCH RFC 7/8] soc: samsung: exynos-pmu: add Exynos850 CPU hotplug support

[Alexey Klimov]

Some Exynos-based SoCs require specific set of writes/updates to PMU
and PMU intr gen blocks in order to put a CPU or a group of CPUs into
a different sleep states or prepare these entities for a CPU_OFF.
The same is valid for a reverse procedures like wake-ups or CPU(s)
online. Without these writes/updates the CPU(s) wake-up or online
fails.
Add support for Exynos850-based SoCs for PMU and PMU intr gen write/update
sequences.
While at this, also add description of Exynos850 PMU registers.

Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
---
 drivers/soc/samsung/exynos-pmu.c            | 86 +++++++++++++++++++++++++++--
 include/linux/soc/samsung/exynos-regs-pmu.h |  5 ++
 2 files changed, 87 insertions(+), 4 deletions(-)

diff --git a/drivers/soc/samsung/exynos-pmu.c b/drivers/soc/samsung/exynos-pmu.c
index 0967fa56708a..7b9b8e22d91b 100644
--- a/drivers/soc/samsung/exynos-pmu.c
+++ b/drivers/soc/samsung/exynos-pmu.c
@@ -118,6 +118,10 @@ static const struct regmap_config regmap_pmu_intr = {
 	.use_raw_spinlock = true,
 };
 
+const struct exynos_pmu_data exynos850_pmu_data = {
+	.pmu_cpuhp = true,
+};
+
 /*
  * PMU platform driver and devicetree bindings.
  */
@@ -151,6 +155,7 @@ static const struct of_device_id exynos_pmu_of_device_ids[] = {
 		.compatible = "samsung,exynos7-pmu",
 	}, {
 		.compatible = "samsung,exynos850-pmu",
+		.data = &exynos850_pmu_data,
 	},
 	{ /*sentinel*/ },
 };
@@ -229,6 +234,65 @@ EXPORT_SYMBOL_GPL(exynos_get_pmu_regmap_by_phandle);
 #define CPU_INFORM_CLEAR	0
 #define CPU_INFORM_C2		1
 
+static int __exynos850_cpu_pmu_online(unsigned int cpu)
+	__must_hold(&pmu_context->cpupm_lock)
+{
+	u32 this_cluster = MPIDR_AFFINITY_LEVEL(read_cpuid_mpidr(), 2);
+	u32 cluster_cpu = MPIDR_AFFINITY_LEVEL(read_cpuid_mpidr(), 1);
+	unsigned int cpuhint = smp_processor_id();
+	u32 reg, mask;
+
+	/* clear cpu inform hint */
+	regmap_write(pmu_context->pmureg, EXYNOS850_CPU_INFORM(cpuhint),
+		     CPU_INFORM_CLEAR);
+
+	mask = BIT(cpu);
+
+	regmap_update_bits(pmu_context->pmuintrgen, EXYNOS_GRP2_INTR_BID_ENABLE,
+			   mask, (0 << cpu));
+
+	regmap_read(pmu_context->pmuintrgen, EXYNOS_GRP2_INTR_BID_UPEND, &reg);
+
+	regmap_write(pmu_context->pmuintrgen, EXYNOS_GRP2_INTR_BID_CLEAR,
+		     reg & mask);
+
+	regmap_update_bits(pmu_context->pmureg,
+			   EXYNOS850_CLUSTER_CPU_INT_EN(this_cluster, cluster_cpu),
+			   1 << 3, 0 << 3);
+	return 0;
+}
+
+static int __exynos850_cpu_pmu_offline(unsigned int cpu)
+	__must_hold(&pmu_context->cpupm_lock)
+{
+	u32 this_cluster = MPIDR_AFFINITY_LEVEL(read_cpuid_mpidr(), 2);
+	u32 cluster_cpu = MPIDR_AFFINITY_LEVEL(read_cpuid_mpidr(), 1);
+	unsigned int cpuhint = smp_processor_id();
+	u32 reg, mask;
+
+	/* set cpu inform hint */
+	regmap_write(pmu_context->pmureg, EXYNOS850_CPU_INFORM(cpuhint),
+		     CPU_INFORM_C2);
+
+	mask = BIT(cpu);
+	regmap_update_bits(pmu_context->pmuintrgen, EXYNOS_GRP2_INTR_BID_ENABLE,
+			   mask, BIT(cpu));
+
+	regmap_read(pmu_context->pmuintrgen, EXYNOS_GRP1_INTR_BID_UPEND, &reg);
+	regmap_write(pmu_context->pmuintrgen, EXYNOS_GRP1_INTR_BID_CLEAR,
+		     reg & mask);
+
+	mask = (BIT(cpu + 8));
+	regmap_read(pmu_context->pmuintrgen, EXYNOS_GRP1_INTR_BID_UPEND, &reg);
+	regmap_write(pmu_context->pmuintrgen, EXYNOS_GRP1_INTR_BID_CLEAR,
+		     reg & mask);
+
+	regmap_update_bits(pmu_context->pmureg,
+			   EXYNOS850_CLUSTER_CPU_INT_EN(this_cluster, cluster_cpu),
+			   1 << 3, 1 << 3);
+	return 0;
+}
+
 /*
  * __gs101_cpu_pmu_ prefix functions are common code shared by CPU PM notifiers
  * (CPUIdle) and CPU hotplug callbacks. Functions should be called with IRQs
@@ -416,8 +480,12 @@ static int setup_cpuhp_and_cpuidle(struct device *dev)
 	void __iomem *virt_addr;
 	int ret, cpu;
 
-	intr_gen_node = of_parse_phandle(dev->of_node,
-					 "google,pmu-intr-gen-syscon", 0);
+	intr_gen_node = of_parse_phandle(dev->of_node, "samsung,pmu-intr-gen-syscon", 0);
+
+	/* Fall back to the google pmu intr gen property for older DTBs */
+	if (!intr_gen_node)
+		intr_gen_node = of_parse_phandle(dev->of_node, "google,pmu-intr-gen-syscon", 0);
+
 	if (!intr_gen_node) {
 		/*
 		 * To maintain support for older DTs that didn't specify syscon
@@ -427,9 +495,19 @@ static int setup_cpuhp_and_cpuidle(struct device *dev)
 		return 0;
 	}
 
-	pmu_context->cpu_pmu_online = __gs101_cpu_pmu_online;
-	pmu_context->cpu_pmu_offline = __gs101_cpu_pmu_offline;
+	if (of_machine_is_compatible("google,gs101")) {
+		pmu_context->cpu_pmu_online = __gs101_cpu_pmu_online;
+		pmu_context->cpu_pmu_offline = __gs101_cpu_pmu_offline;
+	}
+
+	if (of_machine_is_compatible("samsung,exynos850")) {
+		pmu_context->cpu_pmu_online = __exynos850_cpu_pmu_online;
+		pmu_context->cpu_pmu_offline = __exynos850_cpu_pmu_offline;
 
+	} else {
+		dev_err(dev, "pmu-intr-gen is present but machine is not supported\n");
+		return -ENODEV;
+	}
 	/*
 	 * To avoid lockdep issues (CPU PM notifiers use raw spinlocks) create
 	 * a mmio regmap for pmu-intr-gen that uses raw spinlocks instead of
diff --git a/include/linux/soc/samsung/exynos-regs-pmu.h b/include/linux/soc/samsung/exynos-regs-pmu.h
index 9c4d3da41dbf..93c4d724c8ea 100644
--- a/include/linux/soc/samsung/exynos-regs-pmu.h
+++ b/include/linux/soc/samsung/exynos-regs-pmu.h
@@ -1015,6 +1015,11 @@
 #define EXYNOS_GRP2_INTR_BID_UPEND				(0x0208)
 #define EXYNOS_GRP2_INTR_BID_CLEAR				(0x020c)
 
+/* Exynos850 PMU Alive */
+#define EXYNOS850_CPU_INFORM(cpu)		(0x0860 + ((cpu) & 7) * 4)
+#define EXYNOS850_CLUSTER_CPU_OFFSET(cl, cpu)	(0x1000 + ((cl * 0x400) + ((cpu) * 0x80)))
+#define EXYNOS850_CLUSTER_CPU_INT_EN(cl, cpu)	(EXYNOS850_CLUSTER_CPU_OFFSET(cl, cpu) + 0x44)
+
 /* exynosautov920 */
 #define EXYNOSAUTOV920_PHY_CTRL_USB20				(0x0710)
 #define EXYNOSAUTOV920_PHY_CTRL_USB31				(0x0714)

-- 
2.51.0

Re: [PATCH RFC 7/8] soc: samsung: exynos-pmu: add Exynos850 CPU hotplug support

[Peter Griffin]

Hi Alexey,

Thanks for your patch.

On Thu, 26 Feb 2026 at 15:47, Alexey Klimov <alexey.klimov@linaro.org> wrote:
>
> Some Exynos-based SoCs require specific set of writes/updates to PMU
> and PMU intr gen blocks in order to put a CPU or a group of CPUs into
> a different sleep states or prepare these entities for a CPU_OFF.
> The same is valid for a reverse procedures like wake-ups or CPU(s)
> online. Without these writes/updates the CPU(s) wake-up or online
> fails.
> Add support for Exynos850-based SoCs for PMU and PMU intr gen write/update
> sequences.
> While at this, also add description of Exynos850 PMU registers.
>
> Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
> ---
>  drivers/soc/samsung/exynos-pmu.c            | 86 +++++++++++++++++++++++++++--
>  include/linux/soc/samsung/exynos-regs-pmu.h |  5 ++
>  2 files changed, 87 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/soc/samsung/exynos-pmu.c b/drivers/soc/samsung/exynos-pmu.c
> index 0967fa56708a..7b9b8e22d91b 100644
> --- a/drivers/soc/samsung/exynos-pmu.c
> +++ b/drivers/soc/samsung/exynos-pmu.c
> @@ -118,6 +118,10 @@ static const struct regmap_config regmap_pmu_intr = {
>         .use_raw_spinlock = true,
>  };
>
> +const struct exynos_pmu_data exynos850_pmu_data = {
> +       .pmu_cpuhp = true,
> +};
> +

You may want to consider having an e850-pmu.c file to contain the e850
specific data and hooks.

Andre recently moved some of the gs101-specific parts into gs101-pmu.c
(although not the actual gs101 online/offline hooks). Now that more
SoCs are being added it could be a good time for exynos-pmu to contain
only the generic code and the <soc>-pmu.c file having the
peculiarities/hooks for the specific SoC.

>  /*
>   * PMU platform driver and devicetree bindings.
>   */
> @@ -151,6 +155,7 @@ static const struct of_device_id exynos_pmu_of_device_ids[] = {
>                 .compatible = "samsung,exynos7-pmu",
>         }, {
>                 .compatible = "samsung,exynos850-pmu",
> +               .data = &exynos850_pmu_data,
>         },
>         { /*sentinel*/ },
>  };
> @@ -229,6 +234,65 @@ EXPORT_SYMBOL_GPL(exynos_get_pmu_regmap_by_phandle);
>  #define CPU_INFORM_CLEAR       0
>  #define CPU_INFORM_C2          1
>
> +static int __exynos850_cpu_pmu_online(unsigned int cpu)
> +       __must_hold(&pmu_context->cpupm_lock)
> +{
> +       u32 this_cluster = MPIDR_AFFINITY_LEVEL(read_cpuid_mpidr(), 2);
> +       u32 cluster_cpu = MPIDR_AFFINITY_LEVEL(read_cpuid_mpidr(), 1);
> +       unsigned int cpuhint = smp_processor_id();
> +       u32 reg, mask;
> +
> +       /* clear cpu inform hint */
> +       regmap_write(pmu_context->pmureg, EXYNOS850_CPU_INFORM(cpuhint),
> +                    CPU_INFORM_CLEAR);
> +
> +       mask = BIT(cpu);
> +
> +       regmap_update_bits(pmu_context->pmuintrgen, EXYNOS_GRP2_INTR_BID_ENABLE,
> +                          mask, (0 << cpu));
> +
> +       regmap_read(pmu_context->pmuintrgen, EXYNOS_GRP2_INTR_BID_UPEND, &reg);
> +
> +       regmap_write(pmu_context->pmuintrgen, EXYNOS_GRP2_INTR_BID_CLEAR,
> +                    reg & mask);
> +
> +       regmap_update_bits(pmu_context->pmureg,
> +                          EXYNOS850_CLUSTER_CPU_INT_EN(this_cluster, cluster_cpu),
> +                          1 << 3, 0 << 3);
> +       return 0;
> +}
> +
> +static int __exynos850_cpu_pmu_offline(unsigned int cpu)
> +       __must_hold(&pmu_context->cpupm_lock)
> +{
> +       u32 this_cluster = MPIDR_AFFINITY_LEVEL(read_cpuid_mpidr(), 2);
> +       u32 cluster_cpu = MPIDR_AFFINITY_LEVEL(read_cpuid_mpidr(), 1);
> +       unsigned int cpuhint = smp_processor_id();
> +       u32 reg, mask;
> +
> +       /* set cpu inform hint */
> +       regmap_write(pmu_context->pmureg, EXYNOS850_CPU_INFORM(cpuhint),
> +                    CPU_INFORM_C2);
> +
> +       mask = BIT(cpu);
> +       regmap_update_bits(pmu_context->pmuintrgen, EXYNOS_GRP2_INTR_BID_ENABLE,
> +                          mask, BIT(cpu));
> +
> +       regmap_read(pmu_context->pmuintrgen, EXYNOS_GRP1_INTR_BID_UPEND, &reg);
> +       regmap_write(pmu_context->pmuintrgen, EXYNOS_GRP1_INTR_BID_CLEAR,
> +                    reg & mask);
> +
> +       mask = (BIT(cpu + 8));
> +       regmap_read(pmu_context->pmuintrgen, EXYNOS_GRP1_INTR_BID_UPEND, &reg);
> +       regmap_write(pmu_context->pmuintrgen, EXYNOS_GRP1_INTR_BID_CLEAR,
> +                    reg & mask);
> +
> +       regmap_update_bits(pmu_context->pmureg,
> +                          EXYNOS850_CLUSTER_CPU_INT_EN(this_cluster, cluster_cpu),
> +                          1 << 3, 1 << 3);
> +       return 0;
> +}
> +
>  /*
>   * __gs101_cpu_pmu_ prefix functions are common code shared by CPU PM notifiers
>   * (CPUIdle) and CPU hotplug callbacks. Functions should be called with IRQs
> @@ -416,8 +480,12 @@ static int setup_cpuhp_and_cpuidle(struct device *dev)
>         void __iomem *virt_addr;
>         int ret, cpu;
>
> -       intr_gen_node = of_parse_phandle(dev->of_node,
> -                                        "google,pmu-intr-gen-syscon", 0);
> +       intr_gen_node = of_parse_phandle(dev->of_node, "samsung,pmu-intr-gen-syscon", 0);
> +
> +       /* Fall back to the google pmu intr gen property for older DTBs */
> +       if (!intr_gen_node)
> +               intr_gen_node = of_parse_phandle(dev->of_node, "google,pmu-intr-gen-syscon", 0);
> +
>         if (!intr_gen_node) {
>                 /*
>                  * To maintain support for older DTs that didn't specify syscon
> @@ -427,9 +495,19 @@ static int setup_cpuhp_and_cpuidle(struct device *dev)
>                 return 0;
>         }
>
> -       pmu_context->cpu_pmu_online = __gs101_cpu_pmu_online;
> -       pmu_context->cpu_pmu_offline = __gs101_cpu_pmu_offline;
> +       if (of_machine_is_compatible("google,gs101")) {
> +               pmu_context->cpu_pmu_online = __gs101_cpu_pmu_online;
> +               pmu_context->cpu_pmu_offline = __gs101_cpu_pmu_offline;
> +       }
> +
> +       if (of_machine_is_compatible("samsung,exynos850")) {
> +               pmu_context->cpu_pmu_online = __exynos850_cpu_pmu_online;
> +               pmu_context->cpu_pmu_offline = __exynos850_cpu_pmu_offline;
>

There should be no compatibles inside probe (that rule applies to all
drivers & subsystems). Instead use the driver match data
(exynos_pmu_data).

regards,

Peter

Re: [PATCH RFC 7/8] soc: samsung: exynos-pmu: add Exynos850 CPU hotplug support

[Alexey Klimov]

Hi Peter,

On Fri Mar 6, 2026 at 2:15 PM GMT, Peter Griffin wrote:
> On Thu, 26 Feb 2026 at 15:47, Alexey Klimov <alexey.klimov@linaro.org> wrote:
>>
>> Some Exynos-based SoCs require specific set of writes/updates to PMU
>> and PMU intr gen blocks in order to put a CPU or a group of CPUs into
>> a different sleep states or prepare these entities for a CPU_OFF.
>> The same is valid for a reverse procedures like wake-ups or CPU(s)
>> online. Without these writes/updates the CPU(s) wake-up or online
>> fails.
>> Add support for Exynos850-based SoCs for PMU and PMU intr gen write/update
>> sequences.
>> While at this, also add description of Exynos850 PMU registers.
>>
>> Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
>> ---
>>  drivers/soc/samsung/exynos-pmu.c            | 86 +++++++++++++++++++++++++++--
>>  include/linux/soc/samsung/exynos-regs-pmu.h |  5 ++
>>  2 files changed, 87 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/soc/samsung/exynos-pmu.c b/drivers/soc/samsung/exynos-pmu.c
>> index 0967fa56708a..7b9b8e22d91b 100644
>> --- a/drivers/soc/samsung/exynos-pmu.c
>> +++ b/drivers/soc/samsung/exynos-pmu.c
>> @@ -118,6 +118,10 @@ static const struct regmap_config regmap_pmu_intr = {
>>         .use_raw_spinlock = true,
>>  };
>>
>> +const struct exynos_pmu_data exynos850_pmu_data = {
>> +       .pmu_cpuhp = true,
>> +};
>> +
>
> You may want to consider having an e850-pmu.c file to contain the e850
> specific data and hooks.
>
> Andre recently moved some of the gs101-specific parts into gs101-pmu.c
> (although not the actual gs101 online/offline hooks). Now that more
> SoCs are being added it could be a good time for exynos-pmu to contain
> only the generic code and the <soc>-pmu.c file having the
> peculiarities/hooks for the specific SoC.

Thanks. Yeah. That's why it was sent as an RFC to get pointers where
to place things properly. I'll update it.

[..]

>> -       pmu_context->cpu_pmu_online = __gs101_cpu_pmu_online;
>> -       pmu_context->cpu_pmu_offline = __gs101_cpu_pmu_offline;
>> +       if (of_machine_is_compatible("google,gs101")) {
>> +               pmu_context->cpu_pmu_online = __gs101_cpu_pmu_online;
>> +               pmu_context->cpu_pmu_offline = __gs101_cpu_pmu_offline;
>> +       }
>> +
>> +       if (of_machine_is_compatible("samsung,exynos850")) {
>> +               pmu_context->cpu_pmu_online = __exynos850_cpu_pmu_online;
>> +               pmu_context->cpu_pmu_offline = __exynos850_cpu_pmu_offline;
>>
>
> There should be no compatibles inside probe (that rule applies to all
> drivers & subsystems). Instead use the driver match data
> (exynos_pmu_data).

Thanks. Yep, I'll update it.

BR,
Alexey

[PATCH RFC 8/8] arm64: dts: exynos850: add PMU interrupt generation node

[Alexey Klimov]

Add pmu_intr_gen node for Exynos850. This hw block is required
for different power management routines like CPU hotplug and
different sleep and idle states.
Also reference this node from main PMU node.

Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
---
 arch/arm64/boot/dts/exynos/exynos850.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos850.dtsi b/arch/arm64/boot/dts/exynos/exynos850.dtsi
index cb55015c8dce..e3f4fe6ee118 100644
--- a/arch/arm64/boot/dts/exynos/exynos850.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos850.dtsi
@@ -211,9 +211,15 @@ gic: interrupt-controller@12a01000 {
 						 IRQ_TYPE_LEVEL_HIGH)>;
 		};
 
+		pmu_intr_gen: syscon@11870000 {
+			compatible = "samsung,exynos850-pmu-intr-gen", "syscon";
+			reg = <0x11870000 0x10000>;
+		};
+
 		pmu_system_controller: system-controller@11860000 {
 			compatible = "samsung,exynos850-pmu", "syscon";
 			reg = <0x11860000 0x10000>;
+			samsung,pmu-intr-gen-syscon = <&pmu_intr_gen>;
 
 			reboot: syscon-reboot {
 				compatible = "syscon-reboot";

-- 
2.51.0

Re: [PATCH RFC 8/8] arm64: dts: exynos850: add PMU interrupt generation node

[Peter Griffin]

Hi Alexey,

On Thu, 26 Feb 2026 at 15:47, Alexey Klimov <alexey.klimov@linaro.org> wrote:
>
> Add pmu_intr_gen node for Exynos850. This hw block is required
> for different power management routines like CPU hotplug and
> different sleep and idle states.
> Also reference this node from main PMU node.
>
> Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
> ---
>  arch/arm64/boot/dts/exynos/exynos850.dtsi | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/exynos/exynos850.dtsi b/arch/arm64/boot/dts/exynos/exynos850.dtsi
> index cb55015c8dce..e3f4fe6ee118 100644
> --- a/arch/arm64/boot/dts/exynos/exynos850.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos850.dtsi
> @@ -211,9 +211,15 @@ gic: interrupt-controller@12a01000 {
>                                                  IRQ_TYPE_LEVEL_HIGH)>;
>                 };
>
> +               pmu_intr_gen: syscon@11870000 {
> +                       compatible = "samsung,exynos850-pmu-intr-gen", "syscon";
> +                       reg = <0x11870000 0x10000>;
> +               };

This should be ordered by unit address (so in this case placed after
the pmu_system_controller node). Refer to
https://docs.kernel.org/devicetree/bindings/dts-coding-style.html

Peter

Re: [PATCH RFC 8/8] arm64: dts: exynos850: add PMU interrupt generation node

[Alexey Klimov]

Hi Peter,

On Fri Mar 6, 2026 at 1:44 PM GMT, Peter Griffin wrote:
> Hi Alexey,
>
> On Thu, 26 Feb 2026 at 15:47, Alexey Klimov <alexey.klimov@linaro.org> wrote:
>>
>> Add pmu_intr_gen node for Exynos850. This hw block is required
>> for different power management routines like CPU hotplug and
>> different sleep and idle states.
>> Also reference this node from main PMU node.
>>
>> Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
>> ---
>>  arch/arm64/boot/dts/exynos/exynos850.dtsi | 6 ++++++
>>  1 file changed, 6 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/exynos/exynos850.dtsi b/arch/arm64/boot/dts/exynos/exynos850.dtsi
>> index cb55015c8dce..e3f4fe6ee118 100644
>> --- a/arch/arm64/boot/dts/exynos/exynos850.dtsi
>> +++ b/arch/arm64/boot/dts/exynos/exynos850.dtsi
>> @@ -211,9 +211,15 @@ gic: interrupt-controller@12a01000 {
>>                                                  IRQ_TYPE_LEVEL_HIGH)>;
>>                 };
>>
>> +               pmu_intr_gen: syscon@11870000 {
>> +                       compatible = "samsung,exynos850-pmu-intr-gen", "syscon";
>> +                       reg = <0x11870000 0x10000>;
>> +               };
>
> This should be ordered by unit address (so in this case placed after
> the pmu_system_controller node). Refer to
> https://docs.kernel.org/devicetree/bindings/dts-coding-style.html

Thanks, I'll update it.

Best regards,
Alexey

Re: [PATCH RFC 8/8] arm64: dts: exynos850: add PMU interrupt generation node

[Krzysztof Kozlowski]

On 26/02/2026 16:47, Alexey Klimov wrote:
> Add pmu_intr_gen node for Exynos850. This hw block is required
> for different power management routines like CPU hotplug and
> different sleep and idle states.
> Also reference this node from main PMU node.
> 
> Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
> ---
>  arch/arm64/boot/dts/exynos/exynos850.dtsi | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynos850.dtsi b/arch/arm64/boot/dts/exynos/exynos850.dtsi
> index cb55015c8dce..e3f4fe6ee118 100644
> --- a/arch/arm64/boot/dts/exynos/exynos850.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos850.dtsi
> @@ -211,9 +211,15 @@ gic: interrupt-controller@12a01000 {
>  						 IRQ_TYPE_LEVEL_HIGH)>;
>  		};
>  
> +		pmu_intr_gen: syscon@11870000 {

Does not look ordered. Randomness of this file does not make it easier,
so assuming this will be resorted someday we come with a tool, please
place it after @11800000.

Best regards,
Krzysztof

Re: [PATCH RFC 8/8] arm64: dts: exynos850: add PMU interrupt generation node

[Alexey Klimov]

On Sat Mar 7, 2026 at 5:08 PM GMT, Krzysztof Kozlowski wrote:
> On 26/02/2026 16:47, Alexey Klimov wrote:
>> Add pmu_intr_gen node for Exynos850. This hw block is required
>> for different power management routines like CPU hotplug and
>> different sleep and idle states.
>> Also reference this node from main PMU node.
>> 
>> Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
>> ---
>>  arch/arm64/boot/dts/exynos/exynos850.dtsi | 6 ++++++
>>  1 file changed, 6 insertions(+)
>> 
>> diff --git a/arch/arm64/boot/dts/exynos/exynos850.dtsi b/arch/arm64/boot/dts/exynos/exynos850.dtsi
>> index cb55015c8dce..e3f4fe6ee118 100644
>> --- a/arch/arm64/boot/dts/exynos/exynos850.dtsi
>> +++ b/arch/arm64/boot/dts/exynos/exynos850.dtsi
>> @@ -211,9 +211,15 @@ gic: interrupt-controller@12a01000 {
>>  						 IRQ_TYPE_LEVEL_HIGH)>;
>>  		};
>>  
>> +		pmu_intr_gen: syscon@11870000 {
>
> Does not look ordered. Randomness of this file does not make it easier,
> so assuming this will be resorted someday we come with a tool, please
> place it after @11800000.

Ack. Thanks.

BR,
Alexey