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Tue, 14 Apr 2026 07:54:38 -0700 (PDT) Received: from localhost ([212.187.182.166]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-43d73e36e7csm22002840f8f.10.2026.04.14.07.54.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 14 Apr 2026 07:54:38 -0700 (PDT) Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Tue, 14 Apr 2026 15:54:37 +0100 Message-Id: Cc: "Sam Protsenko" , , "Krzysztof Kozlowski" , "Peter Griffin" , =?utf-8?q?Andr=C3=A9_Draszik?= , "Conor Dooley" , "Alim Akhtar" , "Tudor Ambarus" , "Krzysztof Kozlowski" , , , Subject: Re: [PATCH v2 2/7] dt-bindings: soc: samsung: exynos-pmu: add samsung,pmu-intr-gen phandle From: "Alexey Klimov" To: "Rob Herring" X-Mailer: aerc 0.21.0 References: <20260401-exynos850-cpuhotplug-v2-0-c5a760a3e259@linaro.org> <20260401-exynos850-cpuhotplug-v2-2-c5a760a3e259@linaro.org> <20260413221638.GA3624532-robh@kernel.org> In-Reply-To: <20260413221638.GA3624532-robh@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260414_075441_254460_A230AF11 X-CRM114-Status: GOOD ( 18.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon Apr 13, 2026 at 11:16 PM BST, Rob Herring wrote: > On Wed, Apr 01, 2026 at 05:51:55AM +0100, Alexey Klimov wrote: >> Some Exynos-based SoCs, for instance Exynos850, require access >> to the pmu interrupt generation register region which is exposed >> as a syscon. Update the exynos-pmu bindings documentation to >> reflect this. >>=20 >> Signed-off-by: Alexey Klimov >> --- >> .../devicetree/bindings/soc/samsung/exynos-pmu.yaml | 18 +++++++++++= +++++++ >> 1 file changed, 18 insertions(+) >>=20 >> diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.ya= ml b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml >> index 76ce7e98c10f..92acdfd5d44e 100644 >> --- a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml >> +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml >> @@ -110,6 +110,11 @@ properties: >> description: >> Node for reboot method >> =20 >> + samsung,pmu-intr-gen-syscon: >> + $ref: /schemas/types.yaml#/definitions/phandle >> + description: >> + Phandle to PMU interrupt generation interface. >> + >> google,pmu-intr-gen-syscon: > > Does this mean the driver is just going to have to look at both=20 > properties for the same thing? If so, just use the existing property. We= =20 > don't need 2. Yeah, 'google' in Samsung SoCs is a bit weird, but that's= =20 > Samsung's fault for not upstreaming support for their h/w first. First question - yes, look for both properties. Using the existing property is even better, I don't mind at all. Thanks for pointing that out. Initially, I added more generic samsung,... property because I thought that device tree style prefers , semantics where is actual (real) HW vendor of corresponding hw block and it should also refer to the first/earlier hw vendor in terms of the timeline. Using google,<..> is simplier and I don't need need commit that obsoletes that, so I'll rework the series in that way. BR, Alexey