Re: [PATCH v7 03/10] arm64: dts: qcom: milos: Add power-domains for camcc and videocc

["Luca Weiss" <luca.weiss@fairphone.com>]

Hi Taniya,

On Mon Jul 13, 2026 at 4:53 PM CEST, Taniya Das wrote:
> The Milos camera and video clock controllers operate on the CX and MX
> power rails, and require these power domains along with their
> associated performance state votes to be specified for accessing the
> clock controller and its GDSC. Add the 'power-domains' and
> 'required-opps' properties to the camcc and videocc nodes.
>
> Fixes: d9d59d105f98 ("arm64: dts: qcom: Add initial Milos dtsi")
> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/milos.dtsi | 10 ++++++++++
>  1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/milos.dtsi b/arch/arm64/boot/dts/qcom/milos.dtsi
> index 8c92329889538f0d79f7af436898e3ee278e361c..7c42d6c89829e4bf5a2ade64018623e49623462c 100644
> --- a/arch/arm64/boot/dts/qcom/milos.dtsi
> +++ b/arch/arm64/boot/dts/qcom/milos.dtsi
> @@ -1892,6 +1892,11 @@ videocc: clock-controller@aaf0000 {
>  				 <&sleep_clk>,
>  				 <&gcc GCC_VIDEO_AHB_CLK>;
>  
> +			power-domains = <&rpmhpd RPMHPD_CX>,
> +				<&rpmhpd RPMHPD_MX>;
> +			required-opps = <&rpmhpd_opp_low_svs>,
> +				<&rpmhpd_opp_low_svs>;
> +
>  			#clock-cells = <1>;
>  			#reset-cells = <1>;
>  			#power-domain-cells = <1>;
> @@ -1971,6 +1976,11 @@ camcc: clock-controller@adb0000 {
>  				 <&sleep_clk>,
>  				 <&gcc GCC_CAMERA_AHB_CLK>;
>  
> +			power-domains = <&rpmhpd RPMHPD_CX>,
> +				<&rpmhpd RPMHPD_MX>;
> +			required-opps = <&rpmhpd_opp_low_svs>,
> +				<&rpmhpd_opp_low_svs>;

At least looking at downstream drivers (camcc-volcano.c and
videocc-volcano.c), both have

  static DEFINE_VDD_REGULATORS(vdd_cx, VDD_HIGH + 1, 1, vdd_corner);
  static DEFINE_VDD_REGULATORS(vdd_mx, VDD_HIGH + 1, 1, vdd_corner);

so from what I can tell based on that, your change seems correct.

I'm sure you have better documentation than that at hand though!

Regards
Luca